On 03/29/2012 02:56 PM, Blue Swirl wrote:
>> > +tcg_out_arithi(s, TCG_REG_T1, rs1, 31, SHIFT_SRA);
>> > +tcg_out_sety(s, TCG_REG_T1);
> By the way, since we assume V9+, this 32 bit division which uses the
> register y could be changed (in some later patch) to use nicer 64 bit
> divi
On Thu, Mar 29, 2012 at 01:26:34PM -0500, Anthony Liguori wrote:
> On 03/29/2012 12:26 PM, Luiz Capitulino wrote:
> >This allows for QAPI functions to receive a variable-length argument
> >list. This is going to be used by device_add and netdev_add commands.
> >
> >In the schema, the argument list
On 03/29/2012 04:11 AM, Mark Cave-Ayland wrote:
>>> What about POWERPC_EXCP_40x? And are all the classic chips OK with the
>>> 2.06B implementation?
>>
>> Hrm, yeah. I think what you ought to do is to use the new logic just
>> for the "classic" exception models. Have the default branch remain
>>
On Thu, 2012-03-29 at 21:38 +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 29, 2012 at 10:53:38AM -0600, Alex Williamson wrote:
> > On Thu, 2012-03-29 at 14:51 +0200, Michael S. Tsirkin wrote:
> > > piix acpi interface suffers from the following 2 issues:
> > >
> > > 1.
> > > - delete device a
> >
On 03/29/2012 02:28 PM, Michael Roth wrote:
On Thu, Mar 29, 2012 at 01:26:34PM -0500, Anthony Liguori wrote:
On 03/29/2012 12:26 PM, Luiz Capitulino wrote:
This allows for QAPI functions to receive a variable-length argument
list. This is going to be used by device_add and netdev_add commands.
Il 29/03/2012 21:28, Michael Roth ha scritto:
> Since currently we explicitly point qmp to the marshaller anyway, we
> could also just treat '**' as an indicator to not generate a marshaller.
> Then, we open-code the marshaller to process the QDict, rather than embedding
> it in the script or passi
On Thu, Mar 29, 2012 at 10:53:38AM -0600, Alex Williamson wrote:
> On Thu, 2012-03-29 at 14:51 +0200, Michael S. Tsirkin wrote:
> > piix acpi interface suffers from the following 2 issues:
> >
> > 1.
> > - delete device a
> > - quickly add device b in another slot
> >
> > if we do this before gue
On Thu, Mar 29, 2012 at 11:08:20AM +0200, Gerd Hoffmann wrote:
> On 03/26/12 16:15, Alon Levy wrote:
> > Add mouse_mode, either server or mouse, to qmp and hmp commands, based
> > on spice_server_is_server_mouse added in spice-server 0.10.3.
>
> Looks good. What is the status of the spice-server
Am 28.03.2012 20:56, schrieb Jan Kiszka:
Avoids lots of warnings.
Signed-off-by: Jan Kiszka
---
qemu_socket.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/qemu_socket.h b/qemu_socket.h
index fe4cf6c..51ad210 100644
--- a/qemu_socket.h
+++ b/qemu_socket.h
@@ -8,7 +8,9 @@
On 03/26/2012 09:15 AM, Alon Levy wrote:
Add mouse_mode, either server or mouse, to qmp and hmp commands, based
on spice_server_is_server_mouse added in spice-server 0.10.3.
Signed-off-by: Alon Levy
---
v1->v2:
report mouse mode "unknown" for qmp too (Gerd Hoffman request)
hmp.c
The addition of those values caused a regression where not specifying
any value for the vram bar size would result in a 4096 _byte_ surface
area. This is ok for the windows driver but causes the X driver to be
unusable. Also, it's a regression. This patch returns the default
behavior of having a 64
On Sat, Mar 24, 2012 at 21:25, Stefan Weil wrote:
> QEMU host addresses must use uintptr_t to be portable for hosts with
> an unusual size of long (w64).
>
> tb_jmp_offset is an uint16_t value, therefore the local variable offset
> in function tb_set_jmp_target was changed from unsigned long to ui
I am wondering what the solution in qemu is if the guest architecture
has a stronger memory ordering requirement than the host archiecture ?
memory fences ?
Thanks
Xin
On Thu, Mar 29, 2012 at 03:19:16PM -0500, Anthony Liguori wrote:
> On 03/26/2012 09:15 AM, Alon Levy wrote:
> >Add mouse_mode, either server or mouse, to qmp and hmp commands, based
> >on spice_server_is_server_mouse added in spice-server 0.10.3.
> >
> >Signed-off-by: Alon Levy
> >---
> >v1->v2:
>
On 29 March 2012 21:49, Xin Tong wrote:
> I am wondering what the solution in qemu is if the guest architecture
> has a stronger memory ordering requirement than the host archiecture ?
> memory fences ?
In system mode all guest CPUs run in a single host thread so
there aren't any ordering issues
Issues a qxl_guest_bug from qxl_phys2virt. Everywhere else will fail.
qxl_phys2virt requires an additional argument because all it's possible
return values are legit (well, I could use the fact it returns a pointer
so it should be word aligned but I don't want to go there, this is
totally internal)
Add mouse_mode, either server or mouse, to qmp and hmp commands, based
on spice_server_is_server_mouse added in spice-server 0.10.3.
Signed-off-by: Alon Levy
---
hmp.c|2 ++
qapi-schema.json | 27 ++-
ui/spice-core.c |7 +++
3 files changed, 35
On Thu, Mar 29, 2012 at 03:01:16PM -0500, Anthony Liguori wrote:
> On 03/29/2012 02:28 PM, Michael Roth wrote:
> >On Thu, Mar 29, 2012 at 01:26:34PM -0500, Anthony Liguori wrote:
> >>On 03/29/2012 12:26 PM, Luiz Capitulino wrote:
> >>>This allows for QAPI functions to receive a variable-length argu
On Thu, Mar 29, 2012 at 05:39:10PM -0500, Michael Roth wrote:
> On Thu, Mar 29, 2012 at 03:01:16PM -0500, Anthony Liguori wrote:
> > On 03/29/2012 02:28 PM, Michael Roth wrote:
> > >On Thu, Mar 29, 2012 at 01:26:34PM -0500, Anthony Liguori wrote:
> > >>On 03/29/2012 12:26 PM, Luiz Capitulino wrote:
On Thu, Mar 29, 2012 at 04:49:02PM -0400, Xin Tong wrote:
> I am wondering what the solution in qemu is if the guest architecture
> has a stronger memory ordering requirement than the host archiecture ?
> memory fences ?
There was a thread has a similar discussion. See
http://lists.gnu.org/arc
On Fri, Mar 30, 2012 at 12:29 AM, Kirill Batuzov wrote:
>
>
> On Thu, 29 Mar 2012, Peter A. G. Crosthwaite wrote:
>
>> Device model for Primecell PL330 dma controller.
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> ---
>
> Signed-off-by: Kirill Batuzov
>
Thanks Kirill
>> +static int PL330Fifo
Uh.. please apply? Anyone?
On Tue, Mar 27, 2012 at 01:43:21PM +1100, David Gibson wrote:
> A while back, we introduced the dma_addr_t type, which is supposed to
> be used for bus visible memory addresses. At present, this is an
> alias for target_phys_addr_t, but this will change when we eventua
On Thu, Mar 29, 2012 at 11:28:19AM +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 29, 2012 at 02:53:52PM +1100, David Gibson wrote:
> > On Wed, Mar 28, 2012 at 11:30:56AM +0200, Michael S. Tsirkin wrote:
> > > On Wed, Mar 28, 2012 at 12:11:52PM +1100, David Gibson wrote:
> > > > Michael,
> > > >
>
This is MIPS ASE DSP instructions support for QEMU. These instructions
are grouped according to "Chapter 4. MIPS DSP ASE Instruction Summary"
in MIPS ASE DSP manual [1].
[1] MIPS32® Architecture for Programmers VolumeIV-e: The MIPS® DSP
Application-Specific Extension to the MIPS32®Architecture
Add internal functions used by MIPS DSP helper functions.
Signed-off-by: Jia Liu
---
Makefile.target |3 +
target-mips/dsp_helper.c | 973 ++
2 files changed, 976 insertions(+), 0 deletions(-)
create mode 100644 target-mips/dsp_helper.c
There are 4 accumulator registers (acc) used by MIPS ASE DSP instructions.
Each accumulator register is composed of by HIGH and LOW part. Use correct
acc value to index cpu_HI/cpu_LO rather than using a fix number (i.e. zero).
Signed-off-by: Jia Liu
---
target-mips/translate.c | 56 +++
Add MIPS DSP Branch instruction Support.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 21 +++--
1 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f869146..8f8daf2 100644
--- a/target-mips/translate.c
Add MIPS DSP Load instructions Support.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 47 +++
1 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8f8daf2..608f6de 100644
--- a
Add MIPS DSP Arithmetic instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 876 ++
target-mips/helper.h | 55 +++
target-mips/translate.c | 288 +++-
3 files changed, 1218 insertions(+), 1 deletions(-)
dif
Add MIPS DSP Multiply instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 729 ++
target-mips/helper.h | 34 +++
target-mips/translate.c | 264 +
3 files changed, 1027 insertions(+), 0 deletions(-)
diff
Add MIPS DSP GPR-Based Shift instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 411 ++
target-mips/helper.h | 24 +++
target-mips/translate.c | 114 +
3 files changed, 549 insertions(+), 0 deletions(-)
di
Add MIPS DSP Accumulator and DSPControl Access instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 465 ++
target-mips/helper.h | 19 ++
target-mips/translate.c | 175 +
3 files changed, 659 insertions(+
Add MIPS DSP Compare-Pick instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 341 ++
target-mips/helper.h | 17 +++
target-mips/translate.c | 135 ++
3 files changed, 493 insertions(+), 0 deletions(-)
Add MIPS DSP Bit/Manipulation instructions Support.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 42 +++
target-mips/helper.h |4 ++
target-mips/translate.c | 103 ++
3 files changed, 149 insertions(+), 0 deletions(
Hi all,
I am currently using backing file.The question of my concern is regarding
the I/O operation
Now when we create a external snapshot in qcow2, a new file is created
leaving the original file as backing file
*
Can any one tell,*how the I/O is performed in detail way?.
Means when the new snap
On Tue, Mar 27, 2012 at 01:34:43PM -0600, Alex Williamson wrote:
[snip]
> > > > this case, it gets a bit complex. When the FooBus isolation provider
> > > > is active, the FooBus devices would be in their own groups, not the
> > > > group of the FooBridge and its sibling. When the FooBus isolatio
Add support for Serial Peripheral interface (SPI) as a proper bus standard.
Includes an example device (m25p80 SPI flash), an example controller (Xilinx
XPS SPI) and adds it to all to a machine model (petalogix_ml605_mmu.c).
Patch 1 adds the Serial Peripheral Interface (SPI) protocol as a bus an
Added spi controller to the reference design, with a single cs line and a
m25p80 style spi-flash connected
Signed-off-by: Peter A. G. Crosthwaite
---
hw/petalogix_ml605_mmu.c | 19 +++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/hw/petalogix_ml605_mmu.c b/hw
Hi all:
Consider of the options parsing process in main function of vl.c is too long.
It should be module into single function to clear Ideas, strengthen the source
code
management, and increase code readability.
Regards,
Wanpeng Li
--
LTC China, IBM, Shanghai
device model for xilinx XPS SPI controller (v2.0)
Signed-off-by: Peter A. G. Crosthwaite
---
Makefile.target |1 +
hw/xilinx_spi.c | 477 +++
2 files changed, 478 insertions(+), 0 deletions(-)
create mode 100644 hw/xilinx_spi.c
diff --gi
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