On 04/27/2011 11:16 AM, Venkateswararao Jujjuri wrote:
The following changes since commit
661bfc80e876d32da8befe53ba0234d87fc0bcc2:
Jan Kiszka (1):
pflash: Restore & fix lazy ROMD switching
are available in the git repository at:
git://repo.or.cz/qemu/aliguori/jvrao.git for-anthony
It's prett
Commit 353ac78d495ef976242abd868f68d78420861c2c moved the files
without fixing the include paths. It used a modified CFLAGS
to add hw to the include search path, but this breaks builds
where the user wants to set special CFLAGS. Long include paths
also increase compilation time.
Therefore this pat
On Thu, Apr 28, 2011 at 5:24 PM, Ulrich Obergfell wrote:
> 'target_get_irq_delivered' and 'target_reset_irq_delivered' contain
> entry addresses of functions that are utilized by update_irq() to
> detect coalesced interrupts. apic code loads these pointers during
> initialization.
I'm not so happ
On Thu, Apr 28, 2011 at 8:46 PM, Anthony Liguori wrote:
> On 04/28/2011 12:44 PM, Stefan Weil wrote:
>>
>> Am 28.04.2011 19:39, schrieb Anthony Liguori:
>>>
>>> On 04/28/2011 12:08 PM, Stefan Weil wrote:
From: Stefan Weil
Commit 353ac78d495ef976242abd868f68d78420861c2c moved th
On Wed, Apr 27, 2011 at 6:31 PM, Roberto Paleari
wrote:
> Hi Stefan,
>
> Not yet. I have not received any reply besides Blue Swirl's message..
Therefore, please publish the problems you found on this list so we
can start fixing them.
When we register a physical memory client, we try to walk the page
tables, calling the set_memory hook for every entry. Effectively
playing catchup for the client for everything already registered.
This typo prevents us from walking most of the page tables.
Signed-off-by: Alex Williamson
---
Th
On 04/08/2011 02:18 AM, Roberto Paleari wrote:
Dear QEMU developers,
we are a group of researchers working at the University of Milan,
Italy. During the last year we focused on automatic techniques to find
defects inside CPU emulators and virtualizers. Our work has been
published in different co
Commit 353ac78d495ef976242abd868f68d78420861c2c moved the files
without fixing the include paths. It used a modified CFLAGS
to add hw to the include search path, but this breaks builds
where the user wants to set special CFLAGS. Long include paths
also increase compilation time.
Therefore this pat
On 04/28/2011 03:02 PM, Stefan Weil wrote:
Commit 353ac78d495ef976242abd868f68d78420861c2c moved the files
without fixing the include paths. It used a modified CFLAGS
to add hw to the include search path, but this breaks builds
where the user wants to set special CFLAGS. Long include paths
also i
The QEMU emulation PALcode will use EV6 PALcode insns regardless
of the "real" cpu instruction set being emulated.
Signed-off-by: Richard Henderson
---
alpha-dis.c |4
dis-asm.h |3 +++
disas.c |2 +-
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/alpha-dis
We were failing to generate EXC_DEBUG in the EXIT_PC_UPDATED path.
This caused us not to stop at the instruction after a branch, but
on the instruction afterward.
Signed-off-by: Richard Henderson
---
target-alpha/translate.c | 35 ---
1 files changed, 20 inserti
There's no need to attempt to match EXCP_* values with PALcode entry
point offsets. Instead, compress all the values to make for more
efficient switch statements within QEMU.
We will be doing TLB fill within QEMU proper, not within the PALcode,
so all of the ITB/DTB miss, double fault, and access
Signed-off-by: Richard Henderson
---
cpu-common.h |7 +++
exec.c | 12 ++--
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/cpu-common.h b/cpu-common.h
index 96c02ae..e17020b 100644
--- a/cpu-common.h
+++ b/cpu-common.h
@@ -45,6 +45,13 @@ static inline void
This would affect Sparc as well.
Signed-off-by: Richard Henderson
Cc: Blue Swirl
---
cpu-exec.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 395cd8c..e1b85d6 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -361,6 +361,7 @@ int cpu_exec(CPUSt
Compiles, but no machine defined yet, so this will crash on startup.
Signed-off-by: Richard Henderson
---
Makefile.target |3 +-
configure |1 +
default-configs/alpha-softmmu.mak |9
target-alpha/machine.c| 87 +
This code does not work, and will be replaced by a bios image.
Signed-off-by: Richard Henderson
---
Makefile.target |2 +-
hw/alpha_palcode.c | 1048 --
target-alpha/cpu.h | 35 --
target-alpha/helper.c|2 +-
target-a
Patch tree at
git://repo.or.cz/srv/git/qemu/rth.git axp-system-3
Changes from v2 -> v3
* Emulation target is now CLIPPER instead of SX164. I had forgotten
how many bugs there were in various revisions of the CIA chipset,
and the Linux kernel checks for them. Which means that we h
Signed-off-by: Richard Henderson
---
target-alpha/helper.c | 121 +
1 files changed, 111 insertions(+), 10 deletions(-)
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index c5479fd..a49f632 100644
--- a/target-alpha/helper.c
+++ b/targ
Don't bother including executive and supervisor modes.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h | 36
1 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 1fc21dc..bdd396c 100644
--- a/
Delete all the code that tried to emulate the real IPRs of some
unnamed CPU. Replace those with just 3 slots that we can use to
communicate trap information between the helper functions that
signal exceptions and the OS trap handler.
Signed-off-by: Richard Henderson
---
linux-user/main.c
This is, more or less, the read accessor to pci_bus_set_mem_base
as a write accessor. It will be needed for implementing sparse
memory spaces for Alpha.
Signed-off-by: Richard Henderson
---
hw/pci.c |3 +--
hw/pci.h |1 +
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h |1 +
target-alpha/helper.c| 37 -
target-alpha/op_helper.c |5 -
3 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 60445
Signed-off-by: Richard Henderson
---
target-alpha/translate.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 9e1576d..09edb0f 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@
All of the "raw" memory accesses should be "phys" instead. Fix
some confusion about argument ordering of the store routines.
Fix the implementation of store-conditional.
Delete the "alt-mode" helpers. Because we only implement two
mmu modes, let /a imply user-mode unconditionally.
For the momen
Reads the page table how PALcode would, except that the virtual
page table base register is not used.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h| 12 +
target-alpha/helper.c | 129 +++--
2 files changed, 137 insertions(+), 4 del
The EXC_M_* constants were being set for the EV6, not as set for
the Unix kernel entry point.
Use PS_USER_MODE instead of hard-coding access to the PS register.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h | 56 +++--
target-alpha/trans
We had two different methods in use, both of which referenced ENV,
and neither of which indicated to the generic code when different
compilation modes are not compatible.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h | 32 -
target-alpha/translate.c | 396 +
Introduce and use arith_excp, filling in the trap_arg[01] IPRs.
Signed-off-by: Richard Henderson
---
target-alpha/op_helper.c | 34 +-
1 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c
index 73e5
Signed-off-by: Richard Henderson
---
exec-all.h |2 +-
exec.c | 12 ++--
target-alpha/cpu.h |6 +-
target-alpha/op_helper.c | 26 ++
4 files changed, 38 insertions(+), 8 deletions(-)
diff --git a/exec-all.h b/e
Signed-off-by: Richard Henderson
---
target-alpha/op_helper.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c
index 91ef90a..42fec07 100644
--- a/target-alpha/op_helper.c
+++ b/target-alpha/op_helper.c
@@ -66,7 +66,8 @
Expose these via MTPR, more or less like the real HW does.
Signed-off-by: Richard Henderson
---
target-alpha/helper.h|3 +++
target-alpha/op_helper.c | 11 ++-
target-alpha/translate.c | 32 +---
3 files changed, 34 insertions(+), 12 deletions(-)
This gets the PC right after an arithmetic exception. Also tidies
the code in the TLB fault handlers to use common code.
Signed-off-by: Richard Henderson
---
target-alpha/op_helper.c | 49 -
1 files changed, 30 insertions(+), 19 deletions(-)
diff -
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h |2 --
target-alpha/op_helper.c | 14 +++---
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 59b3bc3..30ecf2d 100644
--- a/target-alpha/cpu.h
+++ b/target-alph
Signed-off-by: Richard Henderson
---
target-alpha/helper.h|1 +
target-alpha/op_helper.c | 10 ++
target-alpha/translate.c |5 +
3 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/target-alpha/helper.h b/target-alpha/helper.h
index 2dec57e..c352c24 100644
--
---
target-alpha/translate.c | 31 +--
1 files changed, 21 insertions(+), 10 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 8107d19..7b976be 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1621,9 +1621,10
These aren't actually used yet, but we can at least access
them via the HW_MFPR and HW_MTPR instructions.
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h | 13 +++
target-alpha/translate.c | 87 -
2 files changed, 98 insertions(+)
The alarm is a fully general one-shot time comparator, which will be
usable under Linux as a hrtimer source. It's much more flexible than
the RTC source available on real hardware.
The wall clock allows the guest access to the host timekeeping. Much
like the KVM wall clock source for other guest
Signed-off-by: Richard Henderson
---
.gitmodules |3 +++
Makefile|3 ++-
configure |8 +++-
pc-bios/README |3 +++
pc-bios/palcode-clipper | Bin 0 -> 107565 bytes
roms/qemu-palcode |1 +
6 files changed, 16 inserti
Signed-off-by: Richard Henderson
---
target-alpha/cpu.h |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 50a8109..88281bb 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -357,7 +357,13 @@ enum {
static inl
This is a DP264 variant, SMP capable, no unusual hardware present.
The emulation does not currently include any PCI IOMMU code.
Hopefully the generic support for that can be merged to HEAD soon.
Signed-off-by: Richard Henderson
---
Makefile.target|1 +
hw/alpha_dp264.c | 170
Interrupts are disabled in PALmode, and when the PS IL is high enough.
Signed-off-by: Richard Henderson
---
cpu-exec.c | 28 +---
target-alpha/exec.h | 11 ++-
2 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
ind
In particular, SWPIPL is used quite a lot by the Linux kernel.
Doing this inline makes it significantly easier to step through
without the debugger getting confused by the mode switch.
Signed-off-by: Richard Henderson
---
target-alpha/translate.c | 141 --
Signed-off-by: Richard Henderson
---
target-alpha/helper.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 96b407b..bd3af38 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -220,14 +220,18 @@ st
On Tue, 2011-04-26 at 16:29 -0500, Anthony Liguori wrote:
> On 04/26/2011 11:47 AM, Lucas Meneghel Rodrigues wrote:
> > On Tue, 2011-04-26 at 17:58 +0300, Avi Kivity wrote:
> >> On 04/26/2011 05:41 PM, Chris Wright wrote:
> >>> - having basic common config could be useful
>
> Hi Lucas,
>
> Could
Read them via KVM_GET_SREGS in kvm_arch_get_registers(),
and display them in "info registers".
Also get CR and PID from the existing KVM_GET_REGS.
Signed-off-by: Scott Wood
---
hw/ppc.c | 12 +
monitor.c | 71 +++-
target-ppc/cpu.h
Am 28.04.2011 22:49, schrieb Anthony Liguori:
On 04/28/2011 03:02 PM, Stefan Weil wrote:
Commit 353ac78d495ef976242abd868f68d78420861c2c moved the files
without fixing the include paths. It used a modified CFLAGS
to add hw to the include search path, but this breaks builds
where the user wants t
On 04/21/2011 02:39 AM, Alexander Graf wrote:
> How exactly is this going to be used? Also, in the end I think that
> most devices should just go through a PCI specific interface that
> then calls the DMA helpers:
>
> pci_memory_rw(PCIDevice *d, ...)
>
> even if it's only as simple as calling
>
On 2011-04-28 20:51, Blue Swirl wrote:
> On Thu, Apr 28, 2011 at 5:24 PM, Ulrich Obergfell wrote:
>> 'target_get_irq_delivered' and 'target_reset_irq_delivered' contain
>> entry addresses of functions that are utilized by update_irq() to
>> detect coalesced interrupts. apic code loads these pointe
Wedding gownsOdett collectionMaggie sottero CollectionMoonlight CollectionDavinci CollectionAmsale CollectionEssense CollectionForever Yours CollectionElie Saab CollectionUlla-Maija CollectionsMorilee CollectionImpression CollectionBall Gowns CollectionProm dress CollectionEvening dresses Collectio
On 28 April 2011 20:44, Anthony Liguori wrote:
> Just to be clear, at least for x86 CPU emulation, QEMU does not attempt to
> achieve perfect fidelity
Also true for ARM CPU emulation. The theoretical aim there as far
as I'm concerned is architectural correctness -- in other words we
should be a v
On 28 April 2011 21:49, Anthony Liguori wrote:
> On 04/28/2011 03:02 PM, Stefan Weil wrote:
>> -$(addprefix 9pfs/, $(9pfs-nested-y)): CFLAGS += -I$(SRC_PATH)/hw/
>
> Wouldn't it be more straight forward to just do QEMU_CFLAGS +=?
There aren't any other source files in QEMU which have custom
incl
G'day all,
This patch makes qemu-img properly consider the contents of the output
backing file when performing a convert operation. All things considered
it would also perform similar to rebase, where you could specify a
completely different backing file and it would just de-dup.
I've poked
When we're trying to get a newly registered phys memory client updated
with the current page mappings, we end up passing the region offset
(a ram_addr_t) as the start address rather than the actual guest
physical memory address (target_phys_addr_t). If your guest has less
than 3.5G of memory, thes
>From fbd2b81503b1f55368b83903ded723f60de8aea7 Mon Sep 17 00:00:00 2001
From: Ehsan-ul-Haq, Abdul Qadeer, Abdul Waheed, Khansa Butt <
kha...@kics.edu.pk>
Date: Fri, 29 Apr 2011 11:17:56 +0500
Subject: [PATCH 1/3] linux-user:Support for MIPS64 user mode emulation in
QEMU
Signed-off-by: Khansa Butt
>From 1ab1973118d9e676fcaaf234d153c8c7056aa82a Mon Sep 17 00:00:00 2001
From: Ehsan-ul-Haq, Abdul Qadeer, Abdul Waheed, Khansa Butt <
kha...@kics.edu.pk>
Date: Fri, 29 Apr 2011 10:52:38 +0500
Subject: [PATCH 3/3] linux-user:Signal handling for MIPS64
Signed-off-by: Khansa Butt
---
linux-user/si
>From 52cca3fab46f65b493cd21096389ee459279cbb2 Mon Sep 17 00:00:00 2001
From: Ehsan-ul-Haq, Abdul Qadeer, Abdul Waheed, Khansa Butt <
kha...@kics.edu.pk>
Date: Fri, 29 Apr 2011 11:48:54 +0500
Subject: [PATCH 1/3] linux-user:Support for MIPS64 user mode emulation in
QEMU
Signed-off-by: Khansa Butt
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