On Thu, 16 Jan 2020 at 02:01, Benjamin Herrenschmidt
wrote:
>
> On Wed, 2020-01-15 at 13:32 +, Peter Maydell wrote:
> > On Wed, 15 Jan 2020 at 01:17, Benjamin Herrenschmidt
> > wrote:
> > > On Tue, 2020-01-14 at 09:59 +, Peter Maydell wrote:
> > > > Note that semihosting is not a "here's
> On 16 Jan 2020, at 04:04, Benjamin Herrenschmidt
> wrote:
>
> ... I agree, which is also why I want to use the same interface for
> powerpc, it will simply make life easier for everybody.
I don't know the current implementation in QEMU, but I suggest you also take a
look at the current A
On Wed, 2020-01-15 at 12:01 +, Alex Bennée wrote:
>
> > There seem to be some linux-user stuff in there, I'm mostly considering
> > whatever ARM does today but we can certainly extend later.
>
> Depends on if it is to be used. AFAIK the main users of arm linux user
> are compiler test cases f
On Thu, 2020-01-16 at 00:02 +0200, Liviu Ionescu wrote:
> > ... they did have the opportunity to do better, and did not.
>
> I don't know why you present Arm semihosting as a disaster. It is not
> perfect, but it is functional, and common unit tests use only a small
> subset of the calls.
>
> And
On Wed, 2020-01-15 at 13:32 +, Peter Maydell wrote:
> On Wed, 15 Jan 2020 at 01:17, Benjamin Herrenschmidt
> wrote:
> > On Tue, 2020-01-14 at 09:59 +, Peter Maydell wrote:
> > > Note that semihosting is not a "here's a handy QEMU feature"
> > > thing. It's an architecture-specific API and
> On 15 Jan 2020, at 23:28, Richard Henderson
> wrote:
>
> For risc-v, the odd nop-full semi-hosting call sequence
That unfortunate call sequence was the least worst compromise that the RISC-V
design team could agree on. :-(
The actual problem was that the RISC-V instruction set has a sing
On 1/15/20 2:01 AM, Alex Bennée wrote:
> Hmm, I'm not so sure. QEMU tries to emulate real HW although I
> appreciate that is a somewhat loose definition once you get to things
> like -M virt and other such SW like abstractions. Is semihosting even
> going to be a thing on real RiscV/Power silicon?
On Wed, 15 Jan 2020 at 01:17, Benjamin Herrenschmidt
wrote:
> On Tue, 2020-01-14 at 09:59 +, Peter Maydell wrote:
> > Note that semihosting is not a "here's a handy QEMU feature"
> > thing. It's an architecture-specific API and ABI, which should
> > be defined somewhere in a standard external
> On 15 Jan 2020, at 14:01, Alex Bennée wrote:
>
> ... AFAIK the main users of arm linux user
> are compiler test cases for M-profile CPUs.
I confirm, generally unit tests.
But not necessarily, I used QEMU as the main development platform for the
Cortex-M port of µOS++, a C/C++ framework/R
Benjamin Herrenschmidt writes:
> On Tue, 2020-01-14 at 09:51 +, Alex Bennée wrote:
>> > Well, one of the LCA talks wasn't that interesting so I started
>> > doing
>> > it and am almost done :-)
>> >
>> > I'll look at doing something for arm, riscv and ppc and send
>> > patches
>> > once I
On Tue, 2020-01-14 at 09:59 +, Peter Maydell wrote:
> Note that semihosting is not a "here's a handy QEMU feature"
> thing. It's an architecture-specific API and ABI, which should
> be defined somewhere in a standard external to QEMU.
There is no such standard for powerpc today that I know of.
On Tue, 2020-01-14 at 09:51 +, Alex Bennée wrote:
> > Well, one of the LCA talks wasn't that interesting so I started
> > doing
> > it and am almost done :-)
> >
> > I'll look at doing something for arm, riscv and ppc and send
> > patches
> > once I get it working.
>
> Cool. Are you consideri
On Tue, 14 Jan 2020 at 06:29, Benjamin Herrenschmidt
wrote:
>
> Hi Folks !
>
> So I started "porting" over (read: copying) the arm semihosting code to
> ppc to mimmic what Keith did for risv (mostly for picolibc support).
>
> I noticed that the bulk of arm-semi.c (or riscv-semi.c) is trivially
> m
Benjamin Herrenschmidt writes:
> On Tue, 2020-01-14 at 09:32 +0200, Liviu Ionescu wrote:
>> > On 14 Jan 2020, at 08:25, Benjamin Herrenschmidt <
>> > b...@kernel.crashing.org> wrote:
>> >
>> > I noticed that the bulk of arm-semi.c (or riscv-semi.c) is
>> > trivially
>> > made completely generi
On Tue, 2020-01-14 at 09:32 +0200, Liviu Ionescu wrote:
> > On 14 Jan 2020, at 08:25, Benjamin Herrenschmidt <
> > b...@kernel.crashing.org> wrote:
> >
> > I noticed that the bulk of arm-semi.c (or riscv-semi.c) is
> > trivially
> > made completely generic by doing a couple of changes:
>
> Last y
> On 14 Jan 2020, at 08:25, Benjamin Herrenschmidt
> wrote:
>
> I noticed that the bulk of arm-semi.c (or riscv-semi.c) is trivially
> made completely generic by doing a couple of changes:
Last year I did a similar exercise in OpenOCD, where I took the Arm semihosting
code from the Arm spec
Hi Folks !
So I started "porting" over (read: copying) the arm semihosting code to
ppc to mimmic what Keith did for risv (mostly for picolibc support).
I noticed that the bulk of arm-semi.c (or riscv-semi.c) is trivially
made completely generic by doing a couple of changes:
- Make most function
17 matches
Mail list logo
