On Fri, 22 Mar 2019 at 16:40, Andrew Jones wrote:
> Hi TCG GIC developers,
>
> There are a few gicv2 test failures when running over TCG that we don't
> see when running over KVM. I don't believe these are regressions - I'm
> pretty sure they've been failing since Andre first introduced the tests.
Peter Maydell writes:
> On 12 July 2017 at 12:39, Jaroslaw Pelczar wrote:
>> Problem manifests itself when we handle the following sequence:
>>
>> 1. 64-bit Secure EL3 returns to 32-bit Secure EL1
>> 2. 32-bit Secure EL1 performs SMC call to 64-bit Secure EL3
>> 3. 64-bit Secure EL3 performs re
On 12 July 2017 at 12:39, Jaroslaw Pelczar wrote:
> Problem manifests itself when we handle the following sequence:
>
> 1. 64-bit Secure EL3 returns to 32-bit Secure EL1
> 2. 32-bit Secure EL1 performs SMC call to 64-bit Secure EL3
> 3. 64-bit Secure EL3 performs return ERET to 32-bit Secure EL1]
On 23 December 2013 08:13, Dennis Lan (dlan) wrote:
> On Mon, Dec 23, 2013 at 4:09 PM, Dennis Lan (dlan)
> wrote:
>>The problem is that there are still a few insn implementations
>> missing in matz's repo,
>> so I try to implement them myself[4]. I'm not familiar with qemu tcg,
>> so those pa
On Mon, Dec 23, 2013 at 4:09 PM, Dennis Lan (dlan)
wrote:
> Hi Folks:
>I'm writing this letter mainly for help and suggestion.
>I'm using qemu-aarch64[1] from matz's repository, which actually is
> not official.
> with matz's repo, and trying to build a small gentoo rootfs, I
> encountered
On 5 April 2013 07:59, Japheth Lim wrote:
> I have written a patch for the ARM TCG that prints the program
> counter and any load/store addresses for every instruction that's
> run. We use this feature to get detailed traces of our ARM programs.
>
> We can tidy up and submit the patch; is there an
On 3 July 2012 01:53, David Munday wrote:
> I'm developing with QEMU to run arm binaries. Right now I can't tell if the
> Thumb32 vmul.f64 instruction encoded(ee25 7b07) is executing or not. I would
> like to see where QEMU increments the PC so as to see if this instruction is
> getting skipped or
On 11 February 2011 09:52, Santosh wrote:
> Will QEMU arm target support Cortex-M4 FPU, ARMv7-M Floating-Point
> Extension FPv4?
> I don't see cortex-m4 in the cpu list. Is there any plan to support it?
Linaro's focus is on the ARM A profile, so we (I) don't have any
current plans to add M4 suppo
