Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Gerd Hoffmann
> > > My laptop has it reserved in a \_SB\PCI0\LPC\SIO device instead: > > > > > > Device (LPC) > > > { > > > Name (_ADR, 0x001F) // _ADR: Address > > > Name (_S3D, 0x03) // _S3D: S3 Device State > > > Name (RID, 0x00) >

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Igor Mammedov
On Mon, 20 Jan 2014 17:51:47 +0200 "Michael S. Tsirkin" wrote: > On Mon, Jan 20, 2014 at 04:36:57PM +0100, Gerd Hoffmann wrote: > > > 4.1.2. > > > MCFG Table Description > > > > > > > > > ... > > > > > > If the operating system does not natively comprehend reserving the MMCFG > > > region, th

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Michael S. Tsirkin
On Mon, Jan 20, 2014 at 04:36:57PM +0100, Gerd Hoffmann wrote: > > 4.1.2. > > MCFG Table Description > > > > > > ... > > > > If the operating system does not natively comprehend reserving the MMCFG > > region, the MMCFG region must be reserved by firmware. The address range > > reported in the

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Gerd Hoffmann
> 4.1.2. > MCFG Table Description > > > ... > > If the operating system does not natively comprehend reserving the MMCFG > region, the MMCFG region must be reserved by firmware. The address range > reported in the MCFG table or by _CBA method (see Section 4.1.3) must be > reserved by declaring

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Michael S. Tsirkin
On Mon, Jan 20, 2014 at 03:01:50PM +0100, Gerd Hoffmann wrote: > On Mo, 2014-01-20 at 15:59 +0200, Michael S. Tsirkin wrote: > > On Mon, Jan 20, 2014 at 01:58:45PM +0100, Gerd Hoffmann wrote: > > > On Mo, 2014-01-20 at 13:23 +0200, Michael S. Tsirkin wrote: > > > > On Tue, Dec 17, 2013 at 06:56:06P

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Gerd Hoffmann
On Mo, 2014-01-20 at 15:59 +0200, Michael S. Tsirkin wrote: > On Mon, Jan 20, 2014 at 01:58:45PM +0100, Gerd Hoffmann wrote: > > On Mo, 2014-01-20 at 13:23 +0200, Michael S. Tsirkin wrote: > > > On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > > > > > I merged your patch but split i

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Michael S. Tsirkin
On Mon, Jan 20, 2014 at 01:58:45PM +0100, Gerd Hoffmann wrote: > On Mo, 2014-01-20 at 13:23 +0200, Michael S. Tsirkin wrote: > > On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > > > > I merged your patch but split it: q35 is separate and piix > > > > is separate. Would you like me t

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Gerd Hoffmann
On Mo, 2014-01-20 at 13:23 +0200, Michael S. Tsirkin wrote: > On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > > > I merged your patch but split it: q35 is separate and piix > > > is separate. Would you like me to drop the q35 part then? > > > > If you are fine with q35 having only

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2014-01-20 Thread Michael S. Tsirkin
On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > > I merged your patch but split it: q35 is separate and piix > > is separate. Would you like me to drop the q35 part then? > > If you are fine with q35 having only 2G lowmem keep it. It's safe. > > We can sort the mmconfig setup af

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-18 Thread Michael S. Tsirkin
On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > Hi, > > > > We need to change the way we reserve the mmconfig space though. > > > > > > Currently it is marked reserved in the e820 table. Having that overlap > > > with the _CRS region makes windows quite unhappy, we tried tha

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-17 Thread Gerd Hoffmann
Hi, > > We need to change the way we reserve the mmconfig space though. > > > > Currently it is marked reserved in the e820 table. Having that overlap > > with the _CRS region makes windows quite unhappy, we tried that > > recently. > > Yes this also contradicts the spec, see below. > > >

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-17 Thread Michael S. Tsirkin
On Tue, Dec 17, 2013 at 11:54:46AM +0100, Gerd Hoffmann wrote: > Hi, > > > > Problem is that the firmware places the xbar @ 0xb00. > > > Hardcoded, assuming qemu will not map ram above 0xb000. > > > > Can't bios figure out the size of memory below 4G from fwcfg? > > I refer to 7db16f248

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-17 Thread Gerd Hoffmann
Hi, > > Problem is that the firmware places the xbar @ 0xb00. > > Hardcoded, assuming qemu will not map ram above 0xb000. > > Can't bios figure out the size of memory below 4G from fwcfg? > I refer to 7db16f2480db5e246d34d0c453cff4f58549df0e specifically. It can, but it doesn't. Addit

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-16 Thread Michael S. Tsirkin
On Mon, Dec 16, 2013 at 02:46:17PM +0100, Gerd Hoffmann wrote: > On Mo, 2013-12-16 at 13:54 +0200, Michael S. Tsirkin wrote: > > On Mon, Dec 16, 2013 at 10:11:28AM +0100, Gerd Hoffmann wrote: > > > Map 3G (i440fx) or 2G (q35) of memory below 4G, so the RAM pieces > > > are nicely aligned to gigabyt

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-16 Thread Gerd Hoffmann
On Mo, 2013-12-16 at 13:54 +0200, Michael S. Tsirkin wrote: > On Mon, Dec 16, 2013 at 10:11:28AM +0100, Gerd Hoffmann wrote: > > Map 3G (i440fx) or 2G (q35) of memory below 4G, so the RAM pieces > > are nicely aligned to gigabyte borders. > > > > Keep old memory layout for (a) old machine types an

Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

2013-12-16 Thread Michael S. Tsirkin
On Mon, Dec 16, 2013 at 10:11:28AM +0100, Gerd Hoffmann wrote: > Map 3G (i440fx) or 2G (q35) of memory below 4G, so the RAM pieces > are nicely aligned to gigabyte borders. > > Keep old memory layout for (a) old machine types and (b) in case all > memory fits below 4G and thus we don't have to spl