> 4.1.2.
> MCFG Table Description
>
>
> ...
>
> If the operating system does not natively comprehend reserving the MMCFG
> region, the MMCFG region must be reserved by firmware. The address range
> reported in the MCFG table or by _CBA method (see Section 4.1.3) must be
> reserved by declaring a motherboard resource.
We don't do this today.
> For most systems, the
> motherboard resource would appear at the root of the ACPI namespace
> (under \_SB) in a node with a _HID of EISAID (PNP0C02), and the
> resources in this case should not be claimed in the root PCI bus’s _CRS.
Which I read as _in case it is at the root of the apci namespace_ it
should not be claimed in PCI0._CRS. Which makes sense.
My laptop has it reserved in a \_SB\PCI0\LPC\SIO device instead:
Device (LPC)
{
Name (_ADR, 0x001F0000) // _ADR: Address
Name (_S3D, 0x03) // _S3D: S3 Device State
Name (RID, 0x00)
Device (SIO)
{
Name (_HID, EisaId ("PNP0C02"))
Name (_UID, 0x00) // _UID: Unique ID
Name (SCRS, ResourceTemplate ()
{
[ ... ]
Memory32Fixed (ReadWrite,
0xF8000000, // Address Base
0x04000000, // Address Length
)
[ ... ]
cheers,
Gerd
