On Sun, Nov 5, 2017 at 3:43 PM, Max Filippov wrote:
>> however I think this can be simplified in 1 instr on target supporting
>> deposit32:
>>
>> tcg_gen_deposit_i32(cpu_R[arg[0]], cpu_R[arg[1]], cpu_R[arg[0]], 16, 16)
>
> arg[1] is an immediate argument, not a register index, so probably not.
Hi Philippe,
On Sun, Nov 5, 2017 at 7:23 AM, Philippe Mathieu-Daudé wrote:
>> +static void translate_const16(DisasContext *dc, const uint32_t arg[],
>> + const uint32_t par[])
>> +{
>> +if (gen_window_check1(dc, arg[0])) {
>> +TCGv_i32 v = tcg_temp_new_i32(
Hi Max,
On Sat, Nov 4, 2017 at 12:45 AM, Max Filippov wrote:
> const16 is an opcode that shifts 16 lower bits of an address register
> to the 16 upper bits and puts its immediate operand into the lower 16
> bits. It is not controlled by an Xtensa option and doesn't have a fixed
> opcode.
>
> Sign
