On 25 March 2017 at 02:22, Wangjintang wrote:
> the patch regard the prefetch as load instruction, at the same time
> don't affect rm/rt register. Only the PRFM instruction been emitted to
> intermediate code and do a really load, then we can get the memory
> address relative to the prefetch instr
Hi Peter,
More detail illustration at below.
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Friday, March 24, 2017 6:06 PM
> To: Wangjintang
> Cc: Pranith Kumar; Shlomo Pongratz (A); Wanghaibin (Benjamin); qemu-arm;
> qemu-devel; Ori Chalak (A)
Hi Pranith,
Thanks for your reply. patch as below, new added code default is off,
please review.
The major thinking is about translate Armv8's prefetch instruction into
intermediate code, at the same time don't effect the rm/rn register.
diff --git a/translate-a64.c b/translate-a64.
On 24 March 2017 at 06:14, Wangjintang wrote:
> Hi Pranith,
>
> Thanks for your reply. patch as below, new added code default is off,
> please review.
> The major thinking is about translate Armv8's prefetch instruction into
> intermediate code, at the same time don't effect the rm/rn re
