Emilio G. Cota writes:
> On Fri, Nov 11, 2016 at 18:17:05 -0500, Peter Xu wrote:
>> I also tried to test with exactly the same build parameters with the
>> previous commit of above (09cd058a2c, "intel_iommu: get rid of {0}
>> initializers"), it has the same problem (TCG version cannot boot gues
On Fri, Nov 11, 2016 at 18:17:05 -0500, Peter Xu wrote:
> > This commit (which sits between 2.6 and 2.7) doesn't let me boot a
> > buildroot-generated x86_64 image when QEMU is configured with
> > --with-coroutine=gthread (it deadlocks on the BQL shortly after
> > the framebuffer comes up.)
> >
>
Hi, Emilio,
On Fri, Nov 11, 2016 at 12:18:04PM -0500, Emilio G. Cota wrote:
> On Tue, Jul 19, 2016 at 01:44:41 +0300, Michael S. Tsirkin wrote:
> > From: Peter Xu
> >
> > This patch translates all IOAPIC interrupts into MSI ones. One pseudo
> > ioapic address space is added to transfer the MSI m
On Fri, Nov 11, 2016 at 12:18:04 -0500, Emilio G. Cota wrote:
> This commit (which sits between 2.6 and 2.7)
Forgot to add the commit id -- cb135f59b8059c3a3
E.
On Tue, Jul 19, 2016 at 01:44:41 +0300, Michael S. Tsirkin wrote:
> From: Peter Xu
>
> This patch translates all IOAPIC interrupts into MSI ones. One pseudo
> ioapic address space is added to transfer the MSI message. By default,
> it will be system memory address space. When IR is enabled, it wi
From: Peter Xu
This patch translates all IOAPIC interrupts into MSI ones. One pseudo
ioapic address space is added to transfer the MSI message. By default,
it will be system memory address space. When IR is enabled, it will be
IOMMU address space.
Currently, only emulated IOAPIC is supported.
I
