Re: [Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-15 Thread Igor Mammedov
On Mon, 15 Jun 2015 11:13:52 +0300 Pavel Fedin wrote: > Hello! > > > For machine models to specify topology we would need a property > > or properties on the QOM object for the machine model to set, > > On which object? There's no single object inside a machine model. Of course > you can exp

Re: [Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-15 Thread Pavel Fedin
Hello! > For machine models to specify topology we would need a property > or properties on the QOM object for the machine model to set, On which object? There's no single object inside a machine model. Of course you can expose MP IDs of CPU objects as properties and set them, but isn't it mo

Re: [Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-15 Thread Peter Maydell
On 15 June 2015 at 08:13, Pavel Fedin wrote: > Hello! > >> > +int arm_cpus_per_cluster = 8; >> >> This doesn't need to be global, it doesn't need to be exposed in >> a header file, and it definitely doesn't need to be non-constant. >> I suggest >> #define ARM_CPUS_PER_CLUSTER 8 > > It was a #def

Re: [Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-15 Thread Pavel Fedin
Hello! > > +int arm_cpus_per_cluster = 8; > > This doesn't need to be global, it doesn't need to be exposed in > a header file, and it definitely doesn't need to be non-constant. > I suggest > #define ARM_CPUS_PER_CLUSTER 8 It was a #define in v3, but i decided to change this in order to allow

Re: [Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-12 Thread Peter Maydell
On 8 June 2015 at 13:28, Pavel Fedin wrote: > +extern int arm_cpus_per_cluster; > + > #define TYPE_AARCH64_CPU "aarch64-cpu" > #define AARCH64_CPU_CLASS(klass) \ > OBJECT_CLASS_CHECK(AArch64CPUClass, (klass), TYPE_AARCH64_CPU) > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > index 4a888

[Qemu-devel] [PATCH v4] Use Aff1 with mpidr

2015-06-08 Thread Pavel Fedin
In order to support up to 128 cores with GIC-500 (GICv3 implementation) affinity1 must be used. GIC-500 support up to 32 clusters with up to 8 cores in a cluster. So for example, if one wishes to have 16 cores, the options are: 2 clusters of 8 cores each, 4 clusters with 4 cores each. It is possibl