Re: [Qemu-devel] [PATCH v3 08/15] target-mips: add BadInstr and BadInstrP support

2014-11-01 Thread Leon Alrae
Hi Yongbok, On 29/10/14 13:55, Yongbok Kim wrote: > On 24/10/2014 13:42, Leon Alrae wrote: >> case EXCP_TLBRI: >> cause = 19; >> +update_badinstr = 1; >> goto set_EPC; >> case EXCP_TLBXI: >> cause = 20; > > TLBXI requires updating the register. T

Re: [Qemu-devel] [PATCH v3 08/15] target-mips: add BadInstr and BadInstrP support

2014-10-29 Thread Yongbok Kim
On 24/10/2014 13:42, Leon Alrae wrote: BadInstr Register (CP0 Register 8, Select 1) The BadInstr register is a read-only register that capture the most recent instruction which caused an exception. BadInstrP Register (CP0 Register 8, Select 2) The BadInstrP register contains the prior branch ins

[Qemu-devel] [PATCH v3 08/15] target-mips: add BadInstr and BadInstrP support

2014-10-24 Thread Leon Alrae
BadInstr Register (CP0 Register 8, Select 1) The BadInstr register is a read-only register that capture the most recent instruction which caused an exception. BadInstrP Register (CP0 Register 8, Select 2) The BadInstrP register contains the prior branch instruction, when the faulting instruction i