Re: [Qemu-devel] [PATCH v2] target-i386: present virtual L3 cache info for vcpus

2016-09-01 Thread Longpeng (Mike)
Hi Michael, On 2016/9/1 21:27, Michael S. Tsirkin wrote: > On Thu, Sep 01, 2016 at 02:58:05PM +0800, l00371263 wrote: >> From: "Longpeng(Mike)" >> >> Some software algorithms are based on the hardware's cache info, for example, >> for x86 linux kernel, when cpu1 want to wakeup a task on cpu2, cp

Re: [Qemu-devel] [PATCH v2] target-i386: present virtual L3 cache info for vcpus

2016-09-01 Thread Michael S. Tsirkin
On Thu, Sep 01, 2016 at 02:58:05PM +0800, l00371263 wrote: > From: "Longpeng(Mike)" > > Some software algorithms are based on the hardware's cache info, for example, > for x86 linux kernel, when cpu1 want to wakeup a task on cpu2, cpu1 will > trigger > a resched IPI and told cpu2 to do the wakeu

[Qemu-devel] [PATCH v2] target-i386: present virtual L3 cache info for vcpus

2016-09-01 Thread l00371263
From: "Longpeng(Mike)" Some software algorithms are based on the hardware's cache info, for example, for x86 linux kernel, when cpu1 want to wakeup a task on cpu2, cpu1 will trigger a resched IPI and told cpu2 to do the wakeup if they don't share low level cache. Oppositely, cpu1 will access cpu2