On 6 February 2016 at 18:42, Sergey Fedorov wrote:
> On 03.02.2016 16:38, Peter Maydell wrote:
>> --- a/target-arm/helper.c
>> +++ b/target-arm/helper.c
>> @@ -364,6 +364,23 @@ static CPAccessResult
>> access_el3_aa32ns_aa64any(CPUARMState *env,
>> return CP_ACCESS_OK;
>> }
>>
>> +/* Some s
On 03.02.2016 16:38, Peter Maydell wrote:
> Implement the MDCR_EL3 register (which is SDCR for AArch32).
> For the moment we implement it as reads-as-written.
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/cpu.h| 1 +
> target-arm/helper.c | 24
> 2 files change
On Wed, Feb 03, 2016 at 01:38:36PM +, Peter Maydell wrote:
> Implement the MDCR_EL3 register (which is SDCR for AArch32).
> For the moment we implement it as reads-as-written.
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/cpu.h| 1 +
> target-arm/helper.c | 24
On 5 February 2016 at 11:13, Alex Bennée wrote:
> Peter Maydell writes:
>> Implement the MDCR_EL3 register (which is SDCR for AArch32).
>> For the moment we implement it as reads-as-written.
>>
>> Signed-off-by: Peter Maydell
>> +/* Some secure-only AArch32 registers trap to EL3 if used from
>>
Peter Maydell writes:
> Implement the MDCR_EL3 register (which is SDCR for AArch32).
> For the moment we implement it as reads-as-written.
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/cpu.h| 1 +
> target-arm/helper.c | 24
> 2 files changed, 25 insertions(
Implement the MDCR_EL3 register (which is SDCR for AArch32).
For the moment we implement it as reads-as-written.
Signed-off-by: Peter Maydell
---
target-arm/cpu.h| 1 +
target-arm/helper.c | 24
2 files changed, 25 insertions(+)
diff --git a/target-arm/cpu.h b/targ
