Your code can change MSR[IP]; there is also a strapping pin that is
sampled on HRESET (and copied to MSR[IP]).
Wouldn't this mean that when the reset is issued by hardware, MSR[IP]
is always 1 (to boot from ROM) but with software reset it can take
software defined values?
Yes, that is what i
On 4/26/10, Segher Boessenkool wrote:
> >
> > > It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3.
> > > Clearly, the vector offset is 0x100 and the exception prefix can be 0 or
> > > 0xFFF0, depending of the MSR[IP] bit.
> > >
> > > So, yes, I'm sure the value of hreset_vec
It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3.
Clearly, the vector offset is 0x100 and the exception prefix can
be 0 or
0xFFF0, depending of the MSR[IP] bit.
So, yes, I'm sure the value of hreset_vector must be 0x100.
But hreset_excp_prefix can change. It could be an
970 may be a bad example in that it can't actually bring itself up --
it requires an external controller to configure it at power-up. So
whatever the external controller programs into the PC is where it
starts.
970 always starts at HIOR|0x00100.
I don't see any mention of an initial PC value i
On Wed, Apr 21, 2010 at 5:36 AM, Alexander Graf wrote:
> Thomas Monjalon wrote:
>> Alexander Graf wrote:
>>
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP
Alexander Graf wrote:
> Thomas Monjalon wrote:
> > I'm slowly writing support for the WindRiver board SBC8349E.
> > For the moment, I send patches for things I'm sure.
>
> Nice. What kind of firmware does that use?
Hmm... I don't know. I don't have such a board.
I'm testing by running a wrapped Li
Thomas Monjalon wrote:
> Alexander Graf wrote:
>
>>> --- a/target-ppc/translate_init.c
>>> +++ b/target-ppc/translate_init.c
>>> @@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env)
>>> env->excp_vectors[POWERPC_EXCP_SMI] = 0x1400;
>>> env->hreset_excp_prefix = 0x
Alexander Graf wrote:
> > --- a/target-ppc/translate_init.c
> > +++ b/target-ppc/translate_init.c
> > @@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env)
> > env->excp_vectors[POWERPC_EXCP_SMI] = 0x1400;
> > env->hreset_excp_prefix = 0xUL;
> > /* Hardwar
On 21.04.2010, at 11:21, Thomas Monjalon wrote:
> From: Thomas Monjalon
>
> The vectors are listed
>- in the chapter 1.3.3.2 (Implementation-Specific Interrupt Model)
> of the e300 datasheet [e300CORERM] and
>- in the chapter 3.5.2 (PowerPC 603 Microprocessor Exception Model)
>
From: Thomas Monjalon
The vectors are listed
- in the chapter 1.3.3.2 (Implementation-Specific Interrupt Model)
of the e300 datasheet [e300CORERM] and
- in the chapter 3.5.2 (PowerPC 603 Microprocessor Exception Model)
of the MPC603 datasheet.
As e300 inherits from MPC603, in
10 matches
Mail list logo
