Alexander Graf wrote: > > --- a/target-ppc/translate_init.c > > +++ b/target-ppc/translate_init.c > > @@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env) > > env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; > > env->hreset_excp_prefix = 0x00000000UL; > > /* Hardware reset vector */ > > - env->hreset_vector = 0xFFFFFFFCUL; > > + env->hreset_vector = 0x00000100UL; > > Are you 100% sure this is correct? IIRC the reset vector is dictated by the > CPU initialization sequence, so there's no hardwired value here really.
It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3. Clearly, the vector offset is 0x100 and the exception prefix can be 0 or 0xFFF00000, depending of the MSR[IP] bit. So, yes, I'm sure the value of hreset_vector must be 0x100. But hreset_excp_prefix can change. It could be another patch. About the prefix initialization, the datasheet says it is "determined by MSR[IP]". and is "determined by the state of the msrip signal". But I don't understand what is the msrip signal and how MSR[IP] is changed (is it related to msrip ?). Do you have an explanation for this part ? > Btw - what do you use to test your patches? I'm slowly writing support for the WindRiver board SBC8349E. For the moment, I send patches for things I'm sure. Thanks for the review -- Thomas
