Hi Richard,
On Tue, Feb 09, 2016 at 04:50:52PM +, James Hogan wrote:
> > @@ -589,6 +608,50 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
> > }
> > if (TCG_TARGET_REG_BITS == 32 || arg == (int32_t)arg) {
> > tcg_out_opc_imm(s, OPC_LUI, ret, TCG_REG_ZERO, arg >> 16)
On 02/10/2016 03:50 AM, James Hogan wrote:
I think ret and 0 are the wrong way around here. You're putting 0 in rs
(the destination register), which causes a seg fault.
OUT: [size=56]
0xfff30b0064: lw s1,-8(s0)
0xfff30b0068: bnezalc zero,s1,0xfff30b0090
0xfff30b006c: nop
0xfff30b0070:
On 02/10/2016 03:50 AM, James Hogan wrote:
+} else if ((disp & ~(tcg_target_long)0x)
+ == sextract32(disp, 16, 16) * 0x1) {
+tcg_out_opc_imm(s, OPC_ALUIPC, ret, 0, disp >> 16);
I think ret and 0 are the wrong way around here. You're putting 0 in rs
Hi Richard,
On Tue, Feb 09, 2016 at 09:39:59PM +1100, Richard Henderson wrote:
> The DAHI and DATI instructions can eliminate two insns
> off the pre-r6 path.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/mips/tcg-target.c | 63
> +++
> 1 file
The DAHI and DATI instructions can eliminate two insns
off the pre-r6 path.
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.c | 63 +++
1 file changed, 63 insertions(+)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 97f9
