On 01/12/2018 03:57 AM, Peter Maydell wrote:
> I asked on #qemu-devel for some review from people who are more
> familiar with Python than I am. One of the suggestions (from
> Marc-André Lureau) was to run pycodestyle on this and fix the
> (mostly coding style nits) reported by it. (pycodestyle may
On 18 December 2017 at 17:45, Richard Henderson
wrote:
> To be used to decode ARM SVE, but could be used for any 32-bit RISC.
> It would need additional work to extend to insn sizes other than 32-bit.
>
> Signed-off-by: Richard Henderson
I have some comments here (mostly about the syntax, error
On 11 January 2018 at 19:10, Richard Henderson
wrote:
> On 01/11/2018 10:06 AM, Peter Maydell wrote:
>> On 18 December 2017 at 17:45, Richard Henderson
>> wrote:
>>> To be used to decode ARM SVE, but could be used for any 32-bit RISC.
>>> It would need additional work to extend to insn sizes othe
On 01/11/2018 11:21 AM, Peter Maydell wrote:
> On 11 January 2018 at 19:10, Richard Henderson
> wrote:
>> On 01/11/2018 10:06 AM, Peter Maydell wrote:
>>> On 18 December 2017 at 17:45, Richard Henderson
>>> wrote:
>
+# Pattern examples:
+#
+# addl_r 01 . . 000
On 11 January 2018 at 19:10, Richard Henderson
wrote:
> On 01/11/2018 10:06 AM, Peter Maydell wrote:
>> On 18 December 2017 at 17:45, Richard Henderson
>> wrote:
>>> +# Pattern examples:
>>> +#
>>> +# addl_r 01 . . 000 . @opr
>>> +# addl_i 01 . .
On 01/11/2018 10:06 AM, Peter Maydell wrote:
> On 18 December 2017 at 17:45, Richard Henderson
> wrote:
>> To be used to decode ARM SVE, but could be used for any 32-bit RISC.
>> It would need additional work to extend to insn sizes other than 32-bit.
>
> I guess we could make that extension with
On 18 December 2017 at 17:45, Richard Henderson
wrote:
> To be used to decode ARM SVE, but could be used for any 32-bit RISC.
> It would need additional work to extend to insn sizes other than 32-bit.
I guess we could make that extension without requiring all
existing pattern files to be updated,
To be used to decode ARM SVE, but could be used for any 32-bit RISC.
It would need additional work to extend to insn sizes other than 32-bit.
Signed-off-by: Richard Henderson
---
scripts/decodetree.py | 984 ++
1 file changed, 984 insertions(+)
cr
