Richard Henderson writes:
> On 09/05/2017 05:33 PM, Pranith Kumar wrote:
>>> This significantly degrades performance of alpha-softmmu.
>>> It spends about 25% of all cpu time in memset.
>>
>> What workload does it degrade for? I will try to reproduce and see
>> which memset is causing this.
>
>
On 09/05/2017 05:33 PM, Pranith Kumar wrote:
>> This significantly degrades performance of alpha-softmmu.
>> It spends about 25% of all cpu time in memset.
>
> What workload does it degrade for? I will try to reproduce and see
> which memset is causing this.
emerge --update --ask @world
which is
On Tue, Sep 5, 2017 at 5:50 PM, Richard Henderson wrote:
> On 08/29/2017 10:23 AM, Pranith Kumar wrote:
>> This patch increases the number of entries cached in the TLB. I went
>> over a few architectures to see if increasing it is problematic. Only
>> armv6 seems to have a limitation that only 8 b
On 08/29/2017 10:23 AM, Pranith Kumar wrote:
> This patch increases the number of entries cached in the TLB. I went
> over a few architectures to see if increasing it is problematic. Only
> armv6 seems to have a limitation that only 8 bits can be used for
> indexing these entries. For other archite
On 08/29/2017 10:23 AM, Pranith Kumar wrote:
> This patch increases the number of entries cached in the TLB. I went
> over a few architectures to see if increasing it is problematic. Only
> armv6 seems to have a limitation that only 8 bits can be used for
> indexing these entries. For other archite
This patch increases the number of entries cached in the TLB. I went
over a few architectures to see if increasing it is problematic. Only
armv6 seems to have a limitation that only 8 bits can be used for
indexing these entries. For other architectures, the number of TLB
entries is increased to a 4
