Peter Crosthwaite wrote:
>
> - I guess there is same reasy why you want to split the device state,
> it could be on the other series where I haven't read it though.
>>>
>>> So this is exactly what I have done in the SSI. Correct me if I am
>>> wrong but it is the same setup as PCI wh
- I guess there is same reasy why you want to split the device state,
it could be on the other series where I haven't read it though.
>>
>> So this is exactly what I have done in the SSI. Correct me if I am
>> wrong but it is the same setup as PCI where the VMSTATE_PCI_DEVICE
>> (V
Peter Crosthwaite wrote:
> On Tue, Aug 14, 2012 at 6:46 PM, Peter Maydell
> wrote:
>> On 14 August 2012 09:27, Juan Quintela wrote:
>>> "Peter A. G. Crosthwaite" wrote:
Hi All. PMM raised a query on a recent series of mine (the SSI series)
about
handling VMSD for devices which
On Tue, Aug 14, 2012 at 6:46 PM, Peter Maydell wrote:
> On 14 August 2012 09:27, Juan Quintela wrote:
>> "Peter A. G. Crosthwaite" wrote:
>>> Hi All. PMM raised a query on a recent series of mine (the SSI series) about
>>> handling VMSD for devices which define state at multiple levels of the QO
On 14 August 2012 09:27, Juan Quintela wrote:
> "Peter A. G. Crosthwaite" wrote:
>> Hi All. PMM raised a query on a recent series of mine (the SSI series) about
>> handling VMSD for devices which define state at multiple levels of the QOM
>> heirachy.
> - If you ask me, I would very much preffer
"Peter A. G. Crosthwaite" wrote:
> Hi All. PMM raised a query on a recent series of mine (the SSI series) about
> handling VMSD for devices which define state at multiple levels of the QOM
> heirachy. Rather than complicate the discussion over in my series im trying to
> start the discussion with
Hi All. PMM raised a query on a recent series of mine (the SSI series) about
handling VMSD for devices which define state at multiple levels of the QOM
heirachy. Rather than complicate the discussion over in my series im trying to
start the discussion with an existing subsystem - i2c. This patch is
