On 30/1/25 14:43, Cédric Le Goater wrote:
Print a warning if IOMMU address space width is smaller than the
physical address width. In this case, PCI peer-to-peer transactions on
BARs are not supported and failures of device MMIO regions are to be
expected.
This can occur with the 39-bit IOMMU ad
On 2/6/25 08:54, Gerd Hoffmann wrote:
Note that there is a 'guest-phys-bits' property for x86 CPUs, which is a
hint for the guest what the usable address width is. It was added
because there are cases where the guest simply can't figure that it is
not possible to use the full physical address sp
Hi,
> > Is there some simple way to figure what the iommu width is (inside the
> > guest)?
>
> If the guest firmware is exposing a DMAR table (VT-d), there's a host
> address width field in that table. Otherwise there are capability
> registers on the DRHD units that could be queried. AMD-Vi
> > Note that there is a 'guest-phys-bits' property for x86 CPUs, which is a
> > hint for the guest what the usable address width is. It was added
> > because there are cases where the guest simply can't figure that it is
> > not possible to use the full physical address space of the cpu. There
>
On Fri, 31 Jan 2025 14:23:58 +0100
Gerd Hoffmann wrote:
> On Fri, Jan 31, 2025 at 01:42:31PM +0100, Cédric Le Goater wrote:
> > + Gerd for insights regarding vIOMMU support in edk2.
> >
> > > > +static bool vfio_device_check_address_space(VFIODevice *vbasedev,
> > > > Error **errp)
> > > > +{
Hello Gerd,
On 1/31/25 14:23, Gerd Hoffmann wrote:
On Fri, Jan 31, 2025 at 01:42:31PM +0100, Cédric Le Goater wrote:
+ Gerd for insights regarding vIOMMU support in edk2.
+static bool vfio_device_check_address_space(VFIODevice *vbasedev, Error **errp)
+{
+uint32_t cpu_aw_bits = cpu_get_ph
On Fri, Jan 31, 2025 at 01:42:31PM +0100, Cédric Le Goater wrote:
> + Gerd for insights regarding vIOMMU support in edk2.
>
> > > +static bool vfio_device_check_address_space(VFIODevice *vbasedev, Error
> > > **errp)
> > > +{
> > > +uint32_t cpu_aw_bits = cpu_get_phys_bits(first_cpu);
> > > +
+ Gerd for insights regarding vIOMMU support in edk2.
On 1/30/25 19:58, Alex Williamson wrote:
On Thu, 30 Jan 2025 14:43:45 +0100
Cédric Le Goater wrote:
Print a warning if IOMMU address space width is smaller than the
physical address width. In this case, PCI peer-to-peer transactions on
BAR
On Thu, 30 Jan 2025 14:43:45 +0100
Cédric Le Goater wrote:
> Print a warning if IOMMU address space width is smaller than the
> physical address width. In this case, PCI peer-to-peer transactions on
> BARs are not supported and failures of device MMIO regions are to be
> expected.
>
> This can o
Print a warning if IOMMU address space width is smaller than the
physical address width. In this case, PCI peer-to-peer transactions on
BARs are not supported and failures of device MMIO regions are to be
expected.
This can occur with the 39-bit IOMMU address space width as found on
consumer grade
10 matches
Mail list logo
