Re: [PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization

2020-01-20 Thread Guenter Roeck
On 1/20/20 6:46 AM, Peter Maydell wrote: On Mon, 20 Jan 2020 at 14:30, Guenter Roeck wrote: On 1/20/20 5:35 AM, Peter Maydell wrote: As the comment in or-irq.h notes, we can safely simply bump the #define value without breaking anything if you need more input OR lines than 32. Yes, I notic

Re: [PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization

2020-01-20 Thread Peter Maydell
On Mon, 20 Jan 2020 at 14:30, Guenter Roeck wrote: > > On 1/20/20 5:35 AM, Peter Maydell wrote: > > As the comment in or-irq.h notes, we can safely simply bump the > > #define value without breaking anything if you need more input > > OR lines than 32. > > > > Yes, I noticed the comment, and I did

Re: [PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization

2020-01-20 Thread Guenter Roeck
On 1/20/20 5:35 AM, Peter Maydell wrote: On Sat, 18 Jan 2020 at 16:42, Guenter Roeck wrote: [ ... ] v2: Use interrupt combiner instead of connecting all events to a single interrupt. Limit number of events per DMA channel to 31 to meet qemu interrupt combiner limitations. [Not s

Re: [PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization

2020-01-20 Thread Peter Maydell
On Sat, 18 Jan 2020 at 16:42, Guenter Roeck wrote: > > First parameter to exynos4210_get_irq() is not the SPI port number, > but the interrupt group number. Interrupt groups are 20 for mdma > and 21 for pdma. Interrupts are not inverted. Controllers support 32 > events (pdma) or 31 events (mdma).

[PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization

2020-01-18 Thread Guenter Roeck
First parameter to exynos4210_get_irq() is not the SPI port number, but the interrupt group number. Interrupt groups are 20 for mdma and 21 for pdma. Interrupts are not inverted. Controllers support 32 events (pdma) or 31 events (mdma). Events must all be routed to a single interrupt line. Set othe