On 5/29/2025 12:13 AM, Paolo Bonzini wrote:
On 5/26/25 05:47, Xiaoyao Li wrote:
On 1/3/2025 4:48 PM, Xin Li (Intel) wrote:
@@ -1133,6 +1134,25 @@ FeatureWordInfo
feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = TCG_7_1_EAX_FEATURES,
},
+ [FEAT_7_1_ECX] = {
+
On 5/29/2025 3:13 PM, Paolo Bonzini wrote:
On 5/26/25 05:47, Xiaoyao Li wrote:
On 1/3/2025 4:48 PM, Xin Li (Intel) wrote:
The immediate form of MSR access instructions will use this new CPU
feature word.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 23 ++-
targ
On 5/26/25 05:47, Xiaoyao Li wrote:
On 1/3/2025 4:48 PM, Xin Li (Intel) wrote:
The immediate form of MSR access instructions will use this new CPU
feature word.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 23 ++-
target/i386/cpu.h | 1 +
2 files changed, 23 i
On 5/25/2025 8:47 PM, Xiaoyao Li wrote:
On 1/3/2025 4:48 PM, Xin Li (Intel) wrote:
@@ -1133,6 +1134,25 @@ FeatureWordInfo
feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = TCG_7_1_EAX_FEATURES,
},
+ [FEAT_7_1_ECX] = {
+ .type = CPUID_FEATURE_WORD,
+
On 1/3/2025 4:48 PM, Xin Li (Intel) wrote:
The immediate form of MSR access instructions will use this new CPU
feature word.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 23 ++-
target/i386/cpu.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --g
The immediate form of MSR access instructions will use this new CPU
feature word.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 23 ++-
target/i386/cpu.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
