Hi Richard,
On 9/20/21 23:11, Richard Henderson wrote:
On 9/20/21 1:04 AM, WANG Xuerui wrote:
+ case INDEX_op_bswap32_i32:
+ tcg_out_opc_revb_2h(s, a0, a1);
+ tcg_out_opc_rotri_w(s, a0, a0, 16);
+ break;
+ case INDEX_op_bswap64_i64:
+ tcg_out_opc_revb_d(s, a0,
On 9/20/21 8:11 AM, Richard Henderson wrote:
} else if (a2 & TCG_BSWAP_OZ) {
tcg_out_ext32u(s, a0, a0);
}
Actually,
if ((a2 & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ)
If the input is zero-extended, the output of revb_2w will also be zero-extended
alrea
On 9/20/21 1:04 AM, WANG Xuerui wrote:
+case INDEX_op_bswap32_i32:
+tcg_out_opc_revb_2h(s, a0, a1);
+tcg_out_opc_rotri_w(s, a0, a0, 16);
+break;
+case INDEX_op_bswap64_i64:
+tcg_out_opc_revb_d(s, a0, a1);
+break;
You're missing INDEX_op_bswap32_i6
Signed-off-by: WANG Xuerui
---
tcg/loongarch/tcg-target.c.inc | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tcg/loongarch/tcg-target.c.inc b/tcg/loongarch/tcg-target.c.inc
index e5356bdaf8..d617b833e5 100644
--- a/tcg/loongarch/tcg-target.c.inc
+++ b/tcg/loongarch/tcg-target.c.i
