Re: [PATCH 11/11] RISC-V: Add initial support for T-Head C906 and C910 CPUs

On Thu, Sep 8, 2022 at 10:56 AM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/8/22 09:23, Christoph Müllner wrote: > > > > > > On Thu, Sep 8, 2022 at 9:46 AM Richard Henderson < > richard.hender...@linaro.org > > > wrote: > > > > On 9/6/22

Re: [PATCH 11/11] RISC-V: Add initial support for T-Head C906 and C910 CPUs

On 9/8/22 09:23, Christoph Müllner wrote: On Thu, Sep 8, 2022 at 9:46 AM Richard Henderson > wrote: On 9/6/22 13:22, Christoph Muellner wrote: > +    DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C906,        rv64_thead_c906_cpu_init), > +    DEFINE_CPU(TY

Re: [PATCH 11/11] RISC-V: Add initial support for T-Head C906 and C910 CPUs

On Thu, Sep 8, 2022 at 9:46 AM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/6/22 13:22, Christoph Muellner wrote: > > +DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C906, > rv64_thead_c906_cpu_init), > > +DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C910, > rv64_thead_c906_cpu_init), > > Why mod

Re: [PATCH 11/11] RISC-V: Add initial support for T-Head C906 and C910 CPUs

On 9/6/22 13:22, Christoph Muellner wrote: +DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C906, rv64_thead_c906_cpu_init), +DEFINE_CPU(TYPE_RISCV_CPU_THEAD_C910, rv64_thead_c906_cpu_init), Why model both if they're identical? r~

[PATCH 11/11] RISC-V: Add initial support for T-Head C906 and C910 CPUs

From: Christoph Müllner This patch adds the following T-Head CPUs to the list of known CPUs: * C906 * C910 Selecting those CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Signed-off-by: Christoph Müllner --- target/riscv/cpu.c | 32 +