Re: [PATCH 1/9] target/ppc: raise HV interrupts for partition table entry problems

On 2/15/22 04:16, Nicholas Piggin wrote: Invalid or missing partition table entry exceptions should cause HV interrupts. HDSISR is set to bad MMU config, which is consistent with the ISA and experimentally matches what POWER9 generates. Signed-off-by: Nicholas Piggin Adding the previous R-b f

[PATCH 1/9] target/ppc: raise HV interrupts for partition table entry problems

Invalid or missing partition table entry exceptions should cause HV interrupts. HDSISR is set to bad MMU config, which is consistent with the ISA and experimentally matches what POWER9 generates. Signed-off-by: Nicholas Piggin --- target/ppc/mmu-radix64.c | 4 ++-- 1 file changed, 2 insertions(+