Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

On 2/3/25 11:15 AM, Alex Bennée wrote: Julia writes: This happens because 'pte' is a 'target_ulong' type that, for riscv32, will be interpreted as uint32_t while the FMT being used is PRIx64. You can fix it by using TARGET_FMT_lx instead of PRIx64: I've sent a follow-up patch fixing the

Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

Julia writes: >> This happens because 'pte' is a 'target_ulong' type that, for riscv32, will >> be >> interpreted as uint32_t while the FMT being used is PRIx64. >> >> You can fix it by using TARGET_FMT_lx instead of PRIx64: >> > > I've sent a follow-up patch fixing these build errors, it builds

Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

Julia writes: >> This happens because 'pte' is a 'target_ulong' type that, for riscv32, will >> be >> interpreted as uint32_t while the FMT being used is PRIx64. >> >> You can fix it by using TARGET_FMT_lx instead of PRIx64: >> > > I've sent a follow-up patch fixing these build errors, it builds

Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

> This happens because 'pte' is a 'target_ulong' type that, for riscv32, will be > interpreted as uint32_t while the FMT being used is PRIx64. > > You can fix it by using TARGET_FMT_lx instead of PRIx64: > I've sent a follow-up patch fixing these build errors, it builds on 32 & 64 bit on my syste

Re: [PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

On 2/2/25 2:15 AM, julia wrote: For instance, QEMUs newer than b6ecc63c569bb88c0fcadf79fb92bf4b88aefea8 would silently treat this akin to an unmapped page (as required by the RISC-V spec, admittedly). However, not all hardware platforms do (e.g. CVA6) which leads to an apparent QEMU bug. Inst

[PATCH 1/1] target/riscv: log guest errors when reserved bits are set in PTEs

For instance, QEMUs newer than b6ecc63c569bb88c0fcadf79fb92bf4b88aefea8 would silently treat this akin to an unmapped page (as required by the RISC-V spec, admittedly). However, not all hardware platforms do (e.g. CVA6) which leads to an apparent QEMU bug. Instead, log a guest error so that in fut