On 6/12/20 9:20 PM, Lijun Pan wrote:
> This patch series add several newly introduced 32/64-bit vector
> instructions in Power ISA 3.1. The newly added instructions are
> flagged as ISA300 temporarily in vmx-ops.inc.c and vmx-impl.inc.c
> to make them compile and function since Power ISA 3.1, toget
On 6/15/20 10:54 PM, Lijun Pan wrote:
>
>
>> On Jun 15, 2020, at 12:36 PM, Cédric Le Goater wrote:
>>
>> Hello,
>>
>> On 6/13/20 6:20 AM, Lijun Pan wrote:
>>> This patch series add several newly introduced 32/64-bit vector
>>> instructions in Power ISA 3.1. The newly added instructions are
>>> f
> On Jun 15, 2020, at 12:36 PM, Cédric Le Goater wrote:
>
> Hello,
>
> On 6/13/20 6:20 AM, Lijun Pan wrote:
>> This patch series add several newly introduced 32/64-bit vector
>> instructions in Power ISA 3.1. The newly added instructions are
>> flagged as ISA300 temporarily in vmx-ops.inc.c a
Hello,
On 6/13/20 6:20 AM, Lijun Pan wrote:
> This patch series add several newly introduced 32/64-bit vector
> instructions in Power ISA 3.1. The newly added instructions are
> flagged as ISA300 temporarily in vmx-ops.inc.c and vmx-impl.inc.c
> to make them compile and function since Power ISA 3.
yle problems. See output below for
> more information:
>
> Message-id: 20200613042029.22321-1-...@linux.ibm.com
> Subject: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions
> Type: series
>
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> git rev-pa
Patchew URL: https://patchew.org/QEMU/20200613042029.22321-1-...@linux.ibm.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200613042029.22321-1-...@linux.ibm.com
Subject: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector
This patch series add several newly introduced 32/64-bit vector
instructions in Power ISA 3.1. The newly added instructions are
flagged as ISA300 temporarily in vmx-ops.inc.c and vmx-impl.inc.c
to make them compile and function since Power ISA 3.1, together
with next generation processor, has not b
