On 6/12/20 9:20 PM, Lijun Pan wrote: > This patch series add several newly introduced 32/64-bit vector > instructions in Power ISA 3.1. The newly added instructions are > flagged as ISA300 temporarily in vmx-ops.inc.c and vmx-impl.inc.c > to make them compile and function since Power ISA 3.1, together > with next generation processor, has not been fully enabled in QEMU > yet. When Power ISA 3.1 and next generation processor are fully > supported, the flags should be changed.
This is not the correct procedure. Step 1 is to add a new define for ISA301, which is not enabled for any processor. Step 2 is to add all of the new instructions, using ISA301. In this way there is no intermediate point in which a 3.01 instruction is enabled for 3.00. In addition, we do not have extra churn simply to change the ISA. Step 3 is to add a new processor for which ISA301 is set. It is often reasonable to have a fake processor named "max" that contains all of the available features. For ppc, I see that "max" is currently aliased to "7400_v2.9". r~
