在 2023/6/30 16:53, Thomas Huth 写道:
On 30/06/2023 10.45, qianfan wrote:
在 2023/6/30 15:27, Thomas Huth 写道:
On 30/06/2023 08.15, qianfan wrote:
在 2023/6/29 19:35, Thomas Huth 写道:
On 06/06/2023 11.47, Peter Maydell wrote:
From: qianfan Zhao
Add test case for booting from initrd and sd
在 2023/6/30 15:27, Thomas Huth 写道:
On 30/06/2023 08.15, qianfan wrote:
在 2023/6/29 19:35, Thomas Huth 写道:
On 06/06/2023 11.47, Peter Maydell wrote:
From: qianfan Zhao
Add test case for booting from initrd and sd card.
Signed-off-by: qianfan Zhao
Reviewed-by: Niek Linnenbank
Tested
在 2023/6/30 14:15, qianfan 写道:
在 2023/6/29 19:35, Thomas Huth 写道:
On 06/06/2023 11.47, Peter Maydell wrote:
From: qianfan Zhao
Add test case for booting from initrd and sd card.
Signed-off-by: qianfan Zhao
Reviewed-by: Niek Linnenbank
Tested-by: Niek Linnenbank
Signed-off-by: Peter
在 2023/6/29 19:35, Thomas Huth 写道:
On 06/06/2023 11.47, Peter Maydell wrote:
From: qianfan Zhao
Add test case for booting from initrd and sd card.
Signed-off-by: qianfan Zhao
Reviewed-by: Niek Linnenbank
Tested-by: Niek Linnenbank
Signed-off-by: Peter Maydell
---
tests/avocado
在 2023/6/18 0:29, Guenter Roeck 写道:
Hi,
On Tue, May 23, 2023 at 06:04:58PM +0800, qianfangui...@163.com wrote:
From: qianfan Zhao
Allwinner R40 (sun8i) SoC features a Quad-Core Cortex-A7 ARM CPU,
and a Mali400 MP2 GPU from ARM. It's also known as the Allwinner T3
for In-Car Entertai
在 2023/5/15 2:55, Niek Linnenbank 写道:
Hi Qianfan,
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
R40 has eight UARTs, support both 16450 and 16550 compatible modes.
Signed-off-by: qianfan Zhao
---
hw/arm/allwinner-r40.c | 31
在 2023/5/15 2:55, Niek Linnenbank 写道:
Hi Qianfan,
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
R40 has eight UARTs, support both 16450 and 16550 compatible modes.
Signed-off-by: qianfan Zhao
---
hw/arm/allwinner-r40.c | 31
在 2023/5/15 2:50, Niek Linnenbank 写道:
Hi Qianfan,
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
Allwinner R40 (sun8i) SoC features a Quad-Core Cortex-A7 ARM CPU,
and a Mali400 MP2 GPU from ARM. It's also known as the Allwinner T3
for In-Car Entertai
在 2023/5/16 3:58, Niek Linnenbank 写道:
Hi Qianfan,
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
R40 has two ethernet controllers named as emac and gmac. The emac is
compatibled with A10, and the GMAC is compatibled with H3.
Signed-off-by: qianfan Zhao
在 2023/5/16 3:54, Niek Linnenbank 写道:
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
A64's sd register was similar to H3, and it introduced a new register
named SAMP_DL_REG location at 0x144. The dma descriptor buffer size of
mmc2 is only 8K and the othe
在 2023/5/16 3:47, Niek Linnenbank 写道:
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
Types of memory that the SDRAM controller supports are DDR2/DDR3
and capacities of up to 2GiB. This commit adds emulation support
of the Allwinner R40 SDRAM controller
在 2023/5/16 3:29, Niek Linnenbank 写道:
Hi Qianfan,
Good idea indeed to turn this driver into a more generic one. If
possible, its best to re-use code rather than adding new.
On Wed, May 10, 2023 at 12:30 PM wrote:
From: qianfan Zhao
This patch adds minimal support for AXP-221
在 2023/5/3 4:01, Niek Linnenbank 写道:
Hi Qianfan,
Sorry for my late response, I had a holiday in between.
On Tue, Apr 18, 2023 at 1:21 PM wrote:
From: qianfan Zhao
Allwinner R40 (sun8i) SoC features a Quad-Core Cortex-A7 ARM CPU,
and a Mali400 MP2 GPU from ARM. It's
在 2023/4/7 4:18, Niek Linnenbank 写道:
On Tue, Mar 28, 2023 at 7:47 AM wrote:
From: qianfan Zhao
A64's sd register was similar to H3, and it introduced a new register
named SAMP_DL_REG location at 0x144. The dma descriptor buffer size of
mmc2 is only 8K and the othe
在 2023/4/7 3:22, Niek Linnenbank 写道:
Hi Qianfan Zhao,
Is this change really needed as a separate patch?
Looks like it would make sense just to squash it with the original
patch 01?
The class type of TYPE_AW_SDHOST_SUN50I_A64 was introduced when patch-07.
Add patch-01 doesn't has that
very interesting but I don't
have any experience with them.
My custom image was build with buildroot. I very take somedays to learn
how it works.
There are so much things to learn.
Best reregards ,
Strahinja
On Mon, Mar 20, 2023, 9:52 AM qianfan wrote:
在 2023/3/9 4:47, Niek Lin
在 2023/3/9 4:47, Niek Linnenbank 写道:
Hello Qianfan Zhao,
Thanks for contributing this work to Qemu! With your contribution, we
would get yet another Allwinner SoC supported, making it three in
total (A10/H3/R40). That's great.
My thoughts are that maybe we should try to re-use common
在 2023/2/20 6:30, Philippe Mathieu-Daudé 写道:
Hi,
On 17/2/23 10:42, qianfangui...@163.com wrote:
From: qianfan Zhao
Next is an example when allwinner_i2c_rw enabled:
allwinner_i2c_rw write CNTR[0x0c]: 50 { M_STP BUS_EN }
allwinner_i2c_rw write CNTR[0x0c]: e4 { A_ACK M_STA BUS_EN
t you encountered?
I am portting allwinner r40 device and you can read it from my github repo:
https://github.com/qianfan-Zhao/qemu/tree/allwinner-r40
R40 is compatible with sun6i-a31-i2c and you can find the W1C flag on it's
datasheet.
(DRAMC is not impl on my github repo, so the u-boot code
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