On 4/30/24 10:27 AM, Igor Mammedov wrote:
On Fri, 3 Nov 2023 13:56:02 +0300
Dmitrii Gavrilov wrote:
Seems related to cpu hotpug issues,
CCing Boris for awareness.
Thank you Igor.
This patch appears to change timing in my test which makes the problem
much more difficult to reproduce. How
On 10/23/21 4:14 PM, Michael S. Tsirkin wrote:
On Sat, Oct 23, 2021 at 07:52:21AM +0530, Ani Sinha wrote:
On Fri, 22 Oct 2021, Eric DeVolder wrote:
Ani, inline below.
eric
On 10/22/21 05:18, Ani Sinha wrote:
On Fri, 15 Oct 2021, Eric DeVolder wrote:
diff --git a/hw/i386/acpi-microvm.c
On 8/26/19 9:57 AM, Igor Mammedov wrote:
>
>> I most likely don't understand how this is supposed to work but aren't
>> we here successfully reading SMRAM from non-SMM context, something we
>> are not supposed to be able to do?
> We are aren't reading SMRAM at 0x3 base directly,
> "RAM" marked
On 8/16/19 7:24 AM, Igor Mammedov wrote:
> for purpose of demo SMRAM (at 0x3) is aliased at a in system address
> space
> for easy initialization of SMI entry point.
> Here is resulting debug output showing that RAM at 0x3 is not affected
> by SMM and only RAM in SMM adderss space is m
On 1/9/19 6:53 AM, Stefano Garzarella wrote:
> Hi Liam,
>
> On Tue, Jan 8, 2019 at 3:47 PM Liam Merwick wrote:
>> QEMU sets the hvm_modlist_entry in load_linux() after the call to
>> load_elfboot() and then qboot loads it in boot_pvh_from_fw_cfg()
>>
>> But the current PVH patches don't handle ini
On 12/5/18 8:20 AM, Stefan Hajnoczi wrote:
> On Tue, Dec 04, 2018 at 02:44:33PM -0800, Maran Wilson wrote:
>>
>> Since then, we have put together an alternative solution that would allow
>> Qemu to boot an uncompressed Linux binary via the x86/HVM direct boot ABI
>> (https://xenbits.xen.org/docs/un
From: Andre Przywara
Add a new base CPU model called Opteron_G5 to model the latest
Opteron CPUs. This increases the model value and model numbers and
adds TBM, F16C and FMA over the latest G4 model.
Signed-off-by: Andre Przywara
Signed-off-by: Boris Ostrovsky
---
target-i386/cpu.c | 32
AVX2, BMI2, ERMS, InvPCID, RTM, RDSeed and ADX.
Sources where the AMD BKDG for Family 15h/Model 10h and the Linux kernel
for the leaf 7 bits.
Signed-off-by: Andre Przywara
Signed-off-by: Boris Ostrovsky
---
target-i386/cpu.c | 16
target-i386/cpu.h | 21
From: Andre Przywara
Two patches to provide support for new Opteron processors. The first
patch was submitted earlier
(http://lists.nongnu.org/archive/html/qemu-devel/2012-10/msg03058.html)
and may have already been applied.
Andre Przywara (2):
x86/cpu: name new CPUID bits
x86/cpu: add new
