From: Salil Mehta
Some devices cannot be hot-unplugged, either because removal is not meaningful
(e.g. on-board devices) or not supported (e.g. certain PCIe devices). Others,
such as CPUs on architectures like ARM, lack native hotplug support but can
still have their availability controlled
e...@opnsrc.net; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org; m...@redhat.com
> Subject: Re: [PATCH RFC V6 24/24] tcg: Defer TB flush for 'lazy realized'
> vCPUs
> on first region alloc
>
> On 9/30/25 18:01, salil.me...@opnsrc.net wrote:
> > From: Salil Mehta
From: Salil Mehta
Problem:
===
When PSCI CPU_ON was handled entirely in KVM, the operation executed under
VGIC/KVM locks at EL2 and appeared atomic to other vCPU threads (intermediate
states were not observable). With the SMCCC forward-to-userspace filter enabled,
PSCI ON/OFF calls now exit
From: Salil Mehta
The existing 'info hotpluggable-cpus' applies to platforms with true CPU
hotplug. On ARM, vCPUs are not hotpluggable: resources are allocated at
boot and policy is enforced administratively (e.g. via ACPI _STA) to
achieve a hotplug-like effect. As a result, the ho
at KVM’s `MP_STATE` is updated
accordingly, forcing synchronization of the `mp_state` between QEMU and KVM.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Salil Mehta
---
target/arm/arm-powerctl.c | 1 +
target/arm/kvm.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/targ
From: Salil Mehta
Per Arm GIC Architecture Specification (IHI0069H_b, §11.1), the CPU interface
and its Processing Element (PE) share a power domain. If the PE is powered down
or administratively disabled, the CPU interface must be quiescent or off, and
any access is architecturally
From: Salil Mehta
The TCG code cache is split into regions shared by vCPUs under MTTCG. For
cold-boot (early realized) vCPUs, regions are sized/allocated during bring-up.
However, when a vCPU is *lazy_realized* (administratively "disabled" at boot
and realized later on demand), its
From: Salil Mehta
This change emits AML in DSDT to support vCPU deferred online-capability on
arm/virt. It wires the CPU OSPM coordination paths so that CPUs which are
administratively disabled at boot can be brought online later under policy,
providing hotplug-like functionality without
From: Salil Mehta
Store the user-specified topology (socket/cluster/core/thread) and derive a
unique 'vcpu-id'. The 'vcpu-id' is used as the slot index in the possible vCPUs
list when administratively enabling or disabling a vCPU.
Co-developed-by: Keqian Zhu
Signed-off-by
From: Salil Mehta
To support a vCPU hot-add–like model on ARM, the virt machine may be setup with
more CPUs than are active at boot. These additional CPUs are fully realized in
KVM and listed in ACPI tables from the start, but begin in a disabled state.
They can later be brought online or taken
From: Salil Mehta
Device power-state transitions such as powering on, powering off, or entering
standby may be triggered by administrative state changes (enable to disable or
disable to enable), guest OSPM requests in response to workload or policy, or
platform-specific control flows (e.g. ACPI
From: Salil Mehta
Administrative power state property has been recently introduced as part of this
patch-set, and QEMU currently lacks a way for platforms to react to such control
(e.g. 'device_set ... admin-state=disable'). These host-driven changes must
drive corresponding o
From: Salil Mehta
GICv3 CPU interface initialization currently has separate logic paths for TCG
and KVM accelerators, even though much of the flow—such as iterating over vCPUs
and applying common setup—should be identical. This separation makes it harder
to add new CPU interface features that
From: Salil Mehta
The existing ACPI CPU hotplug interface is built for x86 platforms where CPUs
can be inserted or removed and resources are allocated dynamically. On ARM, CPUs
are never hotpluggable: resources are allocated at boot and QOM vCPU objects
always exist. Instead, CPUs are
From: Salil Mehta
ARM CPU architecture does not allow CPUs to be plugged after system has
initialized. This is a constraint. Hence, the Kernel must know all the CPUs
being booted during its initialization. This applies to the Guest Kernel as
well and therefore, the number of KVM vCPU descriptors
From: Salil Mehta
When QEMU builds the MADT table, modifications are needed to include information
about possible vCPUs that are exposed as ACPI-disabled (i.e., `_STA.Enabled=0`).
This new information will help the guest kernel pre-size its resources during
boot time. Pre-sizing based on
From: Salil Mehta
[!] Sending again: It looks like mails sent from my official ID are being held
somewhere. Hence, I am using my other email address. Sorry for any inconvenience
this may have caused.
(I) Prologue
This patch series adds support for a virtual CPU
From: Salil Mehta
ARM architecture requires that all CPUs which form part of the VM must
expose identical feature sets and consistent system components at creation
time. This includes the Performance Monitoring Unit (PMU). If only the boot
CPUs had their PMU state initialized, the remaining CPUs
From: Salil Mehta
Add support for a new SMP configuration parameter, 'disabledcpus', which
specifies the number of additional CPUs that are present in the virtual
machine but administratively disabled at boot. These CPUs are visible in
firmware (e.g. ACPI tables) yet unavailable to
Test email. sorry for the noise!
test email (sorry for the noise)
o
> Cc: Gavin Shan ; Salil Mehta
> ; qemu-devel@nongnu.org; qemu-
[...]
> On Wed, 21 May 2025 12:06:57 -0300
> Gustavo Romero wrote:
>
> > Hi Salil, Gavin, and folks,
> >
> > On 5/20/25 21:22, Gavin Shan wrote:
> > > Hi Salil,
> > >
>
HI Gavin,
> -Original Message-
> From: Gavin Shan
> Sent: Thursday, May 22, 2025 12:54 AM
> To: Gustavo Romero ; Salil Mehta
> ; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org; m...@redhat.com; Jonathan Cameron
> ; Igor Mammedov
> ; Eric Auger
[..]
>
> H
Hi Gustavo,
> From: Gustavo Romero
> Sent: Wednesday, May 21, 2025 4:07 PM
> To: Gavin Shan ; Salil Mehta
> ; qemu-devel@nongnu.org; qemu-
> a...@nongnu.org; m...@redhat.com; Jonathan Cameron
> ; Igor Mammedov
> ; Eric Auger
[...]
>
> Hi Salil, Gavin, and folks,
&
Hi Gavin,
Thanks for your email and sorry for the delay in reply as I was in transit and
on
annual leave since Monday.
Please check my replies inline.
Best regards
Salil
> From: Gavin Shan
> Sent: Wednesday, May 21, 2025 1:22 AM
> To: Salil Mehta ; qemu-devel@nongnu.or
+}
+Else
+{
+Local0 = 0x0D
+}
}
Reported-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
hw/acpi/cpu.c
If ((\_SB.PCI0.PRES.CPEN == One))
+{
+Local0 |= 0x0F
}
Release (\_SB.PCI0.PRES.CPLK)
Reported-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
tests/data/acpi/x86/pc/DSDT
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Suggested-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
tests/qtest/bios-tables-test-allowed-diff.h | 41 +
1 file changed, 41 inse
checking the `presence` of vCPUs dynamically (feedback from Igor Mammedov)
Fixes [PULL 60/65], [PULL 61/65]:
Message-ID:
Message-ID:
<4d62d15b11909e9af121577e707b88f2e4524371.1730754238.git@redhat.com>
Salil Mehta (3):
qtest: allow ACPI DSDT Table changes
Fix: CPUs presence logic i
Hi Igor,
Many thanks for taking time to reply.
> From: qemu-arm-bounces+salil.mehta=huawei@nongnu.org arm-bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Igor
> Mammedov
> Sent: Thursday, November 7, 2024 4:57 PM
> To: Salil Mehta
>
> On Wed, 6 No
Hi Igor,
Thanks for replying back and the reviews. Please find my replies
inline.
> From: Igor Mammedov
> Sent: Wednesday, November 6, 2024 4:08 PM
> To: Salil Mehta
>
> On Wed, 6 Nov 2024 14:45:42 +
> Salil Mehta wrote:
>
> > Hi Igor,
> &g
-ID:
<4d62d15b11909e9af121577e707b88f2e4524371.1730754238.git@redhat.com>
Salil Mehta (3):
qtest: allow ACPI DSDT Table changes
Fix: Reverse CPUs presence check logic for x86 backward compatability
tests/qtest/bios-tables-test: Fix DSDT golden masters for x86/{pc,q35}
hw/acpi
-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
tests/data/acpi/x86/pc/DSDT | Bin 8561 -> 8561 bytes
tests/data/acpi/x86/pc/DSDT.acpierst | Bin 8472 -> 8472 bytes
tests/data/acpi/x86/pc
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Suggested-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
tests/qtest/bios-tables-test-allowed-diff.h | 41 +
1 file changed, 41 inse
Hi Igor,
> From: qemu-arm-bounces+salil.mehta=huawei@nongnu.org arm-bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Igor
> Mammedov
> Sent: Wednesday, November 6, 2024 1:57 PM
> To: Salil Mehta
>
> On Wed, 6 Nov 2024 13:03:30 +
> Salil Mehta
+}
+Else
+{
+Local0 = 0x0D
+}
}
Suggested-by: Igor Mammedov
Message-ID: <20241106100047.18901...@imammedo.users.ipa.redhat.com>
Signed-off-by: Salil Mehta
---
hw/acpi/cpu.
HI Igor,
Thank for you replying back.
> From: qemu-devel-bounces+salil.mehta=huawei@nongnu.org devel-bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Igor
> Mammedov
> Sent: Wednesday, November 6, 2024 9:01 AM
> To: Salil Mehta
>
> On Tue, 5 Nov 2024 21
HI Peter,
> From: Peter Maydell
> Sent: Wednesday, November 6, 2024 1:01 PM
> To: Salil Mehta
>
> On Tue, 5 Nov 2024 at 22:20, Salil Mehta wrote:
> >
> > HI Peter,
> >
> > > From: Peter Maydell
> > > Sent: Monda
HI Peter,
> From: Peter Maydell
> Sent: Monday, November 4, 2024 1:27 PM
> To: Salil Mehta
>
> On Sun, 3 Nov 2024 at 15:25, Salil Mehta wrote:
> >
> > Extract common GIC and CPU interrupt wiring code to improve code
> > readability and modularity, supp
Hi Gavin,
Thanks for the valuable comments. I will address them but it looks peter has
already
pulled ARM changes for this cycle?
Thanks
Salil.
> From: Gavin Shan
> Sent: Tuesday, November 5, 2024 12:01 AM
> To: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org; m..
> From: Igor Mammedov
> Sent: Tuesday, November 5, 2024 12:50 PM
> To: Michael S. Tsirkin
> Cc: qemu-devel@nongnu.org; Peter Maydell ;
> Salil Mehta ; Ani Sinha ;
> Eduardo Habkost ; Marcel Apfelbaum
> ; Philippe Mathieu-Daudé
> ; wangyanan (Y) ; Zhao
> Liu
HI Miguel,
> From: Miguel Luis
> Sent: Monday, November 4, 2024 12:55 PM
> To: Salil Mehta
>
> Hi Salil,
>
> > On 3 Nov 2024, at 09:24, Salil Mehta via
> wrote:
> >
> > Change Log
> > ==
> >
> > Patch V2 -> V3:
us.
https://lore.kernel.org/qemu-devel/20241103102419.202225-1-salil.me...@huawei.com/
Many thanks!
Best regards
Salil.
> From: Salil Mehta
> Sent: Friday, November 1, 2024 10:54 AM
> To: 'Igor Mammedov' ; Salil Mehta
>
>
> Hi Igor,
>
> Thanks for r
]
Suggested-by: Miguel Luis
[5/05/2024: Fix the total number of PPIs available as per ARM BSA to avoid
overflow]
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 108 --
1 file changed, 60 insertions
* functional changes
intended. Code has been tested to confirm correct initialization
sequences across relevant scenarios.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/intc/arm_gicv3.c| 1 +
hw/intc/arm_gicv3_cpuif.c
cosmetic change only; *no* functional changes are
intended here.
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 238 +-
include/hw/arm/virt.h | 4 +
2 files changed, 147 insertions(+), 95 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
agnostic ACPI changes to support vCPU Hotplug (on Archs
like ARM)
https://lore.kernel.org/qemu-devel/20241103102419.202225-1-salil.me...@huawei.com/#t
Sorry for any inconvenience above might have caused.
Best regards
Salil.
> -Original Message-
> From: Salil Mehta
> Sent:
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Reported-by: Zhao Liu
Signed-off-by: Salil Mehta
---
tests/qtest/bios-tables-test-allowed-diff.h | 41 +
1 file changed, 41 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests
"ost_status": "0x"
},
[...]
{
"is_inserting": false,
"is_removing": false,
"ost_event": "0x",
-__ii0iNb3.pdf
[3] KVMForum 2020 Presentation: Challenges in Supporting Virtual CPU Hotplug on
SoC Based Systems (like ARM64)
Link: https://kvmforum2020.sched.com/event/eE4m
[4] Example implementation of architecture-specific CPU persistence hook
Link:
https://github.com/salil-mehta
f ((\_SB.PCI0.PRES.CPEN == One))
+{
+Local0 = 0x0F
+}
+Else
+{
+Local0 = 0x0D
+}
}
Release (\_SB.PCI0.PRES.CPLK)
Reported-by:
using architecture-specific code [1].
Reference:
[1] Example implementation of architecture-specific hook to fetch CPU
`enabled status
Link:
https://github.com/salil-mehta/qemu/commit/c0b416b11e5af6505e558866f0eb6c9f3709173e
Signed-off-by: Salil Mehta
---
hw/acpi/cpu.c | 38
Architecture Agnostic ACPI changes patch-set:
Repo: https://github.com/salil-mehta/qemu.git
virt-cpuhp-armv8/rfc-v6.arch.agnostic.acpi.v3
Link:
https://github.com/salil-mehta/qemu/commits/virt-cpuhp-armv8/rfc-v6.arch.agnostic.acpi.v3
(*) Works with upcoming ARM architecture specif
cle and drop the last patch?
Arch agnostic ACPI V2 series:
https://lore.kernel.org/qemu-devel/20241031200502.3869-1-salil.me...@huawei.com/T/#mf10104510269d5c290622a0471f0997ad058e397
Upcoming RFC V6, Support of Virtual CPU Hotplug for ARMv8 Arch
Link: https://github.com/salil-mehta/qemu/commits/virt-c
se,
"is_removing": false,
"is_enabled": false,
"ost_event": "0x",
"ost_status": "0x"
}
]
\_SB.PCI0.PRES.CPLK)
Reported-by: Zhao Liu
Signed-off-by: Salil Mehta
---
tests/data/acpi/x86/pc/DSDT | Bin 8527 -> 8533 bytes
tests/data/acpi/x86/pc/DSDT.acpierst | Bin 8438 -> 8444 bytes
tests/data/acpi/x86/pc/DSDT.acpihmat | Bin 9852 -> 9858 by
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Reported-by: Zhao Liu
Signed-off-by: Salil Mehta
---
tests/qtest/bios-tables-test-allowed-diff.h | 41 +
1 file changed, 41 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests
Update the CPUs AML code to reflect the ACPI CPU Hotplug `is_enabled`
state in the `_STA.Enabled` Bit when the ACPI `_STA` method is evaluated
by the Guest Kernel during initialization, as well as when vCPUs are
hot-plugged or hot-unplugged.
Signed-off-by: Salil Mehta
Reviewed-by: Gustavo Romero
Update the `is_enabled` state in `AcpiCpuStatus` when vCPUs are
hot-plugged or hot-unplugged.
Signed-off-by: Salil Mehta
Reviewed-by: Gustavo Romero
---
hw/acpi/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
index 238a0edbc1..8940687f90 100644
--- a
Link:
https://kvm-forum.qemu.org/2023/Challenges_Revisited_in_Supporting_Virt_CPU_Hotplug_-__ii0iNb3.pdf
[3] KVMForum 2020 Presentation: Challenges in Supporting Virtual CPU Hotplug on
SoC Based Systems (like ARM64)
Link: https://kvmforum2020.sched.com/event/eE4m
Signed-off-by: Salil
hitecture Agnostic ACPI changes patch-set:
https://github.com/salil-mehta/qemu.git
virt-cpuhp-armv8/rfc-v6.arch.agnostic.acpi.v2
Link:
https://github.com/salil-mehta/qemu/commits/virt-cpuhp-armv8/rfc-v6.arch.agnostic.acpi.v2
(*) Works with upcoming ARM architecture specific patch-set
Hi Igor,
Thanks for taking time to review the series. Please find my replies inline.
> From: qemu-devel-bounces+salil.mehta=huawei@nongnu.org devel-bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Igor
> Mammedov
> Sent: Friday, October 18, 2024 3:46 PM
>
Hi Gustavo,
> From: Gustavo Romero
> Sent: Monday, October 21, 2024 3:10 AM
> To: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org; m...@redhat.com
>
> Hi Salil,
>
> On 10/14/24 16:22, Salil Mehta wrote:
> > Reflect the ACPI CPU hotplug `is_{pr
Hi Igor,
> From: Igor Mammedov
> Sent: Friday, October 18, 2024 3:25 PM
> To: Salil Mehta
> Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; m...@redhat.com;
> m...@kernel.org; jean-phili...@linaro.org; Jonathan Cameron
> ; lpieral...@kernel.org;
> peter.mayd...@linar
> From: Igor Mammedov
> Sent: Friday, October 18, 2024 3:19 PM
> To: Zhao Liu
> Cc: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org; m...@redhat.com; m...@kernel.org; jean-
> phili...@linaro.org; Jonathan Cameron
> ; lpieral...@kernel.org;
>
Hi Zhao,
Sorry, for the late reply. I was away last week with only intermittent access
to the mails.
> From: Zhao Liu
> Sent: Friday, October 18, 2024 6:13 AM
> To: Salil Mehta
>
> Hi Salil,
>
> On Mon, Oct 14, 2024 at 08:22:04PM +0100, Salil Mehta wrote:
>
Hi Igor,
> From: Igor Mammedov
> Sent: Friday, October 18, 2024 3:31 PM
> To: Salil Mehta
>
> On Mon, 14 Oct 2024 20:22:05 +0100
> Salil Mehta wrote:
>
> > The ACPI CPU hotplug states `is_{present, enabled}` must be migrated
> > alongside other vCPU
Hi Igor,
> From: Igor Mammedov
> Sent: Friday, October 18, 2024 3:18 PM
> To: Salil Mehta
>
> On Mon, 14 Oct 2024 20:22:03 +0100
> Salil Mehta wrote:
>
> > Update the `AcpiCpuStatus` for `is_enabled` and `is_present`
> > accordingly when vCPUs
Hi Igor,
Thanks for taking time to review and sorry for not being prompt. I was in
transit
due to some difficult personal situation.
On Fri, Oct 18, 2024 at 3:11 PM Igor Mammedov wrote:
> On Mon, 14 Oct 2024 20:22:02 +0100
> Salil Mehta wrote:
>
> > Certain CPU architecture sp
Hi Gustavo
On Thu, Oct 17, 2024 at 9:25 PM Gustavo Romero
wrote:
> Hi Salil,
>
> On 10/14/24 16:22, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists
Hi Gavin,
On Thu, Oct 17, 2024 at 6:27 AM Gavin Shan wrote:
> On 10/15/24 5:22 AM, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists because
> many system
> >
HI Gustavo,
On Wed, Oct 16, 2024 at 10:01 PM Gustavo Romero
wrote:
> Hi Salil,
>
> On 10/14/24 16:22, Salil Mehta wrote:
> > Certain CPU architecture specifications [1][2][3] prohibit changes to CPU
> > presence after the kernel has booted. This limitation exists
Hi Miguel,
On Wed, Oct 16, 2024 at 3:09 PM Miguel Luis wrote:
> Hi Salil,
>
> > On 15 Oct 2024, at 09:59, Salil Mehta wrote:
> >
> > PROLOGUE
> >
> >
> > To assist in review and set the right expectations from this RFC, please
> first
&
Hi Gavin,
Sorry for the late reply. I had to travel outside the UK urgently because
of some
personal challenging situation. I'm still on the transit back to the UK
hence replying
from my other email ID..
On Thu, Oct 17, 2024 at 8:07 AM Gavin Shan wrote:
> Hi Salil,
>
> The issues reported again
Hi Igor,
> From: Igor Mammedov
> Sent: Tuesday, October 15, 2024 3:34 PM
> To: Salil Mehta
>
> On Tue, 15 Oct 2024 09:41:24 +
> Salil Mehta wrote:
>
> > HI Igor,
> >
> > > From: Igor Mammedov
> > > Sent: Tuesday, October 15
HI Bibo,
> From: maobibo
> Sent: Tuesday, October 15, 2024 4:31 AM
> To: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org; m...@redhat.com
>
> With cpu-add/cpu-del command tested on LoongArch system, no migration
> tested. There is no negative influen
//uefi.org/sites/default/files/resources/ACPI_Spec_6_5_Aug29.pdf (Pages
138, 140)
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 16
include/hw/core/cpu.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 15d9c2d8ac..d1172151be 100644
fail if KVM is unable to acquire the necessary locks on all
vCPUs. Therefore, to ensure proper locking of the vCPU being reset and prevent
failures, we need to *pause all vCPUs* during this operation to facilitate
successful locking within the host.
Signed-off-by: Salil Mehta
---
hw/intc
tion or override the destination QEMU’s vCPU
configuration to match the source. We have adopted the latter approach as a
mitigation for the mismatch. Nonetheless, the administrator should still ensure
that the number of possible QOM vCPUs is consistent at both ends.
Signed-off-by: Salil
trigger a call
to `kvm_arch_put_registers()`. This guarantees that KVM’s `MP_STATE` is updated
accordingly, forcing synchronization of the `mp_state` between QEMU and KVM.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Salil Mehta
---
target/arm/kvm.c | 7 +++
1 file changed, 7 insertion
From: Author Salil Mehta
To support vCPU hotplug, we must trap any `HVC`/`SMC` `PSCI_CPU_{ON,OFF}`
hypercalls from the host KVM to QEMU for policy checks. This ensures the
following when a vCPU is brought online:
1. The vCPU is actually plugged in (i.e., present).
2. The vCPU is not disabled
From: Miguel Luis
Introduce the TCG thread unregistration leg which shall be called in context to
TCG/vCPU unrealize.
Reported-by: Salil Mehta
Signed-off-by: Miguel Luis
Signed-off-by: Salil Mehta
---
accel/tcg/tcg-accel-ops-mttcg.c | 1 +
include/tcg/startup.h | 7 +++
tcg
vCPUs are not destroyed in host KVM rather their Qemu
context is parked at the QEMU KVM layer.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
Reported-by: Vishnu Pajjuri
[VP: Identified CPU stall issue & suggested probable fix]
Signed-off-by: Salil M
Updates the firmware config with the next boot cpus information and also
registers the reset callback to be called when guest reboots to reset the cpu.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/boot.c | 2 +-
hw/arm/virt.c
.
Reported-by: Miguel Luis
Signed-off-by: Miguel Luis
Signed-off-by: Salil Mehta
---
accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
accel/tcg/tcg-accel-ops-rr.c| 2 +-
include/tcg/startup.h | 6 ++
include/tcg/tcg.h | 1 +
tcg/region.c| 14
The ARM extensions configuration *must* match the existing vCPUs already
initialized in KVM at VM initialization. ARM does not allow any per-vCPU
features to be changed once the system has fully initialized. This is an
immutable constraint of the ARM CPU architecture.
Signed-off-by: Salil Mehta
-(un)plug event
for the *targeted* vCPU.
Introduce the required ACPI calls into the existing hot-(un)plug hooks, allowing
ACPI GED events to be triggered from QEMU to the guest VM.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 39
: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 31 ++-
hw/intc/arm_gicv3_common.c | 60 +-
include/hw/arm/virt.h | 1 +
include/hw/intc/arm_gicv3_common.h | 23
4 files changed, 112 insertions
g cases.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
Reported-by: Vishnu Pajjuri
[4/05/2024: Issue with total number of PPI available during create GIC]
Suggested-by: Miguel Luis
[5/05/2024: Fix the total number of PPIs available as per ARM BSA to avoid
overflow]
S
ace.
4. Updating the guest with next boot information for this vCPU in the firmware.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 104 ++
1 file changed, 104 insertions(+)
diff --git a/
://bugzilla.tianocore.org/show_bug.cgi?id=4481#c5
Signed-off-by: Salil Mehta
---
target/arm/cpu64.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index d2f4624d61..c2af6a28f5 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -797,6 +797,13
/ACPI/6.5/05_ACPI_Software_Programming_Model.html#gic-cpu-interface-gicc-structure
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt-acpi-build.c | 36 ++--
include/hw/acpi/cpu.h| 19 +++
2 files
}
\_SB.GED.CSCN ()
}
}
}
Device (PWRB)
{
[...]
}
}
Signed-off-by: Salil Mehta
---
hw/arm/virt-acpi-build.c | 33 +++--
1 file changed, 23 insertions(+), 10
f-by: Jean-Philippe Brucker
Reviewed-by: Gavin Shan
Signed-off-by: Salil Mehta
---
hw/acpi/cpu.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
index d34c1e601e..2cbeedffe8 100644
--- a/hw/acpi/cpu.c
+++ b/hw/acpi/cpu.c
@@ -731,10 +731,
old ARMCPU object instead of creating
a new one for the hotplug request.
Each of these approaches has its own pros and cons. This prototype uses the
first approach (suggestions are welcome!).
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/v
until the ARM
specification is updated to allow otherwise.
Past discussion for reference:
Link: https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg00131.html
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/virt.c | 9 +
include
the Guest
Kernel.
Signed-off-by: Salil Mehta
Reviewed-by: Gavin Shan
---
hw/arm/virt.c | 5 -
include/hw/arm/virt.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 00fd65b4e1..b9df428049 100644
--- a/hw/arm/virt.c
+++ b/hw/arm
compatible with
ARM64.)
Enable the ACPI support switch for vCPU hotplug feature. Actual ACPI changes
required will follow in subsequent patches.
Co-developed-by: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff
: Keqian Zhu
Signed-off-by: Keqian Zhu
Signed-off-by: Salil Mehta
---
hw/intc/arm_gicv3.c| 1 +
hw/intc/arm_gicv3_cpuif.c | 245 ++---
hw/intc/arm_gicv3_cpuif_common.c | 13 ++
hw/intc/arm_gicv3_kvm.c| 14 +-
hw/intc
Signed-off-by: Salil Mehta
Reported-by: Vishnu Pajjuri
[VP: Identified CPU stall issue & suggested probable fix]
---
hw/arm/virt.c | 74 ++-
include/hw/core/cpu.h | 1 +
target/arm/cpu64.c| 9 ++
target/arm/kvm.c
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