: Peter Crosthwaite
Signed-off-by: Colin Leitner
---
hw/gpio/Makefile.objs |1 +
hw/gpio/zynq-gpio.c | 413 +++
include/hw/gpio/zynq-gpio.h | 79 +
3 files changed, 493 insertions(+)
create mode 100644 hw/gpio/zynq-gpio.c
create
Reviewed-by: Peter Crosthwaite
Signed-off-by: Colin Leitner
---
hw/arm/xilinx_zynq.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 06e6e24..6d8c0d9 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -202,6 +202,8
Hello everyone,
this is the fourth version of the Zynq GPIO model patch. It includes
* removal of unneeded memset in zynq_gpio_realize
* some minor code cleanup
* fixes for all remaining checkpatch warnings (lines too long)
Regards,
Colin
Colin Leitner (2):
zynq_gpio: GPIO model
: Colin Leitner
---
hw/gpio/Makefile.objs |1 +
hw/gpio/zynq-gpio.c | 402 +++
include/hw/gpio/zynq-gpio.h | 79 +
3 files changed, 482 insertions(+)
create mode 100644 hw/gpio/zynq-gpio.c
create mode 100644 include/hw/gpio
Signed-off-by: Colin Leitner
---
hw/arm/xilinx_zynq.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 06e6e24..6d8c0d9 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -202,6 +202,8 @@ static void zynq_init(MachineState
sets the IRQ output
lines to 0.
Regards,
Colin
Colin Leitner (2):
zynq_gpio: GPIO model for Zynq SoC
xilinx_zynq: Add zynq-gpio to the machine
hw/arm/xilinx_zynq.c|2 +
hw/gpio/Makefile.objs |1 +
hw/gpio/zynq-gpio.c | 402
: Colin Leitner
---
hw/gpio/Makefile.objs |1 +
hw/gpio/zynq-gpio.c | 386 +
hw/gpio/zynq-gpio.h | 79 ++
3 files changed, 466 insertions(+)
create mode 100644 hw/gpio/zynq-gpio.c
create mode 100644 hw/gpio/zynq-gpio.h
diff
Signed-off-by: Colin Leitner
---
hw/arm/xilinx_zynq.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 06e6e24..6d8c0d9 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -202,6 +202,8 @@ static void zynq_init(MachineState
to set the opaque data to another
value.
I retested basic I/O on different banks and IRQ handling. Both with the stock
Linux 3.12 driver.
Cheers,
Colin
Colin Leitner (2):
zynq_gpio: GPIO model for Zynq SoC
xilinx_zynq: Add zynq-gpio to the machine
hw/arm/xilinx_zynq.c |2
Hi Peter,
thanks for the review! I'll rework the patch ASAP.
> Is it better to just model the GPIO controller as a standalone GPIO,
> and leave the mio vs emio distinction to the SoC/Board level?
>
> This would mean the bank GPIOs are on the top level entity, and the
> core would then have no EM
3
Basic I/O tested with the Zynq GPIO driver in Linux 3.12.
Signed-off-by: Colin Leitner
---
hw/gpio/Makefile.objs |1 +
hw/gpio/zynq_gpio.c | 441 +
2 files changed, 442 insertions(+)
create mode 100644 hw/gpio/zynq_gpio.c
diff --git a/hw
Hello everyone,
I wrote the Zynq GPIO model a while ago and it proved useful in an internal
project, so maybe others will find it useful too.
Cheers,
Colin
Colin Leitner (2):
zynq_gpio: GPIO model for Zynq SoC
xilinx_zynq: Add zynq_gpio to the machine
hw/arm/xilinx_zynq.c |2
Signed-off-by: Colin Leitner
---
hw/arm/xilinx_zynq.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 06e6e24..6d8c0d9 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -202,6 +202,8 @@ static void zynq_init(MachineState
Linux 3.14. Level interrupt
handling hasn't been tested.
Signed-off-by: Colin Leitner
---
hw/gpio/pl061.c | 59 ++-
1 file changed, 45 insertions(+), 14 deletions(-)
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index dd4ea29..bd03e99 1
14 matches
Mail list logo