On 2025-04-29 11:20, Nina Schoetterl-Glausch wrote:
On Thu, 2025-04-10 at 17:09 +0200, Shalini Chellathurai Saroja wrote:
Implement the Service-Call Logical Processor (SCLP) event
type Control-Program Identification (CPI) in QEMU. This
event is used to send CPI identifiers from the guest to the
On 2025-04-28 11:22, Janis Schoetterl-Glausch wrote:
On Thu, 2025-04-10 at 17:09 +0200, Shalini Chellathurai Saroja wrote:
Implement the Service-Call Logical Processor (SCLP) event
type Control-Program Identification (CPI) in QEMU. This
event is used to send CPI identifiers from the guest to the
On Mon May 5, 2025 at 3:25 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:04, Nicholas Piggin wrote:
>> ahci-test has a bunch of tests where the pci bar was not mapped. Avoid
>> unmapping it in these cases, to keep iomaps balanced.
>>
>> Cc: Michael S. Tsirkin
>> Cc: Marcel Apfelbaum
>> Cc: Ak
On Mon May 5, 2025 at 3:05 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:04, Nicholas Piggin wrote:
>> msix messages are written to memory in little-endian order, so they
>> should not be byteswapped depending on target endianness, but read
>> as le and converted to host endian by the qtest.
>>
Hi Cédric
> Subject: RE: [PATCH v1 15/22] test/qtest/hace: Add SHA-384 test cases for
> ASPEED HACE model
>
> Hi Cédric,
>
> > Subject: Re: [PATCH v1 15/22] test/qtest/hace: Add SHA-384 test cases
> > for ASPEED HACE model
> >
> > On 3/21/25 10:26, Jamin Lin wrote:
> > > Introduced SHA-384 test
On Mon May 5, 2025 at 4:03 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:17, Nicholas Piggin wrote:
>> Timer expiry that results in an interrupt does not rearm the timer so
>> an interrupt can appear immediately after the interrupt generated by
>> timer expiry.
>>
>> Fix this by rearming the th
On Mon May 5, 2025 at 3:51 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:17, Nicholas Piggin wrote:
>> The msix interrupt throttling timer expiry sends an interrupt even if
>> there is no unmasked interrupt causes. This can be observed by seeing
>> two interrupts in response to a single event wh
On 2025/04/26 0:08, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Fri, Apr 25, 2025 at 08:14:13AM -0400, Michael S. Tsirkin wrote:
On Thu, Mar 06, 2025 at 03:16:26PM +0900, Akihiko Odaki wrote:
This series was spun off from:
"[PATCH 0/3] virtio-net: Convert feature properties to OnO
Hi Cédric
> Subject: Re: [PATCH v1 13/22] test/qtest: Introduce a new aspeed-hace-utils.c
> to place common testcases
>
> On 3/21/25 10:26, Jamin Lin wrote:
> > The test cases for the ASPEED HACE model were originally placed in
> > aspeed_hace-test.c. However, this test file only supports ARM32.
On 2025/02/07 21:46, Daniel P. Berrangé wrote:
On Fri, Feb 07, 2025 at 01:31:47PM +0100, Markus Armbruster wrote:
Akihiko Odaki writes:
[...]
Let me go back to the discussion of the bool/OnOffAuto problem below:
The values the command line syntax accepts are on/yes/true/y and off/no/false/n
On Mon May 5, 2025 at 3:45 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:16, Nicholas Piggin wrote:
>> The guest value xITR logic is not required now that the write functions
>> store necessary data to be read back, and internal users mask and shift
>> fields they need as they go.
>>
>> Signed-
On 02/05/2025 00.09, Philippe Mathieu-Daudé wrote:
Hello,
(patch merged as commit 90c066cd682).
On 11/8/22 14:24, Jonah Palmer wrote:
From: Laurent Vivier
This new command shows the status of a VirtIODevice, including
its corresponding vhost device's status (if active).
Next patch will impr
Hi Cédric,
> Subject: Re: [PATCH v1 15/22] test/qtest/hace: Add SHA-384 test cases for
> ASPEED HACE model
>
> On 3/21/25 10:26, Jamin Lin wrote:
> > Introduced SHA-384 test functions to verify hashing operations.
> > Extended support for scatter-gather (`_sg`) and accumulation (`_accum`)
> tests
On Mon May 5, 2025 at 3:41 PM AEST, Akihiko Odaki wrote:
> On 2025/05/02 12:16, Nicholas Piggin wrote:
>> The spec explicitly permits xITR register interval field to have a value
>> of zero to disable throttling. The e1000e model already allows for this
>> in the throttling logic, so remove the min
On 01/05/2025 17.12, Peter Xu wrote:
The old "num_timers" got a rename. See commit 1433e38cc8 ("hpet: do not
overwrite properties on post_load") for more details. Teach the script to
accept the new name.
Cc: Paolo Bonzini
Cc: Thomas Huth
Signed-off-by: Peter Xu
---
scripts/vmstate-static-
On 2025/05/02 12:17, Nicholas Piggin wrote:
Timer expiry that results in an interrupt does not rearm the timer so
an interrupt can appear immediately after the interrupt generated by
timer expiry.
Fix this by rearming the throttle timer when a delayed interrupt is
processed. e1000e gets this by
Il sab 3 mag 2025, 22:18 Pierrick Bouvier ha
scritto:
> Allows all tests to be visible by default when using meson test
> directly.
>
> This has no impact on make check-* commands, which use SPEED=quick by
> default (see scripts/mtest2make.py).
>
What's the advantage of having different defaults
On 2025/05/02 12:17, Nicholas Piggin wrote:
The msix interrupt throttling timer expiry sends an interrupt even if
there is no unmasked interrupt causes. This can be observed by seeing
two interrupts in response to a single event when throttling is active.
The e1000e non-msix paths seem to get th
On 2025/05/02 12:16, Nicholas Piggin wrote:
The guest value xITR logic is not required now that the write functions
store necessary data to be read back, and internal users mask and shift
fields they need as they go.
Signed-off-by: Nicholas Piggin
---
hw/net/e1000e_core.c | 31 +++
On 2025/05/02 12:16, Nicholas Piggin wrote:
The spec explicitly permits xITR register interval field to have a value
of zero to disable throttling. The e1000e model already allows for this
in the throttling logic, so remove the minimum value for the register.
The spec appears to say there is a m
On 2025/05/02 12:04, Nicholas Piggin wrote:
This function is duplicated 3 times, with more potential future users.
Factor it into libqos, using qtest_memset instead of qtest_writel to
clear the message just because that looks nicer with the qtest_memread
used to read it.
Reviewed-by: Philippe Ma
On 2025/05/02 12:04, Nicholas Piggin wrote:
ahci-test has a bunch of tests where the pci bar was not mapped. Avoid
unmapping it in these cases, to keep iomaps balanced.
Cc: Michael S. Tsirkin
Cc: Marcel Apfelbaum
Cc: Akihiko Odaki
Cc: Fabiano Rosas
Signed-off-by: Nicholas Piggin
---
tests
On 2025/05/02 12:04, Nicholas Piggin wrote:
msix messages are written to memory in little-endian order, so they
should not be byteswapped depending on target endianness, but read
as le and converted to host endian by the qtest.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Fabiano Rosas
Sig
On 2025/05/02 12:04, Nicholas Piggin wrote:
ahci-test double-maps the hba bar in the pending_callback test.
Unmap it first, to keep iomaps balanced.
Cc: Michael S. Tsirkin
Cc: Marcel Apfelbaum
Cc: Akihiko Odaki
Reviewed-by: Akihiko Odaki
Reviewed-by: Fabiano Rosas
Signed-off-by: Nicholas Pi
Hi Cédric
> Subject: Re: [PATCH v1 14/22] test/qtest/hace: Adjust test address range for
> AST1030 due to SRAM limitations
>
> On 3/21/25 10:26, Jamin Lin wrote:
> > The digest_addr is set to "src_addr + 0x100", where src_addr is
> > the DRAM base address. However, the value 0x100 (16MB) i
From: Tim Lee
Sent: Monday, April 28, 2025 10:30 AM
To: peter.mayd...@linaro.org; wuhao...@google.com; CS20 KFTing
; CS20 CHLi30
Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; Tim Lee
Subject: [PATCH] hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of
NPCM8XX SoC
NPCM8XX SoC is th
Hi Cédric
> Subject: Re: [PATCH v1 01/22] hw/misc/aspeed_hace: Remove unused code for
> better readability
>
> On 3/21/25 10:25, Jamin Lin wrote:
> > This cleanup follows significant changes in commit 4c1d0af4a28d,
> > making the model more readable.
> >
> > - Deleted "iov_cache" and "iov_count"
Introduce a new test suite for ast2700fc machine.
Rename the original test_aarch64_aspeed.py to
test_aarch64_aspeed_ast2700.py.
Signed-off-by: Steven Lee
Change-Id: I3855f55c9f6e5cca1270c179445f549f8d81f36c
---
...peed.py => test_aarch64_aspeed_ast2700.py} | 0
.../test_aarch64_aspeed_ast2700f
From: Tim Lee
Sent: Tuesday, April 1, 2025 4:59 PM
To: peter.mayd...@linaro.org
Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; wuhao...@google.com; CS20
CHLi30 ; CS20 KFTing ; Tim Lee
Subject: [PATCH] hw/arm/npcm8xx_boards: Add auto zero flash image and device
part number
Fix flash devic
From: Hao Wu
Sent: Wednesday, April 23, 2025 5:09 AM
To: Philippe Mathieu-Daudé
Cc: Tim Lee ; peter.mayd...@linaro.org; CS20 KFTing
; CS20 CHLi30 ; qemu-...@nongnu.org;
qemu-devel@nongnu.org
Subject: Re: [PATCH] hw/arm: Attach PSPI module to NPCM8XX SoC
On Mon, Apr 14, 2025 at 3:43 AM Philip
From: Tim Lee
Sent: Friday, April 18, 2025 5:12 PM
To: faro...@suse.de; lviv...@redhat.com; pbonz...@redhat.com;
wuhao...@google.com; CS20 KFTing ; CS20 CHLi30
Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; Tim Lee
Subject: [PATCH] tests/qtest: Add qtest for NPCM8XX PSPI module
- Created
On Fri May 2, 2025 at 1:30 PM AEST, Nicholas Piggin wrote:
> This is merged from two series now because code especially the test
> cases have started to depend on one another.
Question for the list, hw/usb/* is marked orphan. I don't have the
bandwidth to take it on. There's one or two other littl
Defined as an alias of i32/i64 depending on host pointer size.
Signed-off-by: Pierrick Bouvier
---
include/tcg/tcg-op-common.h| 1 +
include/tcg/tcg.h | 14 ++
include/exec/helper-head.h.inc | 11 +++
tcg/tcg.c | 5 +
4 files change
Need to stub cpu64 finalize functions.
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.c | 2 --
target/arm/cpu32-stubs.c | 26 ++
target/arm/meson.build | 11 +++
3 files changed,
Call is guarded by is_a64(env), so it's safe to expose without needing
to assert anything.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 37b11e8866f..0
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/vfp_helper.c | 4 +++-
target/arm/tcg/meson.build | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/vfp_helper.c b/target/arm/tcg/vfp_helper.c
index b32e2f4e27c..b1324c5c0a6 100644
--- a/target/arm/tcg/vfp_he
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index c8c80c3f969..06d479570e2 100644
--- a/target/arm/meson.build
+++ b/target/arm/meso
Other accelerators define a CONFIG_{accel}_IS_POSSIBLE when
COMPILING_PER_TARGET is not defined, except hvf.
Without this change, target/arm/cpu.c can't find hvf_enabled.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/system/hvf.h | 14 +-
accel/hvf/hvf
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/neon_helper.c | 4 +++-
target/arm/tcg/meson.build | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/neon_helper.c b/target/arm/tcg/neon_helper.c
index e2cc7cf4ee6..2cc8241f1e4 100644
--- a/target/arm/tcg/ne
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/iwmmxt_helper.c | 4 +++-
target/arm/tcg/meson.build | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/iwmmxt_helper.c b/target/arm/tcg/iwmmxt_helper.c
index 610b1b2103e..ba054b6b4db 100644
--- a/target/ar
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.h| 2 +-
target/arm/tcg/tlb_helper.c| 2 +-
target/arm/tcg/translate-a64.c | 2 +-
target/arm/tcg/translate.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm
Those become needed once kvm_enabled can't be known at compile time.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/kvm-stub.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c
index 4806365cdc5..34e57fab
Reviewed-by: Richard Henderson
Reviewed-by: Anton Johansson
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 07f279fec8c..37b11e8866f 100644
--- a/target/arm/cpu.c
+++ b/target/ar
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index de214fe5d56..48a6bf59353 100644
--- a/target/arm/meson.build
+++ b/target
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 151184da71c..29a36fb3c5e 100644
--- a/target/arm/meson.build
+++ b/target/arm/m
Associated code is protected by cpu_isar_feature(aa64*)
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/arch_dump.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c
index c
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 10384132090..7daf44e199d 100644
--- a/target/arm/helper.
From: Philippe Mathieu-Daudé
CPUARMState::pc is of type uint64_t.
Reviewed-by: Pierrick Bouvier
Reviewed-by: Alex Bennée
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/internals.h | 6 +++---
target/arm/hyp_gdbstub.c | 6 +++---
2 files changed, 6 ins
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/arith_helper.c | 4 +++-
target/arm/tcg/meson.build| 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/arith_helper.c b/target/arm/tcg/arith_helper.c
index 9a555c7966c..bc3c78c5011 100644
--- a/target/arm/tc
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/crypto_helper.c | 4 +++-
target/arm/tcg/meson.build | 8 +++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helper.c
index 7cadd61e124..ca14bd17a58 100644
--- a/tar
Avoid pulling helper.h which contains TARGET_AARCH64.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/debug_helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
index 473ee2af38e..357b
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/tlb_helper.c | 3 ++-
target/arm/tcg/meson.build | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c
index 4e3e96a2af0..feaa6025fc6 100644
--- a/target/arm/tcg/tlb_hel
This exposes two new subsections for arm: vmstate_sve and vmstate_za.
Those sections have a ".needed" callback, which already allow to skip
them when not needed.
vmstate_sve .needed is checking cpu_isar_feature(aa64_sve, cpu).
vmstate_za .needed is checking ZA flag in cpu->env.svcr.
Reviewed-by:
Needed in target/arm/cpu.c once kvm is possible.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/kvm-stub.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c
index 2b73d0598c1..e34d3f5e6b4 100644
--- a/target/arm
Allow later commits to include only the "new" tcg/helper.h, thus
preventing to pull aarch64 helpers (+ target/arm/helper.h contains a
ifdef TARGET_AARCH64).
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.h | 1152 +-
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/hflags.c| 4 +++-
target/arm/tcg/meson.build | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index e51d9f7b159..9fdc18d5ccb 100644
--- a/target/arm/tcg/hflags.c
+++ b/t
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 95a2b077dd6..7db573f4a97 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.
aarch64 specific code is guarded by cpu_isar_feature(aa64*), so it's
safe to expose it.
Signed-off-by: Pierrick Bouvier
---
target/arm/tcg/tlb-insns.c | 7 ---
target/arm/tcg/meson.build | 3 ++-
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/tlb-insns.c b/targ
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index bb1c09676d5..b404fa54863 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.
On MacOS x86_64:
In file included from ../target/i386/hvf/x86_task.c:13:
/Users/runner/work/qemu/qemu/include/system/hvf.h:42:5: error: unknown type
name 'vaddr'
vaddr pc;
^
/Users/runner/work/qemu/qemu/include/system/hvf.h:43:5: error: unknown type
name 'vaddr'
vaddr saved_insn;
sextract64 returns a signed value.
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/ptw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index e0e82ae507f..26c52e6b03e
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/machine.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 978249fb71b..f7956898fa1 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@
Allow to get rid of CONFIG_KVM in target/arm/cpu.c
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/kvm_arm.h | 2 ++
target/arm/cpu.c | 31 ---
target/arm/kvm-stub.c | 5 +
target/arm/kvm.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7fb6e886306..10384132090 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 29a36fb3c5e..bb1c09676d5 100644
--- a/target/
Following what we did for hw/, we need target specific common libraries
for target. We need 2 different libraries:
- code common to a base architecture
- system code common to a base architecture
For user code, it can stay compiled per target for now.
Reviewed-by: Richard Henderson
Signed-off-by
semihosting code needs to be included only if CONFIG_SEMIHOSTING is set.
However, this is a target configuration, so we need to apply it to the
libsystem libuser source sets.
Signed-off-by: Pierrick Bouvier
---
meson.build | 26 ++
1 file changed, 14 insertions(+), 12 del
They were hiding aarch64_sve_narrow_vq and aarch64_sve_change_el, which
we can expose safely.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.c | 8
1 file changed, 8 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7e07ed0
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/kvm_arm.h | 4 +++-
target/arm/kvm.c | 13 -
target/arm/machine.c | 8 +---
3 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index d156c7
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/debug_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
index 357bc2141ae..50ef5618f51 100644
--- a/
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 06d479570e2..95a2b077dd6 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.h| 2 +-
target/arm/tcg/op_helper.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 95b9211c6f4..0a4fc90fa8b 100644
--- a/target/arm/helper.h
+++ b/target/arm/helpe
This function needs 64 bit compare exchange, so we hide implementation
for hosts not supporting it (some 32 bit target, which don't run 64 bit
guests anyway).
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/ptw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
Add a forward decl for struct kvm_vcpu_init to avoid pulling all kvm
headers.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/kvm_arm.h | 83 +--
target/arm/kvm-stub.c | 77 +++
2 files ch
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index c39ddc4427b..89e305eb56a 100644
--- a/target/arm/meson.build
+++ b/target/arm
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 7db573f4a97..6e0327b6f5b 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.
It could be squashed with commit introducing it, but I would prefer to
introduce target/arm/cpu.c first.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/arm/meson.
associated define_arm_cp_regs are guarded by
"cpu_isar_feature(aa64_*)", so it's safe to expose that code for arm
target (32 bit).
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pierrick Bouvier
---
target/arm/helper.c | 7 ---
1 file changed, 7 deletions
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 6e0327b6f5b..151184da71c 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 48a6bf59353..c8c80c3f969 100644
--- a/target/arm/meson.build
+++ b/target/arm/meso
More work toward single-binary.
Some files have external dependencies for the single-binary:
- target/arm/gdbstub.c: gdbhelpers
- target/arm/arm-qmp-cmds.c: qapi
- target/arm/tcg/translate*: need deep cleanup in include/tcg
- target/arm/tcg/cpu*: need TargetInfo implemented for arm/aarch64
- targe
> Is this worth backporting to stable branches?
>
> Applied to target-arm.next, thanks.
>
> -- PMM
Hi Peter,
Thank you for taking the time to review this. I believe it is worth
backporting to stable branches.
The string "cortex-a9" and "cortex-a35" will point to different
ARMCPUInfo which could ca
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Friday, May 2, 2025 7:11 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; long...@lenovo.com; Yunl
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Friday, May 2, 2025 7:52 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; long...@lenovo.com; Yunl
On Fri May 2, 2025 at 6:24 PM AEST, Philippe Mathieu-Daudé wrote:
> On 2/5/25 05:30, Nicholas Piggin wrote:
>> msix
>
> Hmm? :)
Oops, thanks. Too much juggling around of the different patch series.
This depends on some of the libqos pci changes so I split it out (and
it's probably nicer to be sepa
Update the reference for QEMU's ACPI PCI hotplug device interface. Also,
use the possessive form in the comment.
Signed-off-by: Gustavo Romero
---
hw/i386/acpi-build.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 0dce155c8c
Fix duplicate preposition in comment.
Signed-off-by: Gustavo Romero
---
qom/object.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qom/object.c b/qom/object.c
index 664f0f24ae..7b013f40a0 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -485,7 +485,7 @@ bool object_apply_glo
In the header file, remove a stray empty comment in the Offload Context
Descriptor struct.
Signed-off-by: Gustavo Romero
---
hw/net/e1000x_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h
index cd896fc0ca..e9a74de6f4 100644
--
Fix missing "i" in the name of the function responsible for adding the call to
the PCI notification method (PCNT) in the ACPI table.
Signed-off-by: Gustavo Romero
---
hw/i386/acpi-build.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/a
Fix typo in a comment about the creation of the ACPI CRS method.
Signed-off-by: Gustavo Romero
---
hw/pci-host/gpex-acpi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index e8b4c64c5f..0aba47c71c 100644
--- a/hw/pci-host/g
Remove the ICH9_DEBUG macro, which is only used to dump the value of the
pm_io_base parameter, passed to ich9_pm_iospace_update(). It provides
little to no value and is not worth converting to a trace event.
Signed-off-by: Gustavo Romero
---
hw/acpi/ich9.c | 11 ---
1 file changed, 11 de
Fix typo and verb conjugation in a comment about FADT initialization.
Signed-off-by: Gustavo Romero
---
hw/i386/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 3fffa4a332..b5836417a0 100644
--- a/hw/i386/acpi-buil
Fix typo in QEMU's ACPI PCI hotplug API function name that checks
whether a given bus is hotplug-capable.
Signed-off-by: Gustavo Romero
---
hw/acpi/acpi-pci-hotplug-stub.c | 2 +-
hw/acpi/ich9.c | 2 +-
hw/acpi/pcihp.c | 2 +-
hw/acpi/piix4.c | 2
Remove stray empty comment in IRQ routing function.
Signed-off-by: Gustavo Romero
---
hw/isa/lpc_ich9.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 71afb45b63..304dffac32 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -182,7 +182,6 @@
Remove PCI_DPRINTF() macro and use trace events instead.
Signed-off-by: Gustavo Romero
---
hw/pci/pci.c| 19 ++-
hw/pci/trace-events | 4
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index fe38c4c028..352b3d12c8 100644
Fix indentation for some elements in the hardware compat arrays.
Signed-off-by: Gustavo Romero
---
hw/core/machine.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index ed01798d37..b8ae155dfa 100644
--- a/hw/core/machine.c
+++ b
On 5/2/25 2:45 PM, Philippe Mathieu-Daudé wrote:
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/target-info-impl.h | 4 +++-
target-info-stub.c | 1 +
target-info.c | 3 +++
3 files changed, 7 insertions(+), 1 deletion(-
On 5/2/25 2:45 PM, Philippe Mathieu-Daudé wrote:
Check legacy guests support at runtime: instead of evaluating
the VIRTIO_MEM_HAS_LEGACY_GUESTS definition at compile time,
call target_system_arch() to detect which target is being run at
runtime. Register virtio_mem_legacy_guests_properties[] at r
On 5/2/25 2:45 PM, Philippe Mathieu-Daudé wrote:
Remove unused "system/ram_addr.h" header. This file doesn't
use any target specific definitions anymore, compile it once
by moving it to system_virtio_ss[].
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: David Hildenbrand
---
hw/virtio/vir
On 5/2/25 2:45 PM, Philippe Mathieu-Daudé wrote:
Use target_system_arch() to check at runtime which target
architecture is being run.
Note, since TARGET_ARM is defined for TARGET_AARCH64, we
check for both ARM & AARCH64 enum values.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio/virtio-m
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