Bibo Mao writes:
> In function virt_cpu_unplug(), it will send cpu unplug message to
> interrupt controller extioi and ipi irqchip. If there is problem in
> this function, system should continue to run and keep state the same
> before cpu is removed.
>
> If error happends in cpu unplug stage, sen
On 3/20/25 11:41 AM, Andrew Jones wrote:
On Thu, Mar 20, 2025 at 07:25:07AM -0700, Andrea Bolognani wrote:
On Mon, Mar 03, 2025 at 01:46:53PM +1000, Alistair Francis wrote:
On Mon, Feb 24, 2025 at 10:32 PM Daniel Henrique Barboza
wrote:
We're missing scounteren and senvcfg CSRs, both alre
Hi
On Fri, Mar 21, 2025 at 7:40 AM wrote:
>
> From: Hyman Huang
>
> Our goal is to migrate VMs that are configured with qemu-vdagent-typed
> chardev while allowing the agent to continue working without having
> to restart the service in guest.
>
I sent a more complete series last week: "[PATCH
From: BALATON Zoltan
Coverity reported that return value of blk_pwrite() maybe should not
be ignored. We can't do much if this happens other than report an
error but let's do that to silence this report.
Resolves: Coverity CID 1593725
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
I tested the following features with this patch series, and there were
not issues:
- Creation and deletion of VFs
- Communication with an external machine through VFs
Thank you.
Yui
On 2025/03/14 15:14, Akihiko Odaki wrote:
Based-on:<20250104-reuse-v18-0-c349eafd8...@daynix.com>
("[PATC
Coverity discovered a potential shift overflow in group size calculation
in the case of a guest error. Add checks and logs to ensure a issues are
caught.
Make the group and crowd error checking code more similar to one another
while here.
Resolves: Coverity CID 1593724
Fixes: 9cb7f6ebed60 ("ppc/x
DSRR0/1 registers are in the BookE ISA not e200 specific, so
remove the duplicate e200 register definitions.
Cc: Roman Kapl
Cc: qemu-sta...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768
Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging")
Signed-off-by: Nicholas Piggin
Hello Steven,
On 3/21/25 03:54, Steven Lee wrote:
Hi Cédric,
-Original Message-
From: Cédric Le Goater
Sent: Thursday, March 20, 2025 11:29 PM
To: Steven Lee ; Peter Maydell
; Troy Lee ; Jamin Lin
; Andrew Jeffery
; Joel Stanley ; open
list:ASPEED BMCs ; open list:All patches CC here
Coverity reports a possible memory overflow in spapr_dt_pa_features().
This should not be a true bug since DAWR1 cap is only be true for
CPU_POWERPC_LOGICAL_3_10. Add an assertion to ensure any bug there is
caught.
Resolves: Coverity CID 1593722
Fixes: 5f361ea187ba ("ppc: spapr: Enable 2nd DAWR on
The comparison as written is always false (perhaps confusingly, because
the functions/macros are not really booleans but return 0 or the tested
bit value). Change to use logical-and.
Resolves: Coverity CID 1593721
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
---
hw/intc/xive2.c
I introduced this bug when "tidying" the original patch, not Frederic.
Paper bag for me.
Fixes: 9cb7f6ebed60 ("ppc/xive2: Support group-matching when looking for
target")
Signed-off-by: Nicholas Piggin
---
hw/intc/xive.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/int
This change takes the CPUPPCState 'quiesced' field added for powernv
hardware CPU core controls (used to stop and start cores), and extends
it to spapr to model the "RTAS stopped" state. This prevents the
schedulers attempting to run stopped CPUs unexpectedly, which can cause
hangs and possibly oth
Hi Daniel, Peter,
Please let me know if this latest patch looks good?
On 17/03/25 7:22 am, Manish Mishra wrote:
We allocate extra metadata SKBs in case of a zerocopy send. This metadata
memory is accounted for in the OPTMEM limit. If there is any error while
sending zerocopy packets or if zero
On 2025/03/21 14:18, Akihiko Odaki wrote:
On 2025/03/21 13:34, Yui Washizu wrote:
I tested the following features with this patch series, and there
were not issues:
- Creation and deletion of VFs
- Communication with an external machine through VFs
Thank you.
Can you reply with:
Tested
On 3/20/2025 20:22, Jason Wang wrote:
On Fri, Mar 21, 2025 at 12:45 AM Konstantin Shkolnyy wrote:
On 3/19/2025 19:58, Jason Wang wrote:
On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy wrote:
Upon reading this forum, I see that VHOST_VDPA_SET_CONFIG is
“deprecated”, and so VIRTIO_NET_CT
This patch set solves errors reported by coccinelle tool with commands:
spatch --sp-file scripts/coccinelle/*.cocci --dir target/loongarch/
spatch --sp-file scripts/coccinelle/*.cocci --dir hw/loongarch/
The main problem is that qemu should fail to run when feature is forced
to enabled however
This series focuses on removing compilation units duplication in hw/arm. We
start with this architecture because it should not be too hard to transform it,
and should give us some good hints on the difficulties we'll meet later.
We first start by making changes in global headers to be able to not
On Thu, Mar 20, 2025 at 7:24 PM Alexander Graf wrote:
>
> Hey Gerd,
>
> On 18.03.25 12:11, Gerd Hoffman wrote:
> >Hi,
> >
> >> Maybe not from the user's point of view, but surely for the vmfwupdate
> >> interface design and for the launch measurement calculations.
> >>
> >> When using igvm par
Now we made sure important defines are included using their direct
path, we can remove cpu.h from cpu-all.h.
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 2 --
accel/tcg/cpu-exec.c | 1 +
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/inc
Add index entry for LoongArch system and do some small modification
with LoongArch document with rst syntax.
Signed-off-by: Bibo Mao
Reviewed-by: Song Gao
---
docs/system/loongarch/virt.rst | 31 ++-
docs/system/target-loongarch.rst | 19 +++
docs/
The following changes since commit 1dae461a913f9da88df05de6e2020d3134356f2e:
Update version for v10.0.0-rc0 release (2025-03-18 10:18:14 -0400)
are available in the Git repository at:
https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250321
for you to fetch changes up to b8d5503a3e
From: Yao Zi
Clang on LoongArch only accepts fp register names in the dollar-prefixed
form, while GCC allows omitting the dollar. Change registers in ASM
clobbers to the dollar-prefixed form to make user emulators buildable
with Clang on loongarch64. No functional change invovled.
Cc: qemu-sta..
From: Song Gao
In expression 1ULL << tlb_ps, left shifting by more than 63 bits has
undefined behavior. The shift amount, tlb_ps, is as much as 64. check
"tlb_ps >=64" to fix.
Resolves: Coverity CID 1593475
Fixes: d882c284a3 ("target/loongarch: check tlb_ps")
Suggested-by: Peter Maydell
Signed
On 3/19/25 00:16, Philippe Mathieu-Daudé wrote:
On 18/3/25 22:31, Richard Henderson wrote:
Avoid testing CONFIG_USER_ONLY in semihost.h.
The only function that's required is semihosting_enabled.
Signed-off-by: Richard Henderson
---
include/semihosting/semihost.h | 29 ++--
From: Hyman Huang
The struct VDAgentChardev's caps, last_serial, and cbpending
fields need to be migrated in order to allow live migration
for vdagent. And the clipboard and mouse should be configured
to correspond with the previously negotiated caps on the
destination.
Signed-off-by: Hyman Huan
From: Hyman Huang
Our goal is to migrate VMs that are configured with qemu-vdagent-typed
chardev while allowing the agent to continue working without having
to restart the service in guest.
Let's justify which fields should be taken into account for struct
VDAgentChardev.
struct VDAgentChardev
On 2025/3/21 上午9:13, Song Gao wrote:
In expression 1ULL << tlb_ps, left shifting by more than 63 bits has
undefined behavior.
The shift amount, tlb_ps, is as much as 64. check "tlb_ps >=64" to fix.
Resolves: Coverity CID 1593475
Fixes: d882c284a3 ("target/loongarch: check tlb_ps")
Suggested-
In function virt_cpu_plug(), it will send cpu plug message to interrupt
controller extioi and ipi irqchip. If there is problem in this function,
system should continue to run and keep state the same before cpu is
added.
Object cpuslot::cpu is set at last only when there is no any error.
If there i
When there is an error, it is put into a local variable and then
propagated to somewhere else. Instead the error can be set right
away, error propagation can be removed.
Signed-off-by: Bibo Mao
Reviewed-by: Markus Armbruster
---
hw/loongarch/virt.c | 32 +++-
1 file
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
virt_cpu_irq_init() is
For some paravirt KVM features, if user forces to enable it however
KVM does not support, qemu should fail to run and exit immediately,
rather than continue to run. Here set error message and return directly
in function kvm_arch_init_vcpu().
Fixes: 6edd2a9bec90 (target/loongarch/kvm: Implement Loo
Signed-off-by: Pierrick Bouvier
---
hw/s390x/ipl.h | 1 +
include/exec/cpu-all.h | 3 ---
include/exec/exec-all.h | 1 +
include/exec/tlb-flags.h| 1 +
linux-user/sparc/target_syscall.h | 2 ++
hw/alpha/dp264.c| 1 +
To eliminate TARGET_AARCH64, we need to make various definitions common
between 32 and 64 bit Arm targets.
Added registers are used only by aarch64 code, and the only impact is on
the size of CPUARMState, and added zarray
(ARMVectorReg zarray[ARM_MAX_VQ * 16]) member (+64KB)
It could be eventually
applied to loongarch-next.
Regards
Bibo Mao
On 2025/3/14 上午11:31, Yao Zi wrote:
Clang on LoongArch only accepts fp register names in the dollar-prefixed
form, while GCC allows omitting the dollar. Change registers in ASM
clobbers to the dollar-prefixed form to make user emulators buildable
with
Signed-off-by: Pierrick Bouvier
---
hw/arm/meson.build | 112 ++---
1 file changed, 56 insertions(+), 56 deletions(-)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 9e8c96059eb..09b1cfe5b57 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.bui
On 3/19/25 2:09 PM, Eric Auger wrote:
Hi Nicolin,
On 3/19/25 6:14 PM, Nicolin Chen wrote:
On Wed, Mar 19, 2025 at 05:45:51PM +0100, Eric Auger wrote:
On 3/17/25 8:10 PM, Nicolin Chen wrote:
On Mon, Mar 17, 2025 at 07:07:52PM +0100, Eric Auger wrote:
On 3/17/25 6:54 PM, Nicolin Chen wro
On Fri, Mar 21, 2025 at 12:45 AM Konstantin Shkolnyy wrote:
>
> On 3/19/2025 19:58, Jason Wang wrote:
> > On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy
> > wrote:
> >> Upon reading this forum, I see that VHOST_VDPA_SET_CONFIG is
> >> “deprecated”, and so VIRTIO_NET_CTRL_MAC_ADDR_SET must
On 3/19/25 2:21 PM, Eric Auger wrote:
Hi Don,
On 3/19/25 5:21 PM, Donald Dutile wrote:
On 3/19/25 5:26 AM, Shameerali Kolothum Thodi wrote:
Hi Don,
Hey!
-Original Message-
From: Donald Dutile
Sent: Tuesday, March 18, 2025 10:12 PM
To: Shameerali Kolothum Thodi
; qemu-...@non
Prasad Pandit writes:
> On Tue, 11 Mar 2025 at 00:59, Fabiano Rosas wrote:
>> Peter Xu writes:
>> > To me, this is a fairly important question to ask. Fundamentally, the very
>> > initial question is why do we need periodic flush and sync at all. It's
>> > because we want to make sure new ver
On 3/19/25 1:04 PM, Eric Auger wrote:
On 3/18/25 10:22 PM, Donald Dutile wrote:
On 3/18/25 3:13 PM, Nicolin Chen wrote:
On Tue, Mar 18, 2025 at 07:31:36PM +0100, Eric Auger wrote:
On 3/17/25 9:19 PM, Nicolin Chen wrote:
On Mon, Mar 17, 2025 at 04:24:53PM -0300, Jason Gunthorpe wrote:
> -Original Message-
> From: Brian Cain
> Sent: Friday, February 28, 2025 11:28 PM
> To: qemu-devel@nongnu.org
> Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org;
> phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng;
> quic_mlie...@quicinc.com; ltaylorsi
On 3/18/25 17:23, Pierrick Bouvier wrote:
uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
{
- uint64_t raw, tgt;
+ uint64_t val;
- if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
- tgt = tswap64(raw);
- } else {
- tgt = cpu_ldq_code(en
We prevent common code to use this define by mistake.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/exec/poison.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index c72f56df921..d8495b1d358 100644
--- a/include/
On 3/20/25 05:43, Paolo Bonzini wrote:
Targets know whether they are big-endian more than they know if
the endianness is different from the host: the former is mostly
a constant, at least in machine creation code, while the latter
has to be computed with TARGET_BIG_ENDIAN != HOST_BIG_ENDIAN or
so
Signed-off-by: Pierrick Bouvier
---
hw/arm/xlnx-versal.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 278545a3f7b..f0b383b29ee 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -17,9 +17,7 @@
#include "hw/sysbus.h"
#include
On 3/20/25 15:29, Pierrick Bouvier wrote:
This series focuses on removing compilation units duplication in hw/arm. We
start with this architecture because it should not be too hard to transform it,
and should give us some good hints on the difficulties we'll meet later.
We first start by making
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 2 --
linux-user/qemu.h | 3 +++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index d2895fb55b1..74017a5ce7c 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/c
Now we eliminated poisoned identifiers from headers, this file can now
be compiled once for all arm targets.
Signed-off-by: Pierrick Bouvier
---
hw/arm/boot.c | 1 +
hw/arm/meson.build | 5 -
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
ind
This does not hurt, even if they are not used.
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a8a1a8faf6b..ab7412772bc 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -971,7 +971,6 @@ str
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index d4705210370..d4d05d82315 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -20,7 +20,6 @@
#define CPU_ALL_H
#in
We include this header where needed. When includes set already have
ifdef CONFIG_USER_ONLY, we add it here, else, we don't condition the
include.
Signed-off-by: Pierrick Bouvier
---
hw/s390x/ipl.h | 1 +
include/exec/cpu-all.h | 3 ---
target/arm/internals.h
Signed-off-by: Pierrick Bouvier
---
hw/arm/digic_boards.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 2492fafeb85..466b8b84c0e 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -80,7 +80,7 @@ static void d
Signed-off-by: Pierrick Bouvier
---
hw/arm/armv7m.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 98a69846119..c367c2dcb99 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -139,8 +139,9 @@ static MemTxResult v7m_sysre
This define is used only in accel/kvm/kvm-all.c, so we push directly the
definition there. Add more visibility to kvm_arch_on_sigbus_vcpu() to
allow removing this define from any header.
The architectures defining KVM_HAVE_MCE_INJECTION are i386, x86_64 and
aarch64.
Signed-off-by: Pierrick Bouvie
We introduce later a mechanism to skip cpu definitions inclusion, so we
can detect it here, and call the correct runtime function instead.
Signed-off-by: Pierrick Bouvier
---
include/exec/target_page.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/target_page.h b/include/ex
Do not rely on target dependent type, but use a fixed type instead.
Since the original type is unsigned, it should be safe to extend its
size without any side effect.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.h| 10 --
target/arm/tcg/hflag
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 1 -
target/ppc/mmu-hash64.h | 2 ++
target/i386/tcg/system/excp_helper.c | 1 +
target/i386/xsave_helper.c | 1 +
target/riscv/vector_helper.c | 1 +
5 files changed, 5 insertions(+), 1 dele
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h | 63
include/exec/tlb-flags.h | 87
accel/tcg/cputlb.c | 1 +
accel/tcg/user-exec.c| 1 +
semihosting/uaccess.c
This identifier is poisoned, so it can't be used from common code
anyway. We replace all occurrences with its definition directly.
Signed-off-by: Pierrick Bouvier
---
include/exec/cpu-all.h| 12
linux-user/syscall_defs.h | 2 +-
bsd-user/elfload.c| 6 +++---
hw/ppc/mac
On 3/19/25 11:22, Alex Bennée wrote:
For some of the helpers we need a temporary variable to copy from
although we could add some helpers to return pointers into env in
those cases if we wanted to.
Signed-off-by: Alex Bennée
---
target/arm/gdbstub64.c | 53 ++--
> -Original Message-
> From: ltaylorsimp...@gmail.com
> Sent: Thursday, March 20, 2025 2:45 PM
> To: 'Brian Cain' ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino
> (QUIC) ; a...@rev.ng; a...@rev.ng; Marco
> Liebel (QUIC) ; alex.ben...@lin
On Thu, 20 Mar 2025 at 20:09, Peter Maydell wrote:
> If you need WFE to work, that's certainly feasible and something it would
> be nice to see, but potentially quite a bit of work in the guts of QEMU's
> arm emulation. (Basically going to sleep on WFE is easy but then making
> sure that all the e
On Thu, Mar 20, 2025 at 12:34 PM Miles Glenn wrote:
>
> Hello,
>
> I am attempting to simulate a system with multiple CPU
> architectures. To do this I am starting a unique QEMU process for each
> CPU architecture that is needed. I'm also developing some QEMU code
> that aids in transporting MMIO
On 3/19/25 11:22, Alex Bennée wrote:
The aim of this work is to get rid of the endian aware helpers in
gdbstub/helpers.h which due to their use of tswap() mean target
gdbstubs need to be built multiple times. While this series doesn't
actually build each stub once it introduces a new helper -
gdb
On 3/19/25 11:22, Alex Bennée wrote:
Mainly as an aid to myself getting confused too many bswaps deep into
the code.
Signed-off-by: Alex Bennée
---
target/ppc/cpu.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index efab54a068.
On 3/20/25 12:30, Pierrick Bouvier wrote:
On 3/19/25 11:22, Alex Bennée wrote:
The current helper.h functions rely on hard coded assumptions about
target endianess to use the tswap macros. We also end up double
swapping a bunch of values if the target can run in multiple endianess
modes. Avoid t
On 3/19/25 11:22, Alex Bennée wrote:
The current helper.h functions rely on hard coded assumptions about
target endianess to use the tswap macros. We also end up double
swapping a bunch of values if the target can run in multiple endianess
modes. Avoid this by getting the target to pass the endia
+John
On 3/20/25 10:36, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: [PATCH for-10.1 13/32] vfio: Move VFIOAddressSpace helpers into
container-base.c
VFIOAddressSpace is a common object used by VFIOContainerBase which is
declared in "hw/vfio/vfio-contain
On 3/20/25 12:19, Pierrick Bouvier wrote:
On 3/20/25 04:55, Paolo Bonzini wrote:
Add a new assertion that is similar to "const { assert!(...) }" but can be used
outside functions and with older versions of Rust. A similar macro is found in
Linux, whereas the "static_assertions" crate has a cons
ping, any thoughts on this patch
On Wed, Feb 19, 2025 at 10:03:36AM +, Daniel P. Berrangé wrote:
> There are a number of resource leaks in gen-vdso. In theory they are
> harmless because this is a short lived process, but when building QEMU
> with --extra-cflags="-fsanitize=address" problems e
Hi,
I have been experimenting with the QEMU Userspace NVMe driver on s390x
architecture. I have noticed an issue when assigning multiple virtqueues
and multiple iothreads to the block device. The driver works well with a
single iothread, but when using more than one iothread we can hit a
prob
Christoph Müllner writes:
> On Mon, Mar 3, 2025 at 11:24 AM 汪鹏程 wrote:
>>
>> What about plugins under `tests/tcg/plugins/`?
>
> It feels a bit odd to install something from the tests directory.
> If certain plugins in tests/tcg/plugins are of general use (not just
> for testing) then it might be
> -Original Message-
> From: Richard Henderson
> Sent: Thursday, March 20, 2025 10:34 AM
> To: Sid Manning ; ltaylorsimp...@gmail.com;
> 'Philippe Mathieu-Daudé' ; 'Brian Cain'
> ; qemu-devel@nongnu.org
> Cc: Matheus Bernardino (QUIC) ;
> a...@rev.ng; a...@rev.ng; Marco Liebel (QUIC)
> ;
On 20/3/25 16:47, Philippe Mathieu-Daudé wrote:
Hi,
object_class_dynamic_cast() checks whether a class implements
a type name, and return the class casted appropriately. This
also works with interfaces, except when an interface is
implemented multiple times (by intermediate abstract parents /
in
On 2025/3/19 00:56, Peter Maydell wrote:
> On Sat, 15 Mar 2025 at 13:21, Zenghui Yu wrote:
> >
> > Commit a2260983c655 ("hvf: arm: Add support for GICv3") added GICv3 support
> > by implementing emulation for a few system registers. ICC_RPR_EL1 was
> > defined but not plugged in the sysreg handler
On 3/19/2025 19:58, Jason Wang wrote:
On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy wrote:
Upon reading this forum, I see that VHOST_VDPA_SET_CONFIG is
“deprecated”, and so VIRTIO_NET_CTRL_MAC_ADDR_SET must be the right
method, but it’s apparently called too late.
VHOST_VDPA_SET_CONFIG
On Thu, Mar 20, 2025 at 07:25:07AM -0700, Andrea Bolognani wrote:
> On Mon, Mar 03, 2025 at 01:46:53PM +1000, Alistair Francis wrote:
> > On Mon, Feb 24, 2025 at 10:32 PM Daniel Henrique Barboza
> > wrote:
> > > We're missing scounteren and senvcfg CSRs, both already present in the
> > > KVM UAPI
On Thu, Mar 20, 2025 at 11:45:29AM -0300, Fabiano Rosas wrote:
> There's a bunch of other issues as well:
>
> - no clear distinction between what should go in the header and what
> should go in the packet.
>
> - the header taking up one slot in the iov, which should in theory be
> responsibil
Hi Lei,
On 03/20, Lei Yang wrote:
> Hi Dragos, Si-Wei
>
> 1. I applied [0] [1] [2] to the downstream kernel then tested
> hotplug/unplug, this bug still exists.
>
> [0] 35025963326e ("vdpa/mlx5: Fix suboptimal range on iotlb iteration")
> [1] 29ce8b8a4fa7 ("vdpa/mlx5: Fix PA offset with unalign
Previously classes indirectly implementing an interface more than
once were triggering the ambiguous cast assertion. Since we are not
interested in the returned class, but only whether it implements or
not, use object_class_implements_type().
Signed-off-by: Philippe Mathieu-Daudé
---
qom/object.
Test TYPE_INDIRECT_IMPL (indirectly) implements
TYPE_TEST_IF (via TYPE_TEST_IF2A or TYPE_TEST_IF2B
interface).
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/check-qom-interface.c | 40
1 file changed, 40 insertions(+)
diff --git a/tests/unit/check-qom-int
When we only want to check a type is implemented and
are not interested by the returned class, prefer
object_class_implements_type() over object_class_dynamic_cast().
Signed-off-by: Philippe Mathieu-Daudé
---
chardev/char.c | 2 +-
hw/arm/xlnx-versal-virt.c | 2 +-
hw/core/cpu-commo
RFC FIXME: this doesn't work well :/
In the first iteration the TYPE_TEST_IF is ambiguous (matched 2 times)
so OBJECT_CLASS_CHECK() triggers the cast exception.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/check-qom-interface.c | 16
1 file changed, 16 insertions(+)
di
Add the object_class_implements_type() method to check whether
a class implement a type, which can be ambiguous for interfaces.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qom/object.h | 10 ++
qom/object.c | 11 +++
2 files changed, 21 insertions(+)
diff --git a/i
Hi,
object_class_dynamic_cast() checks whether a class implements
a type name, and return the class casted appropriately. This
also works with interfaces, except when an interface is
implemented multiple times (by intermediate abstract parents /
interfaces).
This series factors object_class_imple
In order to allow matching ambiguous types in the next commit,
factor object_class_dynamic_cast_ambiguous() out of
object_class_dynamic_cast().
Signed-off-by: Philippe Mathieu-Daudé
---
qom/object.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/qom/object.c
On Tue, 11 Mar 2025, Cornelia Huck wrote:
Yet another update of the id register series, less changes this time
around.
Changed from v2:
- changed generation of the various register defines via the "DEF"
magic suggested by Richard
- some kvm-only code moved to kvm.c; some code potentially useful
On Tue, 11 Mar 2025, Cornelia Huck wrote:
+++ b/target/arm/cpu.h
[...]
+/* REG is ID_XXX */
+#define FIELD_DP64_IDREG(ISAR, REG, FIELD, VALUE) \
+({ \
+ARMISARegisters *i_ = (ISAR);
On Wednesday, March 19, 2025 7:52:51 PM CET Greg Kurz wrote:
> On Wed, 19 Mar 2025 13:14:27 +0100
> Christian Schoenebeck wrote:
>
> > On Wednesday, March 19, 2025 11:08:58 AM CET Christian Schoenebeck wrote:
> > > According to 'man 2 close' errors returned by close() should only be used
> > > fo
On 3/20/25 07:58, Richard Henderson wrote:
On 3/19/25 10:16, Pierrick Bouvier wrote:
If I understand correctly, this is simply an (arbitrary) choice related to each
target
architecture implemented in QEMU, and it does not match any property of a
*real* cpu. Is
that correct?
Correct.
In oth
On 3/19/25 09:08, Sid Manning wrote:
-Original Message-
From: Richard Henderson
Sent: Thursday, March 13, 2025 2:07 PM
To: ltaylorsimp...@gmail.com; 'Philippe Mathieu-Daudé'
; 'Brian Cain' ; qemu-
de...@nongnu.org
Cc: Matheus Bernardino (QUIC) ;
a...@rev.ng; a...@rev.ng; Marco Liebel
Hello Steven,
On 3/20/25 10:25, Steven Lee wrote:
Updated the IRQ handler mask check to AND with select variable.
This ensures that the interrupt service routine is correctly triggered
for the interrupts within the same irq group.
For example, both `eth0` and the debug UART are handled in `GICI
> -use std::{ffi::CStr, ptr::addr_of_mut};
> +use std::{ffi::CStr, mem, ptr::addr_of_mut};
maybe mem::size_of (since there're 2 use cases :-))?
>
> use qemu_api::{
> +bindings,
> chardev::{CharBackend, Chardev, Event},
> +static_assert,
This one looks like it breaks the alphabet
According to 'man 2 close' errors returned by close() should only be used
for either diagnostic purposes or for catching data loss due to a previous
write error, as an error result of close() usually indicates a deferred
error of a previous write operation.
Therefore not decrementing 'total_open_f
Am 13.03.2025 um 12:53 hat Markus Armbruster geschrieben:
> Kevin Wolf writes:
>
> > Am 12.03.2025 um 15:37 hat Markus Armbruster geschrieben:
> >> bdrv_activate() returns failure without setting an error when
> >> !bs->drv. This is suspicious. Turns out it used to succeed then,
> >> until comm
Add a new assertion that is similar to "const { assert!(...) }" but can be used
outside functions and with older versions of Rust. Similar in concept (but
not in code) to the homonymous macro of the "static_assertions" crate.
Suggested-by: Peter Maydell
Signed-off-by: Paolo Bonzini
---
rust/qe
On Thu, Mar 20, 2025 at 01:32:47PM +, Peter Maydell wrote:
> Date: Thu, 20 Mar 2025 13:32:47 +
> From: Peter Maydell
> Subject: [PATCH 2/3] hw/char/pl011: Pad PL011State struct to same size as
> Rust impl
> X-Mailer: git-send-email 2.43.0
>
> We have some users of the PL011 struct which
On 3/20/25 04:59, Nicholas Piggin wrote:
Facility interrupt checks in general should come after the ISA version
check, because the facility interrupt and facility type themselves are
ISA dependent and should not appear on CPUs where the instruction does
not exist at all.
This resolves a QEMU cra
Hi Dragos, Si-Wei
1. I applied [0] [1] [2] to the downstream kernel then tested
hotplug/unplug, this bug still exists.
[0] 35025963326e ("vdpa/mlx5: Fix suboptimal range on iotlb iteration")
[1] 29ce8b8a4fa7 ("vdpa/mlx5: Fix PA offset with unaligned starting iotlb map")
[2] a6097e0a54a5 ("vdpa/m
On Mon Mar 17, 2025 at 11:13 PM AEST, BALATON Zoltan wrote:
> On Mon, 17 Mar 2025, Cédric Le Goater wrote:
>> On 3/14/25 21:01, BALATON Zoltan wrote:
>>> Coverity reported that return value of blk_pwrite() maybe should not
>>> be ignored. We can't do much if this happens other than report an
>>> er
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