(+John)
Hi Babu,
This patch is fine for me.
However, users recently reported an issue with SUCCOR support on AMD
hosts: https://gitlab.com/qemu-project/qemu/-/issues/2571.
Could you please double check and clarify that issue on AMD host?
Thanks,
Zhao
On Thu, Oct 24, 2024 at 05:18:20PM -0500,
Reviewed-by: Clément Mathieu--Drif
On 28/10/2024 03:25, Zhenzhong Duan wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> VT-d spec removed Transient Mapping (TM) field from second-level
On 2024/10/28 12:08, Shivaprasad G Bhat wrote:
On 10/22/24 2:06 PM, Akihiko Odaki wrote:
Disabled means it is a disabled SR-IOV VF and hidden from the guest.
Do not create DT when starting the system and also keep the disabled PCI
device not linked to DRC, which generates DT in case of hotplug.
Hi,
It's been a while since I gave my last update. I have one more update
that I would like to give.
> On Tue, Sep 24, 2024 at 7:31 AM Sahil wrote:
> > And I booted L2 by running:
> >
> > # ./qemu/build/qemu-system-x86_64 \
> > -nographic \
> > -m 4G \
> > -enable-kvm \
> > -M q35 \
> > -drive f
On 27/10/24 10:05, Paolo Bonzini wrote:
While right now 64-bit MIPS and 32-bit MIPS share the code in QEMU,
Rust uses different rules for the target. Set $cpu correctly to
either mips or mips64 (--cpu=mips64* is already accepted in the case
statement that canonicalizes cpu/host_arch/linux_arch),
On 10/27/24 15:26, Cédric Le Goater wrote:
On 10/27/24 23:11, Guenter Roeck wrote:
On 10/27/24 14:13, Cédric Le Goater wrote:
On 10/26/24 17:32, Guenter Roeck wrote:
On 10/26/24 03:02, Cédric Le Goater wrote:
[ ... ]
I don't mind a single file. What bothers me is that the partitioning is mad
On 27/10/24 10:07, Paolo Bonzini wrote:
The mipsel architecture is not available in Debian Bookworm, and it will
likely be a hard failure as soon as we drop support for the old Rust
toolchain in Debian Bullseye. Prepare by deprecating 32-bit little
endian MIPS in QEMU 9.2.
Signed-off-by: Paolo
On Thu, Oct 24, 2024 at 05:18:19PM -0500, Babu Moger wrote:
> Date: Thu, 24 Oct 2024 17:18:19 -0500
> From: Babu Moger
> Subject: [PATCH v3 1/7] target/i386: Fix minor typo in NO_NESTED_DATA_BP
> feature bit
> X-Mailer: git-send-email 2.34.1
>
> Rename CPUID_8000_0021_EAX_No_NESTED_DATA_BP to
>
On 10/22/24 2:06 PM, Akihiko Odaki wrote:
Disabled means it is a disabled SR-IOV VF and hidden from the guest.
Do not create DT when starting the system and also keep the disabled PCI
device not linked to DRC, which generates DT in case of hotplug.
Signed-off-by: Akihiko Odaki
---
hw/ppc/sp
When AVX10 enable bit is set, the 0x24 leaf will be present as "AVX10
Converged Vector ISA leaf" containing fields for the version number and
the supported vector bit lengths.
Tested-by: Xuelian Guo
Signed-off-by: Tao Su
---
target/i386/cpu.c | 40
t
Update GraniteRapids CPU model to add AVX10 and the missing features(ss,
tsc-adjust, cldemote, movdiri, movdir64b).
Tested-by: Xuelian Guo
Signed-off-by: Tao Su
---
target/i386/cpu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
ind
Introduce avx10-version property so that avx10 version can be controlled
by user and cpu model. Per spec, avx10 version can never be 0, the default
value of avx10-version is set to 0 to determine whether it is specified by
user.
Tested-by: Xuelian Guo
Signed-off-by: Tao Su
---
target/i386/cpu.c
Add AVX10.1 CPUID support, i.e. add AVX10 support bit via
CPUID.(EAX=07H, ECX=01H):EDX[bit 19] and new CPUID leaf 0x24H so that
guest OS and applications can query the AVX10 CPUIDs directly. The AVX10.1
spec can be found in [*], it is worth mentioning that
VL128 (CPUID.(EAX=24H, ECX=00H):EBX[bit 16
Since the highest supported vector length for a processor implies that
all lesser vector lengths are also supported, add the dependencies of
the supported vector lengths. If all vector lengths aren't supported,
clear AVX10 enable bit as well.
Note that the order of AVX10 related dependencies shoul
Intel AVX10 represents the first major new vector ISA since the
introduction of Intel AVX512, which will establish a common, converged
vector instruction set across all Intel architectures.
AVX10 enable bit is enumerated via CPUID.(EAX=7,ECX=1):EDX[bit 19]. Add
the CPUID definition for AVX10 enabl
AVX10 state enumeration in CPUID leaf D and enabling in XCR0 register
are identical to AVX512 state regardless of the supported vector lengths.
Given that some E-cores will support AVX10 but not support AVX512, add
AVX512 state components to guest when AVX10 is enabled.
Tested-by: Xuelian Guo
Si
Add unistd_64.h on arm64,loongarch and riscv platform, and update
linux headers to Linux v6.12-rc5.
Pass to compile on aarch64, arm, loongarch64, x86_64, i386, riscv64,
riscv32 softmmu and linux-user.
---
v2 ... v3:
1. Add unistd_64.h on arm64 and riscv platform also
2. Update header files to
>-Original Message-
>From: Liu, Yi L
>Sent: Friday, October 25, 2024 5:51 PM
>Subject: Re: [PATCH v4] intel_iommu: Introduce property "stale-tm" to control
>Transient Mapping (TM) field
>
>On 2024/10/23 15:57, Zhenzhong Duan wrote:
>> VT-d spec removed Transient Mapping (TM) field from s
KVM LBT supports on LoongArch depends on the linux-header file
kvm_para.h, add header file kvm_para.h here.
Signed-off-by: Bibo Mao
---
scripts/update-linux-headers.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 203f
update linux-headers to v6.12-rc5. Pass to compile on aarch64, arm,
loongarch64, x86_64, i386, riscv64,riscv32 softmmu and linux-user.
Signed-off-by: Bibo Mao
---
include/standard-headers/drm/drm_fourcc.h | 43 +++
include/standard-headers/linux/const.h| 17 +
include/standard-head
since 6.11, unistd.h includes header file unistd_64.h directly on
some platforms, here add unistd_64.h on these platforms. Affected
platforms are ARM64, LoongArch64 and Riscv. Otherwise there will
be compiling error such as:
linux-headers/asm/unistd.h:3:10: fatal error: asm/unistd_64.h: No such fi
Reviewed-by: Bibo Mao
On 2024/10/28 上午9:57, Sia Jee Heng wrote:
Update the SPCR table to accommodate the SPCR Table revision 4 [1].
The SPCR table has been modified to adhere to the revision 4 format [2].
[1]:
https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-con
VT-d spec removed Transient Mapping (TM) field from second-level page-tables
and treat the field as Reserved(0) since revision 3.2.
Changing the field as reserved(0) will break backward compatibility, so
introduce a property "stale-tm" to allow user to control the setting.
Use pc_compat_9_1 to ha
Signed-off-by: Sia Jee Heng
Reviewed-by: Sunil V L
Acked-by: Alistair Francis
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..aae97304
Update the SPCR table to accommodate the SPCR Table revision 4 [1].
The SPCR table has been modified to adhere to the revision 4 format [2].
Meanwhile, the virt SPCR golden reference file for RISC-V have been updated to
accommodate the SPCR Table revision 4.
[1]:
https://learn.microsoft.com/en-u
Update the virt SPCR golden reference file for RISC-V to accommodate the
SPCR Table revision 4 [1], utilizing the iasl binary compiled from the
latest ACPICA repository. The SPCR table has been modified to
adhere to the revision 4 format [2].
[1]:
https://learn.microsoft.com/en-us/windows-hardwar
Update the SPCR table to accommodate the SPCR Table revision 4 [1].
The SPCR table has been modified to adhere to the revision 4 format [2].
[1]:
https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/93
Thank you for reviewing, I'll summarize all of the patches.
On Fri, Oct 25, 2024 at 8:50 PM Daniel P. Berrangé
wrote:
> On Tue, Oct 22, 2024 at 10:29:48PM +0800, Dehan Meng wrote:
> > Replace g_new0() with g_autoptr() to simplify the code
> >
> > Signed-off-by: Dehan Meng
> > ---
> > qga/comma
okay, I'll summarize all of the patches. thanks for reviewing.
On Fri, Oct 25, 2024 at 8:48 PM Daniel P. Berrangé
wrote:
> On Tue, Oct 22, 2024 at 10:29:44PM +0800, Dehan Meng wrote:
> > sscanf return values are checked and add 'Null' check for
> > mandatory parameters.
> >
> > Signed-off-by: De
Thank you for the review comments Paolo. I will address any bits I did
wrong and not much the rest, it's obvious you have a disagreement over
how things are done and that's fine. This series does not attempt to
solve everything at once and arguing again and again over "this Trait
should have been O
On 10/27/24 23:11, Guenter Roeck wrote:
On 10/27/24 14:13, Cédric Le Goater wrote:
On 10/26/24 17:32, Guenter Roeck wrote:
On 10/26/24 03:02, Cédric Le Goater wrote:
[ ... ]
I don't mind a single file. What bothers me is that the partitioning is made
mandatory for ast2600 even if not used.
On 10/27/24 14:13, Cédric Le Goater wrote:
On 10/26/24 17:32, Guenter Roeck wrote:
On 10/26/24 03:02, Cédric Le Goater wrote:
[ ... ]
I don't mind a single file. What bothers me is that the partitioning is made
mandatory for ast2600 even if not used.
Our only use case, in 2019, was to boot Q
On 10/26/24 17:32, Guenter Roeck wrote:
On 10/26/24 03:02, Cédric Le Goater wrote:
[ ... ]
I don't mind a single file. What bothers me is that the partitioning is made
mandatory for ast2600 even if not used.
Our only use case, in 2019, was to boot QEMU ast2600 machines from an
eMMC device usi
From: Axel Heider
Suggested-by: Manos Pitsidianakis
Signed-off-by: Axel Heider
---
docs/devel/reset.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/devel/reset.rst b/docs/devel/reset.rst
index 3e64a7259f..adefd59ef9 100644
--- a/docs/devel/reset.rst
+++ b/docs/deve
From: Axel Heider
Signed-off-by: Axel Heider
---
docs/devel/reset.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/devel/reset.rst b/docs/devel/reset.rst
index 74c7c0171a..3e64a7259f 100644
--- a/docs/devel/reset.rst
+++ b/docs/devel/reset.rst
@@ -286,7 +286,7 @@ eve
v1:
- Add missing words in documentation
v2:
- add plural 's'
Axel Heider (2):
docs/devel/reset: add missing words
docs/devel/reset: add plural 's'
docs/devel/reset.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
2.45.2
Hello,
here is my second attempt to review this, this time placing the remarks
as close as possible to the code that is affected. However, the meat is
the same as in my previous replies to the 03/11 thread.
I hope this shows that I have practical concerns about the patch and
it's not just F
On 10/25/24 4:12 PM, dan tan wrote:
Add qtest cases to exercise main TPM locality functionality
The TPM device emulation is provided by swtpm, which is TCG
TPM 2.0, and TCG TPM TIS compliant. See
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1
On Sun, Oct 27, 2024 at 3:15 PM Paolo Bonzini wrote:
>
> On 10/27/24 10:49, Manos Pitsidianakis wrote:
> > On Fri, 25 Oct 2024 12:42, Paolo Bonzini wrote:
> >> Right now the Rust pl011 device is included in all QEMU system
> >> emulator binaries if --enable-rust is passed. This is not needed
> >
Add stub definition of memory_order enum in wrapper.h.
Creating Rust bindings from C code is done by passing the wrapper.h
header to `bindgen`. This fails when library dependencies that use
compiler headers are enabled, and the libclang that bindgen detects does
not match the expected clang versio
On 10/27/24 10:49, Manos Pitsidianakis wrote:
On Fri, 25 Oct 2024 12:42, Paolo Bonzini wrote:
Right now the Rust pl011 device is included in all QEMU system
emulator binaries if --enable-rust is passed. This is not needed
since the board logic in hw/arm/Kconfig will pick it.
Signed-off-by: Pa
27.10.2024 16:07, Paolo Bonzini wrote:
The mipsel architecture is not available in Debian Bookworm, and it will
likely be a hard failure as soon as we drop support for the old Rust
toolchain in Debian Bullseye. Prepare by deprecating 32-bit little
endian MIPS in QEMU 9.2.
Correction. mipsel *i
The mipsel architecture is not available in Debian Bookworm, and it will
likely be a hard failure as soon as we drop support for the old Rust
toolchain in Debian Bullseye. Prepare by deprecating 32-bit little
endian MIPS in QEMU 9.2.
Signed-off-by: Paolo Bonzini
---
docs/about/build-platforms.r
While right now 64-bit MIPS and 32-bit MIPS share the code in QEMU,
Rust uses different rules for the target. Set $cpu correctly to
either mips or mips64 (--cpu=mips64* is already accepted in the case
statement that canonicalizes cpu/host_arch/linux_arch), and adjust
the checks to account for the
Il dom 27 ott 2024, 10:43 Michael Tokarev ha scritto:
> 27.10.2024 12:38, Michael Tokarev wrote:
> > 27.10.2024 11:00, Paolo Bonzini wrpte:
> >
> > [rustc-web]
> >
> >> Thanks for pointing it out! It is indeed better, however it does not
> >> support mipsel.
> >
> > mipsel? do you mean mips64el?
Am Wed, 23 Oct 2024 09:58:24 +0100
schrieb Mark Cave-Ayland :
> This device is intended to hold the ESP SCSI controller and the NeXT SCSI
> CSRs.
> Start by creating the device and moving the ESP SCSI controller to be an
> embedded child device.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m
Am Sat, 26 Oct 2024 22:13:25 +0100
schrieb Mark Cave-Ayland :
> On 26/10/2024 08:56, Thomas Huth wrote:
>
> > Am Wed, 23 Oct 2024 09:58:19 +0100
> > schrieb Mark Cave-Ayland :
> >
> >> Change the start of the next.mmio memory region so that it follows on
> >> directly
> >> after the next.dma
Am Wed, 23 Oct 2024 09:58:23 +0100
schrieb Mark Cave-Ayland :
> Move initialisation of the memory regions and GPIOs from next_pc_realize() to
> the new next_pc_init() function.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/next-cube.c | 17 +++--
> 1 file changed, 11 insertion
Hello Axel,
On Thu, 17 Oct 2024 20:58, ~axelheider wrote:
>From: Axel Heider
>
>Signed-off-by: Axel Heider
>---
> docs/devel/reset.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/docs/devel/reset.rst b/docs/devel/reset.rst
>index 74c7c0171a..3e64a7259f 100644
>--- a/d
Am Wed, 23 Oct 2024 09:58:22 +0100
schrieb Mark Cave-Ayland :
> This reflects that the SCSI interface exists within the NeXT Peripheral
> Controller (PC).
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/next-cube.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: T
27.10.2024 12:42, Michael Tokarev пишет:
27.10.2024 12:38, Michael Tokarev wrote:
27.10.2024 11:00, Paolo Bonzini wrpte:
[rustc-web]
Thanks for pointing it out! It is indeed better, however it does not
support mipsel.
mipsel? do you mean mips64el?
Please note upstream rust does not provi
On Fri, 25 Oct 2024 12:42, Paolo Bonzini wrote:
>Right now the Rust pl011 device is included in all QEMU system
>emulator binaries if --enable-rust is passed. This is not needed
>since the board logic in hw/arm/Kconfig will pick it.
>
>Signed-off-by: Paolo Bonzini
>---
> rust/hw/char/Kconfig | 1
27.10.2024 12:38, Michael Tokarev wrote:
27.10.2024 11:00, Paolo Bonzini wrpte:
[rustc-web]
Thanks for pointing it out! It is indeed better, however it does not
support mipsel.
mipsel? do you mean mips64el?
Ah. I see what you mean.
https://buildd.debian.org/status/package.php?p=rustc-web&
27.10.2024 11:00, Paolo Bonzini wrpte:
[rustc-web]
Thanks for pointing it out! It is indeed better, however it does not
support mipsel.
mipsel? do you mean mips64el?
/mjt
On Sat, Oct 26, 2024 at 12:06 PM Manos Pitsidianakis
wrote:
> Please reply with review comments underneath individual patches, this
> is hard to follow and I might miss some points.
Will do.
> > >Revert "rust: add PL011 device model"
> > >rust: add PL011 device model
> >
> > ...
On Sun, Oct 27, 2024 at 8:02 AM Michael Tokarev wrote:
>i
> I think this is the wrong direction (ie, backwards).
>
> Sacrificing current code to be compatible with old stuff feels wrong.
> Especially for really old, like rustc in debian bookworm.
>
> bookworm has rustc-web (and a few related packa
I think this is the wrong direction (ie, backwards).
Sacrificing current code to be compatible with old stuff feels wrong.
Especially for really old, like rustc in debian bookworm.
bookworm has rustc-web (and a few related packages) which is regular
rustc version 1.78, just renamed. It is regul
57 matches
Mail list logo
