On 29/7/24 22:48, Heinrich Schuchardt wrote:
processor-family and processor-id can be assigned independently.
Add missing brackets.
Fixes: b5831d79671c ("smbios: add processor-family option")
Signed-off-by: Heinrich Schuchardt
---
qemu-options.hx | 2 +-
1 file changed, 1 insertion(+), 1 de
On 30/7/24 03:11, Richard Henderson wrote:
Tomli is now required by configure.
Signed-off-by: Richard Henderson
---
tests/vm/openbsd | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Philippe Mathieu-Daudé
On 29/07/2024 23:32, Richard Henderson wrote:
> On 7/30/24 00:20, Clément Léger wrote:
>>
>>
>> On 29/07/2024 16:00, Philippe Mathieu-Daudé wrote:
>>> Hi Clément,
>>>
>>> On 26/7/24 09:54, Clément Léger wrote:
Since commit 03e471c41d8b ("qemu_init: increase NOFILE soft limit on
POSIX")
On 7/30/24 03:53, Deepak Gupta wrote:
+/* set or clear branch tracking */
+env->ufcfien = (flag & PR_INDIR_BR_LP_ENABLE);
+tb_flush(env_cpu(env));
tb_flush is not required when you track enable properly in patch 5.
r~
On 7/30/24 03:53, Deepak Gupta wrote:
Each application enables indirect branch tracking (forward cfi) for itself
via prctl. Adding branch tracking prctl in linux-user/syscall.
Using same prctl code as proposed in cfi patches in kernel mailing list [1]
[1] - https://lore.kernel.org/all/202404032
Em Mon, 29 Jul 2024 17:31:09 +0100
Jonathan Cameron escreveu:
> On Mon, 29 Jul 2024 15:21:10 +0200
> Mauro Carvalho Chehab wrote:
...
> Markus suggested:
>
> > A target-specific command like this one should be conditional. Try
> > this:
> >
> > { 'command': 'arm-inject-error',
> >
On Mon, Jul 29, 2024 at 6:55 PM Kevin Wolf wrote:
> Ok, so modifying the commit message and removing the 'error'
> initialisation it is. Maybe mention the cluster validation case in the
> comment here to explain why we do this even for non-pr-manager cases,
> but not as a FIXME or TODO because it'
On 7/30/24 11:11, Richard Henderson wrote:
The following changes since commit 93b799fafd9170da3a79a533ea6f73a18de82e22:
Merge tag 'pull-ppc-for-9.1-2-20240726-1' of https://gitlab.com/npiggin/qemu
into staging (2024-07-26 15:10:45 +1000)
are available in the Git repository at:
https://g
Em Mon, 29 Jul 2024 17:08:40 +0100
Jonathan Cameron escreveu:
> On Mon, 29 Jul 2024 15:21:06 +0200
> Mauro Carvalho Chehab wrote:
>
> > From: Jonathan Cameron
> >
> > Creates a Generic Event Device (GED) as specified at
>
> I wrote this a while back and wasn't aware of the naming
> mess ar
At present, cpu_x86_cpuid() silently masks off SGX_LC if SGX is absent.
This is not proper because the user is not told about the dependency
between the two.
So explicitly define the dependency between SGX_LC and SGX feature
words, so that user could get a warning when SGX_LC is enabled but
SGX i
CPUID.0x7.0.ebx and CPUID.0x7.0.ecx leaves have been expressed as the
feature word lists, and the Host capability support has been checked
in x86_cpu_filter_features().
Therefore, such checks on SGX feature "words" are redundant, and
the follow-up adjustments to those feature "words" will not actu
Only PC machine supports SGX, so mask off SGX related feature words for
non-PC machine (microvm).
Signed-off-by: Zhao Liu
---
hw/i386/sgx-stub.c| 5 +
hw/i386/sgx.c | 8
include/hw/i386/sgx-epc.h | 1 +
target/i386/cpu.c | 15 +++
4 files c
As SDM stated, CPUID 0x12 leaves depend on CPUID_7_0_EBX_SGX (SGX
feature word).
Since FEAT_SGX_12_0_EAX, FEAT_SGX_12_0_EBX and FEAT_SGX_12_1_EAX define
multiple feature words, add the dependencies of those registers to
report the warning to user if SGX is absent.
Signed-off-by: Zhao Liu
---
ta
Hi,
Currently, only PC machine supports SGX and microvm doesn't.
The commit 13be929aff80 ("target/i386: do not crash if microvm guest
uses SGX CPUID leaves") has cleaned up the CPUID 0x12.{0x2..N} for
microvm to avoid Guest crash.
Per my comment on that commit [1], microvm deserves more cleanup
On 7/30/24 00:44, Alex Bennée wrote:
From: Peter Maydell
In append_stats_line(), we have an expression
l2_access ? l2_miss_rate : 0.0
But this is inside an if (l2_access && l2_misses) { ... } block,
so Coverity points out that the false part of the ?: is dead code.
Remove the unnecessary te
On Tue, Jul 30, 2024 at 11:29 AM Akihiko Odaki wrote:
>
> On 2024/07/30 12:17, Jason Wang wrote:
> > On Tue, Jul 30, 2024 at 11:12 AM Akihiko Odaki
> > wrote:
> >>
> >> On 2024/07/30 12:03, Jason Wang wrote:
> >>> On Tue, Jul 30, 2024 at 10:57 AM Akihiko Odaki
> >>> wrote:
>
> On 202
On Tue, Jul 30, 2024 at 11:29 AM Zhao Liu wrote:
>
> On Tue, Jul 30, 2024 at 10:54:07AM +0800, Jason Wang wrote:
> > Date: Tue, 30 Jul 2024 10:54:07 +0800
> > From: Jason Wang
> > Subject: Re: [PATCH] doc/net/l2tpv3: Update boolean fields' description to
> > avoid short-form use
> >
> > On Wed,
On 2024/07/30 11:04, Jason Wang wrote:
On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki wrote:
On 2024/07/29 23:29, Peter Xu wrote:
On Mon, Jul 29, 2024 at 01:45:12PM +0900, Akihiko Odaki wrote:
On 2024/07/29 12:50, Jason Wang wrote:
On Sun, Jul 28, 2024 at 11:19 PM Akihiko Odaki wrote:
On
On Tue, Jul 30, 2024 at 10:54:07AM +0800, Jason Wang wrote:
> Date: Tue, 30 Jul 2024 10:54:07 +0800
> From: Jason Wang
> Subject: Re: [PATCH] doc/net/l2tpv3: Update boolean fields' description to
> avoid short-form use
>
> On Wed, Jul 17, 2024 at 2:15 PM Zhao Liu wrote:
> >
> > Hi Jason,
> >
>
On 2024/07/30 12:17, Jason Wang wrote:
On Tue, Jul 30, 2024 at 11:12 AM Akihiko Odaki wrote:
On 2024/07/30 12:03, Jason Wang wrote:
On Tue, Jul 30, 2024 at 10:57 AM Akihiko Odaki wrote:
On 2024/07/30 11:04, Jason Wang wrote:
On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki wrote:
On 2024
On 2024/07/30 12:03, Jason Wang wrote:
On Tue, Jul 30, 2024 at 10:57 AM Akihiko Odaki wrote:
On 2024/07/30 11:04, Jason Wang wrote:
On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki wrote:
On 2024/07/29 23:29, Peter Xu wrote:
On Mon, Jul 29, 2024 at 01:45:12PM +0900, Akihiko Odaki wrote:
On
On Tue, Jul 30, 2024 at 11:12 AM Akihiko Odaki wrote:
>
> On 2024/07/30 12:03, Jason Wang wrote:
> > On Tue, Jul 30, 2024 at 10:57 AM Akihiko Odaki
> > wrote:
> >>
> >> On 2024/07/30 11:04, Jason Wang wrote:
> >>> On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki
> >>> wrote:
>
> On 202
On Tue, Jul 30, 2024 at 10:57 AM Akihiko Odaki wrote:
>
> On 2024/07/30 11:04, Jason Wang wrote:
> > On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki
> > wrote:
> >>
> >> On 2024/07/29 23:29, Peter Xu wrote:
> >>> On Mon, Jul 29, 2024 at 01:45:12PM +0900, Akihiko Odaki wrote:
> On 2024/07/29
On Wed, Jul 17, 2024 at 2:15 PM Zhao Liu wrote:
>
> Hi Jason,
>
> Just a kind ping. Does this update satisfy you?
> Since the original example generates the warning.
>
> Thanks,
> Zhao
Queued.
Thanks
processor-family and processor-id can be assigned independently.
Add missing brackets.
Fixes: b5831d79671c ("smbios: add processor-family option")
Signed-off-by: Heinrich Schuchardt
---
qemu-options.hx | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qemu-options.hx b/qemu-op
On 7/15/24 19:15, Daniel Henrique Barboza wrote:
Update OpenSBI and the pre-built opensbi32 and opensbi64 images to
v1.5.
The following commits were included in v1.5:
455de67 include: Bump-up version to 1.5
23b7bad lib: sbi: check incoming dbtr shmem address
0e45b63 docs: Fix wrong filename
caa
On Mon, Jul 29, 2024 at 05:02:26PM GMT, Alberto Garcia wrote:
> This tool converts a disk image to qcow2, writing the result directly
> to stdout. This can be used for example to send the generated file
> over the network.
Overall seems like a useful idea to me.
>
> This is equivalent to using q
On 7/30/24 00:44, Alex Bennée wrote:
Update the document with details about the layout of tests. Remove the
out of date cris comments. Refer to the developer guide for details
about how to run the tests.
Signed-off-by: Alex Bennée
---
tests/tcg/README | 23 ++-
1 file chan
On 7/30/24 00:44, Alex Bennée wrote:
The devel section is getting quite messy with the breakdown of the
example plugins which should be usable by users. As we mention plugins
in the emulation section along with semihosting move the overview
there leaving the development section about the details
On Fri, Jun 28, 2024 at 11:58:37AM GMT, Alexander Ivanov wrote:
> Ping?
>
> On 6/7/24 17:00, Alexander Ivanov wrote:
> > static void nbd_blockdev_client_closed(NBDClient *client, bool ignored)
> > {
> > nbd_client_put(client);
> > +if (nbd_server == NULL) {
> > +return;
> > +
On 7/30/24 00:44, Alex Bennée wrote:
From: Daniel P. Berrangé
The lcitool created containers save the full distro package list
details into /packages.txt. The idea is that build jobs will 'cat'
this file, so that the build log has a record of what packages
were used. This is important info, beca
On 7/30/24 03:53, Deepak Gupta wrote:
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index acba90f170..c746d7df08 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -20,6 +20,7 @@
#include "qemu/log.h"
#include "cpu.h"
#include "tcg/tcg-op.h"
+#include
On Mon 29 Jul 2024 03:20:18 PM -05, Eric Blake wrote:
> On Mon, Jul 29, 2024 at 05:02:26PM GMT, Alberto Garcia wrote:
>> +# qcow2 files produced by this script are always arranged like this:
>> +#
>> +# - qcow2 header
>> +# - refcount table
>> +# - refcount blocks
>> +# - L1 table
>> +# - L2 tables
On 7/30/24 00:44, Alex Bennée wrote:
Since 6f6ca067d2 (tests/tcg: add some help output for running
individual tests) we made it easier to run individual tests for a
given architecture. Lets reference that in the developer
documentation.
Signed-off-by: Alex Bennée
---
docs/devel/testing.rst | 1
On 7/30/24 00:44, Alex Bennée wrote:
Since 4f8d886085 (tests/plugin/mem: migrate to new per_vcpu API) this
test was skipping due to not being able to run callback and inline
memory instrumentation at the same time.
However b480f7a621 (tests/plugin: add test plugin for inline
operations) tests fo
On Mon, Jul 29, 2024 at 03:51:17PM GMT, Fiona Ebner wrote:
> > In particular, tests/qemu-img-bitmaps gives the magic decoder ring:
> >
> > | # x-dirty-bitmap is a hack for reading bitmaps; it abuses block status to
> > | # report "data":false for portions of the bitmap which are set
> > | IMG="dri
Thanks Richard.
On Tue, Jul 30, 2024 at 09:04:29AM +1000, Richard Henderson wrote:
On 7/30/24 03:53, Deepak Gupta wrote:
elp state is recorded in *status on trap entry (less privilege to higher
privilege) and restored in elp from *status on trap exit (higher to less
privilege).
Additionally th
On 7/30/24 00:44, Alex Bennée wrote:
From: Daniel P. Berrangé
The lcitool created containers save the full distro package list
details into /packages.txt. The idea is that build jobs will 'cat'
this file, so that the build log has a record of what packages
were used. This is important info, beca
From: Fabio D'Urso
The num_threads field reports the total number of threads in the
process. In QEMU, this is equal to the number of CPU instances.
Signed-off-by: Fabio D'Urso
Reviewed-by: Alex Bennée
Message-ID: <20240619194109.248066-1-fdu...@google.com>
Signed-off-by: Richard Henderson
---
From: Brad Smith
Signed-off-by: Brad Smith
Message-ID:
Signed-off-by: Richard Henderson
---
util/cpuinfo-aarch64.c | 9 ++---
util/cpuinfo-ppc.c | 5 +++--
util/getauxval.c | 2 +-
meson.build| 8
4 files changed, 18 insertions(+), 6 deletions(-)
diff --git
Am 29. Juli 2024 09:26:19 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 14/1/24 13:39, Bernhard Beschow wrote:
>> Some SuperI/O devices such as the VIA south bridges or the PC87312 controller
>> are able to relocate their SuperI/O functions. Add a convenience function for
>> implementing this in t
On 7/30/24 00:44, Alex Bennée wrote:
You cannot use plugins without TCG enabled so it doesn't make sense to
have them separated off in the test directory structure. While we are
at it rename the directory to plugins to reflect the plural nature of
the directory and match up with contrib/plugins.
On 7/30/24 00:44, Alex Bennée wrote:
Move the mention of "check-help" up to the intro text and also mention
the meson test integration.
Signed-off-by: Alex Bennée
---
docs/devel/testing.rst | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
Reviewed-by: Richard Hen
The following changes since commit 93b799fafd9170da3a79a533ea6f73a18de82e22:
Merge tag 'pull-ppc-for-9.1-2-20240726-1' of https://gitlab.com/npiggin/qemu
into staging (2024-07-26 15:10:45 +1000)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-misc-20240
From: Vivian Wang
It's possible for AT_EXECFD to end up with a valid value of 0. Check
errno when using qemu_getauxval instead of return value to handle this
case.
Not handling this case leads to a confusing condition where the
executable ends up as fd 0, i.e. stdin.
Signed-off-by: Vivian Wang
Tomli is now required by configure.
Signed-off-by: Richard Henderson
---
tests/vm/openbsd | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/vm/openbsd b/tests/vm/openbsd
index 5e646f7c51..49cab08782 100755
--- a/tests/vm/openbsd
+++ b/tests/vm/openbsd
@@ -32,6 +32,7 @@ class OpenBSDVM(ba
Using int32_t meant that the address was sign-extended to uint64_t
when passing to translator_ld*, triggering an assert.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2453
Signed-off-by: Richard Henderson
Tested-by: Thomas Huth
---
target/rx/translate.c | 3 ++-
1 file changed, 2 inse
On 7/30/24 03:53, Deepak Gupta wrote:
elp state is recorded in *status on trap entry (less privilege to higher
privilege) and restored in elp from *status on trap exit (higher to less
privilege).
Additionally this patch introduces a forward cfi helper function to
determine if current privilege h
On 7/29/24 16:37, Markus Armbruster wrote:
The following changes since commit 93b799fafd9170da3a79a533ea6f73a18de82e22:
Merge tag 'pull-ppc-for-9.1-2-20240726-1' ofhttps://gitlab.com/npiggin/qemu
into staging (2024-07-26 15:10:45 +1000)
are available in the Git repository at:
https://re
On 7/30/24 00:20, Clément Léger wrote:
On 29/07/2024 16:00, Philippe Mathieu-Daudé wrote:
Hi Clément,
On 26/7/24 09:54, Clément Léger wrote:
Since commit 03e471c41d8b ("qemu_init: increase NOFILE soft limit on
POSIX"), the maximum number of file descriptors that can be opened are
raised to n
From: Vivian Wang
Sometimes zero is a valid value for getauxval (e.g. AT_EXECFD). Make
sure that we can distinguish between a valid zero value and a not found
entry by setting errno.
Assumes that getauxval from sys/auxv.h sets errno correctly.
Signed-off-by: Vivian Wang
Message-ID: <2024072310
With pcrel, we cannot check the guarded page bit at translation
time, as different mappings of the same physical page may or may
not have the GP bit set.
Instead, add a couple of helpers to check the page at runtime,
after all other filters that might obviate the need for the check.
The set_btype
On Tue, Jul 30, 2024 at 12:43 AM Akihiko Odaki wrote:
>
> On 2024/07/29 23:29, Peter Xu wrote:
> > On Mon, Jul 29, 2024 at 01:45:12PM +0900, Akihiko Odaki wrote:
> >> On 2024/07/29 12:50, Jason Wang wrote:
> >>> On Sun, Jul 28, 2024 at 11:19 PM Akihiko Odaki
> >>> wrote:
>
> On 2024/07
+bitmap_zero(deprecated_feats, S390_FEAT_MAX);
+s390_get_deprecated_features(deprecated_feats);
+
+if (delta_changes) {
+/*
+ * Only populate deprecated features that are a
+ * subset of the features enabled on the CPU model.
+ */
+bitmap_an
On 7/29/24 2:20 PM, Eugenio Perez Martin wrote:
On Mon, Jul 29, 2024 at 7:50 PM Jonah Palmer wrote:
On 7/29/24 6:04 AM, Eugenio Perez Martin wrote:
On Wed, Jul 24, 2024 at 7:00 PM Jonah Palmer wrote:
On 5/13/24 11:56 PM, Jason Wang wrote:
On Mon, May 13, 2024 at 5:58 PM Eugenio Per
On 7/29/24 10:22 AM, David Hildenbrand wrote:
The simplest way to address 4 is to tack 'if': 'TARGET_S390X' to
@deprecated-props.
>>>
>>> diff --git a/qapi/machine-target.json b/qapi/machine-target.json
>>> index 09dec2b9bb..0be95d559c 100644
>>> --- a/qapi/machine-target.json
>>> ++
The implementation for these instructions handles -0 as an invalid float
point value, whereas the Hexagon hardware considers it the same as +0
(which is valid). Let's fix that and add a regression test.
Signed-off-by: Matheus Tavares Bernardino
Reviewed-by: Brian Cain
Reviewed-by: Taylor Simpson
Make the Aspeed HACE module use the new qcrypto accumulative hashing functions
when in scatter-gather accumulative mode. A hash context will maintain a
"running-hash" as each scatter-gather chunk is received.
Previously each scatter-gather "chunk" was cached
so the hash could be computed once the
This change adds an accumulative hashing function
(qcrypto_hash_accumulate_bytesv) and implementation
for each of the crypto library backends that QEMU supports.
The QCrypto API did not support hashing in an accumulative mode.
As such, hardware hash modules (like the HACE from Aspeed's SoCs) are
u
The goal of this patch series is to fix accumulative hashing support in the
Aspeed HACE module. The issue that stemmed this patch was a failure to boot an
OpenBMC image using the "ast2600-evb" machine. The U-boot
2019.04 loader failed to verify image hashes.
These incorrect image hashes given by
> -Original Message-
> From: Matheus Tavares Bernardino
> Sent: Sunday, July 28, 2024 11:16 AM
> To: qemu-devel@nongnu.org
> Cc: ltaylorsimp...@gmail.com; bc...@quicinc.com; sidn...@quicinc.com;
> a...@rev.ng; a...@rev.ng
> Subject: [PATCH] Hexagon: fix F2_conv_* instructions for negati
On Mon, Jul 29, 2024 at 7:50 PM Jonah Palmer wrote:
>
>
>
> On 7/29/24 6:04 AM, Eugenio Perez Martin wrote:
> > On Wed, Jul 24, 2024 at 7:00 PM Jonah Palmer
> > wrote:
> >>
> >>
> >>
> >> On 5/13/24 11:56 PM, Jason Wang wrote:
> >>> On Mon, May 13, 2024 at 5:58 PM Eugenio Perez Martin
> >>> wro
zicfiss has following instructions
- sspopchk: pops a value from shadow stack and compares with x1/x5.
If they dont match, reports a sw check exception with tval = 3.
- sspush: pushes value in x1/x5 on shadow stack
- ssrdp: reads current shadow stack
- ssamoswap: swaps contents of shadow sta
Add zicfiss/lp extensions in the ext0 key of hwprobe syscall.
It is aligned with Linux CFI patchset.
Signed-off-by: Jim Shu
Signed-off-by: Deepak Gupta
---
linux-user/syscall.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index f879be7cfe
Violations to control flow rules setup by zicfilp and zicfiss lead to
software check exceptions. To debug and fix such sw check issues in guest
, add trace-hooks for each case.
Signed-off-by: Jim Shu
Signed-off-by: Deepak Gupta
---
target/riscv/insn_trans/trans_rvi.c.inc | 1 +
target/riscv/op_
sspush and sspopchk have equivalent compressed encoding taken from zcmop.
cmop.1 is sspush x1 while cmop.5 is sspopchk x5. Due to unusual encoding
for both rs1 and rs2 from space bitfield, this required a new codec.
Signed-off-by: Deepak Gupta
---
disas/riscv.c | 19 ++-
disas/ri
Each application enables indirect branch tracking (forward cfi) for itself
via prctl. Adding branch tracking prctl in linux-user/syscall.
Using same prctl code as proposed in cfi patches in kernel mailing list [1]
[1] - https://lore.kernel.org/all/20240403234054.2020347-1-de...@rivosinc.com/
Sig
zicfilp protects forward control flow (if enabled) by enforcing all
indirect call and jmp must land on a landing pad instruction `lpad`. If
target of an indirect call or jmp is not `lpad` then cpu/hart must raise
a sw check exception with tval = 2.
This patch implements the mechanism using TCG. Ta
Sending out v2 for riscv zicfilp and zicfiss extensions support in qemu.
I sent out v1 [1] last week and had missed adding `trans_zicfiss.c.inc` in
commit titled "implement zicifss instructions" and commit titled "shadow
stack mmu index for shadow stack instructions". Revising both those commits
an
Implements setting lp expected when `jalr` is encountered and implements
`lpad` instruction of zicfilp. `lpad` instruction is taken out of
auipc x0, . This is an existing HINTNOP space. If `lpad` is
target of an indirect branch, cpu checks for 20 bit value in x7 upper
with 20 bit value embedded in
Implements indirect branch tracking prctls for riscv. Setting and clearing
branch tracking prctl simply turns on/off `ufcfien` field in `env`.
tb flush is needed because branch tracking itself leverages tb creation
logic.
locking branch tracking (forward cfi) is not implemented yet (no need yet)
b
zicfiss [1] riscv cpu extension enables backward control flow integrity.
This patch sets up space for zicfiss extension in cpuconfig. And imple-
ments dependency on zicsr, zimop and zcmop extensions.
[1] - https://github.com/riscv/riscv-cfi
Signed-off-by: Deepak Gupta
Co-developed-by: Jim Shu
Shadow stack instructions can be decoded as zimop / zcmop or shadow stack
instructions depending on whether shadow stack are enabled at current
privilege. This requires a TB flag so that correct TB generation and correct
TB lookup happens. `DisasContext` gets a field indicating whether bcfi is
enab
sw check exception support was recently added. This patch further augments
sw check exception by providing support for additional code which is
provided in *tval. Adds `sw_check_code` field in cpuarchstate. Whenever
sw check exception is raised *tval gets the value deposited in
`sw_check_code`.
Si
sspush/sspopchk have compressed encodings carved out of zcmops.
compressed sspush is designated as c.mop.1 while compressed sspopchk
is designated as c.mop.5.
Note that c.sspush x1 exists while c.sspush x5 doesn't. Similarly
c.sspopchk x5 exists while c.sspopchk x1 doesn't.
Signed-off-by: Deepak
Shadow stack instructions shadow stack mmu index for load/stores.
`MMU_IDX_SS_ACCESS` at bit positon 3 is used as shadow stack index.
Shadow stack mmu index depend on privilege and SUM bit. If shadow stack
accesses happening in user mode, shadow stack mmu index = 0b1000. If
shaodw stack access happ
Signed-off-by: Deepak Gupta
Co-developed-by: Jim Shu
Co-developed-by: Andy Chiu
---
disas/riscv.c | 18 +-
disas/riscv.h | 2 ++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index c8364c2b07..c7c92acef7 100644
--- a/disas/riscv.c
Add zicfilp support in VDSO. VDSO functions need lpad instruction
so that userspace could call this function when landing pad extension is
enabled. This solution only works when toolchain always use landing pad
label 1.
Otherwise, If extension is not enabled, lpad instructions will be lui
instruct
Enable disassembly for sspush, sspopchk, ssrdp & ssamoswap.
Disasembly is only enabled if zimop and zicfiss ext is set to true.
Signed-off-by: Deepak Gupta
---
disas/riscv.c | 34 ++
disas/riscv.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/disas/riscv
zicfiss introduces a new state ssp ("shadow stack register") in cpu.
ssp is expressed as a new unprivileged csr (CSR_SSP=0x11) and holds
virtual address for shadow stack as programmed by software.
Shadow stack (for each mode) is enabled via bit3 in *envcfg CSRs.
Shadow stack can be enabled for a m
zicfiss protects shadow stack using new page table encodings PTE.W=0,
PTE.R=0 and PTE.X=0. This encoding is reserved if zicfiss is not
implemented or if shadow stack are not enabled.
Loads on shadow stack memory are allowed while stores to shadow stack
memory leads to access faults. Shadow stack ac
Each application enables shadow stack for itself via prctl. Using prctl
codes as proposed in riscv cfi patches on kernel mailing list [1]
[1] - https://lore.kernel.org/all/20240403234054.2020347-1-de...@rivosinc.com/
Signed-off-by: Deepak Gupta
Co-developed-by: Jim Shu
Co-developed-by: Andy Chi
elp state is recorded in *status on trap entry (less privilege to higher
privilege) and restored in elp from *status on trap exit (higher to less
privilege).
Additionally this patch introduces a forward cfi helper function to
determine if current privilege has forward cfi is enabled or not based o
Implements shadow stack related prctls for qemu-user on riscv. Allocates
shadow stack from host memory using `target_mmap` and tears down when
user issues prctl to disable using `target_munmap`.
Signed-off-by: Deepak Gupta
Co-developed-by: Jesse Huang
Co-developed-by: Jim Shu
Co-developed-by: A
RISC-V CFI use new processor-specific dynamic entry in ELF. Permit it in
VDSO post-processing script.
Signed-off-by: Jim Shu
Signed-off-by: Deepak Gupta
---
linux-user/gen-vdso-elfn.c.inc | 7 +++
1 file changed, 7 insertions(+)
diff --git a/linux-user/gen-vdso-elfn.c.inc b/linux-user/gen-
zicfilp [1] riscv cpu extension enables forward control flow integrity.
If enabled, all indirect calls must land on a landing pad instruction.
This patch sets up space for zicfilp extension in cpuconfig. zicfilp
is dependend on zicsr.
[1] - https://github.com/riscv/riscv-cfi
Signed-off-by: Deepa
zicfilp introduces a new state elp ("expected landing pad") in cpu.
During normal execution, elp is idle (NO_LP_EXPECTED) i.e not expecting
landing pad. On an indirect call, elp moves LP_EXPECTED. When elp is
LP_EXPECTED, only a subsquent landing pad instruction can set state back
to NO_LP_EXPECTED
On 7/29/24 6:04 AM, Eugenio Perez Martin wrote:
On Wed, Jul 24, 2024 at 7:00 PM Jonah Palmer wrote:
On 5/13/24 11:56 PM, Jason Wang wrote:
On Mon, May 13, 2024 at 5:58 PM Eugenio Perez Martin
wrote:
On Mon, May 13, 2024 at 10:28 AM Jason Wang wrote:
On Mon, May 13, 2024 at 2:28 PM
On Mon, Jul 29, 2024 at 01:00:30PM -0400, Peter Xu wrote:
> On Mon, Jul 29, 2024 at 04:58:03PM +0100, Daniel P. Berrangé wrote:
> >
> > We've got two mutually conflicting goals with the machine type
> > definitions.
> >
> > Primarily we use them to ensure stable ABI, but an important
> > secondar
On 2024/07/30 2:00, Peter Xu wrote:
On Mon, Jul 29, 2024 at 04:58:03PM +0100, Daniel P. Berrangé wrote:
On Fri, Jul 26, 2024 at 04:47:40PM -0400, Peter Xu wrote:
On Fri, Jul 26, 2024 at 04:17:12PM +0100, Daniel P. Berrangé wrote:
In terms of launching QEMU I'd imagine:
$QEMU -machine pc-q
On 2024/07/30 0:58, Daniel P. Berrangé wrote:
On Fri, Jul 26, 2024 at 04:47:40PM -0400, Peter Xu wrote:
On Fri, Jul 26, 2024 at 04:17:12PM +0100, Daniel P. Berrangé wrote:
In terms of launching QEMU I'd imagine:
$QEMU -machine pc-q35-9.1 -platform linux-6.9 ...args...
Any virtual machine
On Mon, Jul 29, 2024 at 04:58:03PM +0100, Daniel P. Berrangé wrote:
> On Fri, Jul 26, 2024 at 04:47:40PM -0400, Peter Xu wrote:
> > On Fri, Jul 26, 2024 at 04:17:12PM +0100, Daniel P. Berrangé wrote:
> > >
> > > In terms of launching QEMU I'd imagine:
> > >
> > > $QEMU -machine pc-q35-9.1 -plat
Am 29.07.2024 um 14:26 hat Paolo Bonzini geschrieben:
> Il lun 29 lug 2024, 14:20 Kevin Wolf ha scritto:
>
> > Apparently both oVirt and Kubevirt unconditionally use the stop policy,
> > so I'm afraid in this case we must acknowledge that our expectations
> > don't match reality.
> >
>
> Yeah, o
On 2024/07/29 23:29, Peter Xu wrote:
On Mon, Jul 29, 2024 at 01:45:12PM +0900, Akihiko Odaki wrote:
On 2024/07/29 12:50, Jason Wang wrote:
On Sun, Jul 28, 2024 at 11:19 PM Akihiko Odaki wrote:
On 2024/07/27 5:47, Peter Xu wrote:
On Fri, Jul 26, 2024 at 04:17:12PM +0100, Daniel P. Berrangé w
On 2024/07/30 0:13, Peter Maydell wrote:
On Sat, 20 Jul 2024 at 10:31, Akihiko Odaki wrote:
kvm-steal-time and sve properties are added for KVM even if the
corresponding features are not available. Always add pmu property for
Armv8. Note that the property is added only for Armv7-A/R+ as QEMU
c
On Mon, 29 Jul 2024 15:21:10 +0200
Mauro Carvalho Chehab wrote:
> Add an ACPI APEI GHES error injection logic for ARM
> processor CPER, allowing to set fields at from
> UEFI spec 2.10 tables N.16 and N.17 to any valid
> value.
>
> As some GHES functions require handling addresses, add
> a helper
On Fri, 19 Jul 2024 at 00:03, Danny Canter wrote:
>
> This patch's main focus is to enable creating VMs with > 63GB
> of RAM on Apple Silicon machines by using some new HVF APIs. In
> pursuit of this a couple of things related to how we handle the
> physical address range we expose to guests were
On 29-07-2024 17:38, Cédric Le Goater wrote:
On 7/26/24 01:53, Nicholas Piggin wrote:
+static void transfer(PnvSpi *s, PnvXferBuffer *payload)
+{
+ uint32_t tx;
+ uint32_t rx;
+ PnvXferBuffer *rsp_payload = NULL;
+
+ rsp_payload = pnv_spi_xfer_buffer_new();
+ for (int offset = 0
On Mon, 2024-07-29 at 11:33 -0400, Michael S. Tsirkin wrote:
> you said you will use __le here?
I hadn't intended to bother until we add the virtio discovery and
negotiation paths; it would basically be cosmetic for now.
Although I *will* do so with the QEMU side before posting the latest
version
On Mon, 29 Jul 2024 15:21:06 +0200
Mauro Carvalho Chehab wrote:
> From: Jonathan Cameron
>
> Creates a Generic Event Device (GED) as specified at
I wrote this a while back and wasn't aware of the naming
mess around GED in the ACPI spec. This one is just
referred to as 'error device' whereas t
1 - 100 of 246 matches
Mail list logo
