On 4/2/2024 5:01 AM, Eugenio Perez Martin wrote:
On Tue, Apr 2, 2024 at 8:19 AM Si-Wei Liu wrote:
On 2/14/2024 11:11 AM, Eugenio Perez Martin wrote:
On Wed, Feb 14, 2024 at 7:29 PM Si-Wei Liu wrote:
Hi Michael,
On 2/13/2024 2:22 AM, Michael S. Tsirkin wrote:
On Mon, Feb 05, 2024 at 05:
On Tue, 02 Apr 2024 22:26:25 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 2/4/24 11:37, Zack Buhman wrote:
> > Before this change, executing a code sequence such as:
> >
> > mova tblm,r0
> > movr0,r1
> > mova tbln,r0
> > clrs
> >
On Wed, Mar 27, 2024 at 02:15:18PM +0800, Wafer wrote:
> For indirect descriptors the elelm->ndescs was one,
> For direct descriptors the elele->ndesc was the numbe of entries.
> elem->ndescs = (desc_cache == &indirect_desc_cache) ? 1 : elem_entries;
>
> When flushing multiple elemes,
> the used_i
> Missed one little thing: the doc comment needs a (since 9.1).
Thanks for the input, I just submitted a v3 with the missing "(since 9.1)":
https://patchew.org/QEMU/20240403055002.890760-1-justinien.bou...@gmail.com/
Regards,
Justinien Bouron
Depending on your use-case, it might be inconvenient to have qemu grab
the input device from the host immediately upon starting the guest.
Added a new bool option to input-linux: grab-on-startup. If true, the
device is grabbed as soon as the guest is started, otherwise it is not
grabbed until the
Justinien Bouron writes:
> Just a ping to make sure this patch hasn't been lost in the noise.
> The relevant patchew page is
> https://patchew.org/QEMU/20240322034311.2980970-1-justinien.bou...@gmail.com/.
>
> Any chance to get this merged before the next release?
Since it was posted after the s
Markus Armbruster writes:
> Justinien Bouron writes:
>
>> Depending on your use-case, it might be inconvenient to have qemu grab
>> the input device from the host immediately upon starting the guest.
>>
>> Added a new bool option to input-linux: grab-on-startup. If true, the
>> device is grabbed
On 4/3/2024 1:10 PM, Michael Tokarev wrote:
External email: Use caution opening links or attachments
02.04.2024 07:51, Yajun Wu:
When vhost-user or vhost-kernel is handling virtio net datapath, qemu
should not touch used ring.
But with vhost-user socket reconnect scenario, in a very rare ca
On Tue Apr 2, 2024 at 9:32 PM AEST, BALATON Zoltan wrote:
> On Thu, 21 Mar 2024, BALATON Zoltan wrote:
> > On 27/2/24 17:47, BALATON Zoltan wrote:
> >> Hello,
> >>
> >> Commit 18a536f1f8 (accel/tcg: Always require can_do_io) broke booting
> >> MorphOS on sam460ex (this was before 8.2.0 and I thou
02.04.2024 15:47, Simeon Krastnikov:
[Content-Type: text/html]
Your patch is html-damaged. There's probably a way to extract the text/plain
version of it but it's better if you re-send it without html.
Not saying anything about the changes though.
Thanks,
/mjt
02.04.2024 07:51, Yajun Wu:
When vhost-user or vhost-kernel is handling virtio net datapath, qemu
should not touch used ring.
But with vhost-user socket reconnect scenario, in a very rare case (has
pending kick event). VRING_USED_F_NO_NOTIFY is set by qemu in
following code path:
...
This issu
On Mon Apr 1, 2024 at 3:55 PM AEST, Aditya Gupta wrote:
> This patch series adds support for Power11 pseries and powernv machine targets
> to emulate VMs running on Power11.
>
> Most of the P11 support code has been taken from P10 code in QEMU.
> And has been tested in pseries, powernv, with and wi
On 02/04/2024 17:17, Jonathan Cameron wrote:
> On Tue, 2 Apr 2024 09:46:47 +0800
> Li Zhijian wrote:
>
>> After the kernel commit
>> 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not
>> match a CFMWS window")
>
> Fixes tag seems appropriate.
>
>> CXL type3 devices can
On 2024/4/3 0:12, Peter Maydell wrote:
> On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>>
>> Implement icv_nmiar1_read() for icc_nmiar1_read(), so add definition for
>> ICH_LR_EL2.NMI and ICH_AP1R_EL2.NMI bit.
>>
>> If FEAT_GICv3_NMI is supported, ich_ap_write() should consider
>> ICV_AP1R_
On 2024/4/3 0:12, Peter Maydell wrote:
> On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>>
>> Implement icv_nmiar1_read() for icc_nmiar1_read(), so add definition for
>> ICH_LR_EL2.NMI and ICH_AP1R_EL2.NMI bit.
>>
>> If FEAT_GICv3_NMI is supported, ich_ap_write() should consider
>> ICV_AP1R_
On 4/2/2024 10:31 PM, Michael S. Tsirkin wrote:
On Tue, Apr 02, 2024 at 09:18:44PM +0800, Xiaoyao Li wrote:
On 4/2/2024 6:02 PM, Michael S. Tsirkin wrote:
On Tue, Apr 02, 2024 at 04:25:16AM -0400, Xiaoyao Li wrote:
Set MADT.FLAGS[bit 0].PCAT_COMPAT based on x86ms->pic.
Signed-off-by: Xiaoyao
On 3/29/24 12:33, Max Filippov wrote:
target_ipc_perm::mode and target_ipc_perm::__seq fields are 32-bit wide
on xtensa and thus need to use tswap32.
The issue is spotted by the libc-test http://nsz.repo.hu/git/?p=libc-test
on big-endian xtensa core.
Cc: qemu-sta...@nongnu.org
Fixes: a3da8be5126
Hi Mostafa,
On Mon, Mar 25, 2024 at 10:13:56AM +, Mostafa Saleh wrote:
>
> Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> but not nested instances.
> This patch series adds support for nested translation in SMMUv3,
> this is controlled by property “arm-smmuv3.stage=neste
On 4/2/24 08:29, Sven Schnelle wrote:
Richard Henderson writes:
On 4/1/24 20:01, Sven Schnelle wrote:
Implement dr2 and the mfdiag/mtdiag instructions. dr2 contains a bit
which enables/disables space id hashing. Seabios would then set
this bit when booting. Linux would disable it again during
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
third release candidate for the QEMU 9.0 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu.org/qemu-9.0.0-rc2.tar.xz
http://download.qemu.
On Tue, Apr 02, 2024 at 07:20:01AM +, Wang, Wei W wrote:
> > IIUC we still need that pre_7_2 stuff and keep the postponed connect() to
> > make sure the ordering is done properly. Wei, could you elaborate the patch
> > you mentioned? Maybe I missed some spots.
>
> Sure. I saw your patch (565
On Tue, Apr 02, 2024 at 05:28:36PM +0800, Wang, Lei wrote:
> On 4/2/2024 15:25, Wang, Wei W wrote:> On Tuesday, April 2, 2024 2:56 PM,
> Wang,
> Lei4 wrote:
> >> On 4/2/2024 0:13, Peter Xu wrote:> On Fri, Mar 29, 2024 at 08:54:07AM
> >> +,
> >> Wang, Wei W wrote:
> On Friday, March 29, 2
On Mon, Apr 01, 2024 at 11:26:25PM +0200, Yu Zhang wrote:
> Hello Peter und Zhjian,
>
> Thank you so much for letting me know about this. I'm also a bit surprised at
> the plan for deprecating the RDMA migration subsystem.
It's not too late, since it looks like we do have users not yet notified
f
On Thu, Mar 28, 2024 at 02:20:46PM +0400, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> ../hw/block/virtio-blk.c:1212:12: error: ‘rq’ may be used uninitialized
> [-Werror=maybe-uninitialized]
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/block/virtio-blk.c | 2 +-
> 1 fil
On Thu, Mar 28, 2024 at 02:20:34PM +0400, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> ../util/qemu-coroutine.c:150:8: error: ‘batch’ may be used uninitialized
> [-Werror=maybe-uninitialized]
>
> Signed-off-by: Marc-André Lureau
> ---
> util/qemu-coroutine.c | 2 +-
> 1 fi
On 07.03.24 16:47, Fiona Ebner wrote:
From: John Snow
for the mirror job. The bitmap's granularity is used as the job's
granularity.
The new @bitmap parameter is marked unstable in the QAPI and can
currently only be used for @sync=full mode.
Clusters initially dirty in the bitmap as well as n
On 02.04.24 18:34, Eric Blake wrote:
On Tue, Apr 02, 2024 at 12:58:43PM +0300, Vladimir Sementsov-Ogievskiy wrote:
Again, same false-positives, because of WITH_GRAPH_RDLOCK_GUARD()..
Didn't you try to change WITH_ macros somehow, so that compiler believe in our
good intentions?
#define WIT
Hi Eric,
On Tue, Apr 02, 2024 at 07:15:20PM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 3/25/24 11:13, Mostafa Saleh wrote:
> > TLBs for nesting will be extended to be combined, a new index is added
> > "stage", with 2 valid values:
> > - SMMU_STAGE_1: Meaning this translates VA to PADDR, this
ping !
On 27/03/24 4:18 pm, Het Gala wrote:
On 27/03/24 2:37 am, Fabiano Rosas wrote:
Het Gala writes:
Some comments, mostly just thinking out loud...
For --> migrate
//
//O:/...
For --> validate
///O:/O:/
/O:/O:/...
Do we need an optional 'capability' element? I'm not sure how pr
Hi Mostafa,
On 3/25/24 11:13, Mostafa Saleh wrote:
> TLBs for nesting will be extended to be combined, a new index is added
> "stage", with 2 valid values:
> - SMMU_STAGE_1: Meaning this translates VA to PADDR, this entry can
>be cached from fully nested configuration or from stage-1 only.
>
On Tue, 2 Apr 2024 at 15:25, Philippe Mathieu-Daudé wrote:
>
> The following changes since commit 7fcf7575f3d201fc84ae168017ffdfd6c86257a6:
>
> Merge tag 'pull-target-arm-20240402' of
> https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-04-02
Hi Mostafa,
On 3/25/24 11:13, Mostafa Saleh wrote:
> smmuv3_translate() does everything from STE/CD parsing to TLB lookup
> and PTW.
>
> Soon, when nesting is supported, stage-1 data (tt, CD) needs to be
> translated using stage-2.
>
> Split smmuv3_translate() to 3 functions:
>
> - smmu_translate(
Hi Mostafa,
On 3/25/24 11:13, Mostafa Saleh wrote:
> Currently, translation stage is represented as an int, where 1 is stage-1 and
> 2 is stage-2, when nested is added, 3 would be confusing to represent nesting,
> so we use an enum instead.
>
> While keeping the same values, this is useful for:
>
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> Added properties to enable FEAT_GICv3_NMI feature, setup distributor
> and redistributor registers to indicate NMI support.
The subject line is misleading, since we don't actually
enable the FEAT_GICv3_NMI feature here. I suggest:
hw/intc/arm
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> A SPI, PPI or SGI interrupt can have non-maskable property. So maintain
> non-maskable property in PendingIrq and GICR/GICD. Since add new device
> state, it also needs to be migrated, so also save NMI info in
> vmstate_gicv3_cpu and vmstate_gic
Just a ping to make sure this patch hasn't been lost in the noise.
The relevant patchew page is
https://patchew.org/QEMU/20240322034311.2980970-1-justinien.bou...@gmail.com/.
Any chance to get this merged before the next release?
Regards,
Justinien
On Sat, 30 Mar 2024 at 10:34, Jinjie Ruan wrote:
>
> Enable FEAT_NMI on the 'max' CPU.
>
> Signed-off-by: Jinjie Ruan
> Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> In vCPU Interface, if the vIRQ has the non-maskable property, report
> vINMI to the corresponding vPE.
>
> Signed-off-by: Jinjie Ruan
> Reviewed-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> In CPU Interface, if the IRQ has the non-maskable property, report NMI to
> the corresponding PE.
>
> Signed-off-by: Jinjie Ruan
> Reviewed-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> If GICD_CTLR_DS bit is zero and the NMI is non-secure, the NMI prioirty
Typo in multiple places in this commit message and in the
subject line: should be "priority".
> is higher than 0x80, otherwise it is higher than 0x0. And save NMI
> super
On Sat, 30 Mar 2024 at 10:33, Jinjie Ruan wrote:
>
> Implement icv_nmiar1_read() for icc_nmiar1_read(), so add definition for
> ICH_LR_EL2.NMI and ICH_AP1R_EL2.NMI bit.
>
> If FEAT_GICv3_NMI is supported, ich_ap_write() should consider
> ICV_AP1R_EL1.NMI
> bit. In icv_activate_irq() and icv_eoir_
On Sat, 30 Mar 2024 at 10:34, Jinjie Ruan wrote:
>
> Add the NMIAR CPU interface registers which deal with acknowledging NMI.
>
> When introduce NMI interrupt, there are some updates to the semantics for the
> register ICC_IAR1_EL1 and ICC_HPPIR1_EL1. For ICC_IAR1_EL1 register, it
> should return
On Tue, Apr 02, 2024 at 12:58:43PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> > > Again, same false-positives, because of WITH_GRAPH_RDLOCK_GUARD()..
> > >
> > > Didn't you try to change WITH_ macros somehow, so that compiler believe
> > > in our good intentions?
> > >
> >
> >
> > #define WI
On Tue, 2 Apr 2024 at 15:30, Laurent Vivier wrote:
> To post PR I generally use git-publish and I have a hook that checks that.
>
> $ cat .git/hooks/pre-publish-send-email
> !/bin/bash
>
> NAME=$(git config --get user.name)
> EMAIL=$(git config --get user.email)
>
> for PATCH in $1/*.patch; do
>
On Tue, 2 Apr 2024 at 14:20, Paolo Bonzini wrote:
>
> The following changes since commit b9dbf6f9bf533564f6a4277d03906fcd32bb0245:
>
> Merge tag 'pull-tcg-20240329' of https://gitlab.com/rth7680/qemu into
> staging (2024-03-30 14:54:57 +)
>
> are available in the Git repository at:
>
> ht
There is a crash in the Non-standard guest image. The root cause of
the issue is that an IRQFD was used After it release
During the booting process of the Vyatta image, the behavior of the
called function in qemu is as follows:
1. vhost_net_stop() was called. This will call the function
virtio_p
When the guest calls virtio_stop and then virtio_reset, the vector will change
to VIRTIO_NO_VECTOR and the IRQFD for this vector will be released. After that
If you want to change the vector back, it will cause a crash.
To fix this, we need to call the function "kvm_virtio_pci_vector_use_one()"
wh
On Tue, Apr 02, 2024 at 09:18:44PM +0800, Xiaoyao Li wrote:
> On 4/2/2024 6:02 PM, Michael S. Tsirkin wrote:
> > On Tue, Apr 02, 2024 at 04:25:16AM -0400, Xiaoyao Li wrote:
> > > Set MADT.FLAGS[bit 0].PCAT_COMPAT based on x86ms->pic.
> > >
> > > Signed-off-by: Xiaoyao Li
> >
> > Please include m
Le 02/04/2024 à 12:41, Michael Tokarev a écrit :
Author: Stefan Weil via
*SIGH* This happened *again*.
(you'll need to tell git log "--no-mailmap" to not get confused
by the mapping we have for the last time one of these slipped
through...)
Now this is interesting. And this is exactly
From: Marc-André Lureau
../plugins/loader.c:405:15: error: ‘ctx’ may be used uninitialized
[-Werror=maybe-uninitialized]
Signed-off-by: Marc-André Lureau
Reviewed-by: Pierrick Bouvier
Message-ID: <20240328102052.3499331-15-marcandre.lur...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
--
From: Zhao Liu
The commit 15002f60f792 ("util: rename qemu-error.c to match its header
name") renamed util/qemu-error.c to util/error-report.c but missed to
change the corresponding entry.
To avoid get_maintainer.pl failing, update the error-report.c entry.
Fixes: 15002f60f7 ("util: rename qemu
From: Glenn Miles
It was noticed that my linux.vnet.ibm.com address does not
always work so dropping the vnet to see if that works better.
Signed-off-by: Glenn Miles
Message-ID: <20240328194914.2145709-1-mil...@linux.vnet.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 +-
From: Kevin Wolf
Coverity complains that the check introduced in commit 3f934817 suggests
that qiov could be NULL and we dereference it before reaching the check.
In fact, all of the callers pass a non-NULL pointer, so just remove the
misleading check.
Resolves: Coverity CID 1542668
Signed-off-b
From: Marc-André Lureau
../hw/nvme/ctrl.c:6081:21: error: ‘result’ may be used uninitialized
[-Werror=maybe-uninitialized]
It's not obvious that 'result' is set in all code paths. When &result is
a returned argument, it's even less clear.
Looking at various assignments, 0 seems to be a suitabl
From: Yajun Wu
When vhost-user or vhost-kernel is handling virtio net datapath,
QEMU should not touch used ring.
But with vhost-user socket reconnect scenario, in a very rare case
(has pending kick event). VRING_USED_F_NO_NOTIFY is set by QEMU in
following code path:
#0 virtio_queue_sp
From: Artem Chernyshev
In xen_evtchn_soft_reset() variable flush_kvm_routes can
be used before being initialized.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Oleg Sviridov
Signed-off-by: Artem Chernyshev
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20
The CONFIG_SOFTMMU_GATE definition was never used, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Message-Id: <20240313213339.82071-2-phi...@linaro.org>
---
accel/tcg/plugin-gen.c | 6 --
1 file changed, 6 deletions(-)
diff --git a
Unify with other init_excp_FOO() in the same file.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Nicholas Piggin
Message-Id: <20240313213339.82071-5-phi...@linaro.org>
---
target/ppc/cpu_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu_init.c b/tar
CXL is based on PCIe. In is pointless to initialize
its context on non-PCI machines.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Jonathan Cameron
Message-ID: <20240327161642.33574-1-phi...@linaro.org>
---
hw/i386/pc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240313213339.82071-4-phi...@linaro.org>
---
gdbstub/internals.h | 8
gdbstub/system.c| 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/gdbstub/internals.h b/gdbstub/interna
Since size_to_prdtl() is only used within ahci.c,
declare it statically. This removes the last use
of "inlined function with external linkage". See
previous commit and commit 9de9fa5cf2 for rationale.
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
R
See previous commit and commit 9de9fa5cf2 ("Avoid using inlined
functions with external linkage") for rationale.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-Id: <20240313184954.42513-3-phi...@linaro.org>
---
target/arm/hvf/hvf.c | 2
Similarly to commit 9de9fa5cf2 ("hw/arm/smmu-common: Avoid using
inlined functions with external linkage"):
None of our code base require / use inlined functions with external
linkage. Some places use internal inlining in the hot path. These
two functions are certainly not in any hot path an
The following changes since commit 7fcf7575f3d201fc84ae168017ffdfd6c86257a6:
Merge tag 'pull-target-arm-20240402' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-04-02
11:34:49 +0100)
are available in the Git repository at:
https://github.com/philmd/qemu.g
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Message-Id: <20240313213339.82071-3-phi...@linaro.org>
---
gdbstub/internals.h | 20 ++--
gdbstub/system.c| 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/g
On 2/4/24 14:41, Yajun Wu wrote:
On 4/2/2024 8:11 PM, Philippe Mathieu-Daudé wrote:
External email: Use caution opening links or attachments
Hi Yajun,
On 2/4/24 06:51, Yajun Wu wrote:
When vhost-user or vhost-kernel is handling virtio net datapath, qemu
"QEMU"
Ack.
should not touch used
On Tue, 2 Apr 2024 at 11:42, Michael Tokarev wrote:
>
> The following changes since commit 6af9d12c88b9720f209912f6e4b01fefe5906d59:
>
> Merge tag 'migration-20240331-pull-request' of
> https://gitlab.com/peterx/qemu into staging (2024-04-01 13:12:40 +0100)
>
> are available in the Git reposito
On 2/4/24 11:59, Michael Tokarev wrote:
02.04.2024 12:50, Philippe Mathieu-Daudé пишет:
On 1/4/24 18:52, Michael Tokarev wrote:
01.04.2024 12:43, liu.d...@zte.com.cn wrote:
hmp: Add help information for watchdog action: inject-nmi
virsh qemu-monitor-command --hmp help information of watchdog_
On 2/4/24 11:37, Zack Buhman wrote:
Before this change, executing a code sequence such as:
mova tblm,r0
movr0,r1
mova tbln,r0
clrs
clrmac
mac.w @r0+,@r1+
mac.w @r0+,@r1+
.align 4
tblm:
Move the computation of region_start and region_end after the value of
"bits" is known. This makes it possible to distinguish modes that
support horizontal pel panning from modes that do not.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
hw/display/vga.c | 50 +++
There are two sets of conditionals using the shift control bits: one to
verify the palette and adjust disp_width, one to compute the "v" and
"bits" variables. Merge them into one, with the extra benefit that
we now have the "bits" value available early and can use it to
compute region_end.
Review
On 4/2/2024 6:02 PM, Michael S. Tsirkin wrote:
On Tue, Apr 02, 2024 at 04:25:16AM -0400, Xiaoyao Li wrote:
Set MADT.FLAGS[bit 0].PCAT_COMPAT based on x86ms->pic.
Signed-off-by: Xiaoyao Li
Please include more info in the commit log:
what is the behaviour you observe, why it is wrong,
how does
Horizontal pel panning bit 3 is only used in text mode. In graphics
mode, it can be treated as if it was zero, thus not extending the
dirty memory region.
Signed-off-by: Paolo Bonzini
---
hw/display/vga.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/display/vga.c b/
When pel panning is active, one more byte is read from each of the VGA
memory planes. This has to be accounted in the computation of region_end,
otherwise vga_draw_graphic() fails an assertion:
qemu-system-i386: ../system/physmem.c:946:
cpu_physical_memory_snapshot_get_dirty: Assertion `start +
The following changes since commit b9dbf6f9bf533564f6a4277d03906fcd32bb0245:
Merge tag 'pull-tcg-20240329' of https://gitlab.com/rth7680/qemu into staging
(2024-03-30 14:54:57 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fe
The spec for the lsi53c895a says: "If the instruction is a Block Move
and a value of 0x00 is loaded into the DBC register, an illegal
instruction interrupt occurs if the LSI53C895A is not in target mode,
Command phase".
Because QEMU only operates in initiator mode, generate the interrupt
uncon
The assignment is already inherited from pc-q35-8.2.
Signed-off-by: Paolo Bonzini
---
hw/i386/pc_q35.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index b5922b44afa..c7bc8a2041f 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -393,7 +393,6 @@ st
If no bytes are there to process in the message in phase,
the input data latch (s->sidl) is set to s->msg[-1]. Just
do nothing since no DMA is performed.
Reported-by: Chuhong Yuan
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
hw/scsi/lsi53c895a.c | 19 --
Qemu wraps its call to ninja in a Makefile. Since ninja, as opposed to
make, utilizes all CPU cores by default, the qemu Makefile translates
the absense of a `-jN` argument into `-j1`. This breaks jobserver
functionality, so update the -jN mangling to take the --jobserver-auth
argument into conside
* The immediate argument to lui/auipc should be an integer in the interval
[0x0, 0xf]; e.g., 'auipc 0xf' and not 'auipc -1'
* The floating-point rounding mode is the last operand to the function,
not the first; e.g., 'fcvt.w.s a0, fa0, rtz' and not 'fcvt.w.s rtz,
a0, fa0'. Note that fcvt.
Before this change, executing a code sequence such as:
mova tblm,r0
movr0,r1
mova tbln,r0
clrs
clrmac
mac.w @r0+,@r1+
mac.w @r0+,@r1+
.align 4
tblm:.word 0x1234
.word 0x5678
tbln
Am 29.03.2024 um 04:45 hat Shaoqin Huang geschrieben:
> Hi Daniel,
>
> On 3/25/24 16:55, Daniel P. Berrangé wrote:
> > On Mon, Mar 25, 2024 at 01:35:58PM +0800, Shaoqin Huang wrote:
> > > Hi Daniel,
> > >
> > > Thanks for your reviewing. I see your comments in the v7.
> > >
> > > I have some dou
Yuan Liu writes:
> Implemented recvbitmap tracking of received pages in multifd.
>
> If the zero page appears for the first time in the recvbitmap, this
> page is not checked and set.
>
> If the zero page has already appeared in the recvbitmap, there is no
> need to check the data but directly se
On 4/2/2024 8:11 PM, Philippe Mathieu-Daudé wrote:
External email: Use caution opening links or attachments
Hi Yajun,
On 2/4/24 06:51, Yajun Wu wrote:
When vhost-user or vhost-kernel is handling virtio net datapath, qemu
"QEMU"
Ack.
should not touch used ring.
But with vhost-user socket
Am 02.04.2024 um 12:53 hat Philippe Mathieu-Daudé geschrieben:
> On 27/3/24 20:27, Kevin Wolf wrote:
> > Coverity complains that the check introduced in commit 3f934817 suggests
> > that qiov could be NULL and we dereference it before reaching the check.
> > In fact, all of the callers pass a non-N
Hi Yajun,
On 2/4/24 06:51, Yajun Wu wrote:
When vhost-user or vhost-kernel is handling virtio net datapath, qemu
"QEMU"
should not touch used ring.
But with vhost-user socket reconnect scenario, in a very rare case (has
pending kick event). VRING_USED_F_NO_NOTIFY is set by qemu in
"QEMU"
On Tue, Apr 2, 2024 at 8:19 AM Si-Wei Liu wrote:
>
>
>
> On 2/14/2024 11:11 AM, Eugenio Perez Martin wrote:
> > On Wed, Feb 14, 2024 at 7:29 PM Si-Wei Liu wrote:
> >> Hi Michael,
> >>
> >> On 2/13/2024 2:22 AM, Michael S. Tsirkin wrote:
> >>> On Mon, Feb 05, 2024 at 05:10:36PM -0800, Si-Wei Liu w
Commit f5177798d8 ("scripts: report on author emails
that are mangled by the mailing list") added a check
for qemu-devel@ list, extend the regexp to cover more
such qemu-trivial@, qemu-block@ and qemu-ppc@.
Signed-off-by: Philippe Mathieu-Daudé
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1
The .mailmap file fixes mistake we already did.
Do not use it when running checkpatch.pl, otherwise
we might commit the very same mistakes.
Reported-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
scripts/checkpatch.pl | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
dif
On Tue, 2 Apr 2024 at 12:30, Philippe Mathieu-Daudé wrote:
>
> Commit f5177798d8 ("scripts: report on author emails
> that are mangled by the mailing list") added a check
> for qemu-devel@ list, complete with qemu-trivial@.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> scripts/checkpatch.pl
Since v1:
- Extend regexp to cover all lists (Peter)
* qemu-trivial@ is not checked
* mailmap hides the mistakes we want to catch
See
https://lore.kernel.org/qemu-devel/60faa39d-52e8-46f1-8bd9-9d9661794...@tls.msk.ru/
Philippe Mathieu-Daudé (2):
scripts/checkpatch: Avoid author email mangled
Merge tag 'migration-20240331-pull-request' of
> https://gitlab.com/peterx/qemu into staging (2024-04-01 13:12:40 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/p
On 2/4/24 13:53, Philippe Mathieu-Daudé wrote:
On 2/4/24 13:52, Peter Maydell wrote:
On Tue, 2 Apr 2024 at 12:30, Philippe Mathieu-Daudé
wrote:
Commit f5177798d8 ("scripts: report on author emails
that are mangled by the mailing list") added a check
for qemu-devel@ list, complete with qemu-tr
On 2/4/24 13:52, Peter Maydell wrote:
On Tue, 2 Apr 2024 at 12:30, Philippe Mathieu-Daudé wrote:
Commit f5177798d8 ("scripts: report on author emails
that are mangled by the mailing list") added a check
for qemu-devel@ list, complete with qemu-trivial@.
Signed-off-by: Philippe Mathieu-Daudé
On 2/4/24 13:34, Paolo Bonzini wrote:
When pel panning is active, one more byte is read from each of the VGA
memory planes. This has to be accounted in the computation of region_end,
otherwise vga_draw_graphic() fails an assertion:
qemu-system-i386: ../system/physmem.c:946: cpu_physical_memory_
On 2/4/24 13:34, Paolo Bonzini wrote:
Move the computation of region_start and region_end after the value of
"bits" is known. This makes it possible to distinguish modes that
support horizontal pel panning from modes that do not.
Signed-off-by: Paolo Bonzini
---
hw/display/vga.c | 50 +++
On Tue, 2 Apr 2024 at 11:41, Michael Tokarev wrote:
>
>
> > Author: Stefan Weil via
>
> *SIGH* This happened *again*.
>
> > (you'll need to tell git log "--no-mailmap" to not get confused
> > by the mapping we have for the last time one of these slipped
> > through...)
>
> Now this is interestin
On 2/4/24 13:34, Paolo Bonzini wrote:
There are two sets of conditionals using the shift control bits: one to
verify the palette and adjust disp_width, one to compute the "v" and
"bits" variables. Merge them into one, with the extra benefit that
we now have the "bits" value available early and c
On Tue, Apr 2, 2024 at 6:58 AM Sahil wrote:
>
> Hi,
>
> On Monday, April 1, 2024 11:53:11 PM IST daleyoung4...@gmail.com wrote:
> > Hi,
> >
> > On Monday, March 25, 2024 21:20:32 CST Sahil wrote:
> > > Q1.
> > > Section 2.7.4 of the virtio spec [3] states that in an available
> > > descriptor, the
On 24/3/24 20:17, Mark Cave-Ayland wrote:
The esp_cdb_length() function is only used as part of a calculation to determine
whether the cmdfifo contains an entire SCSI CDB. Rework esp_cdb_length() into a
new esp_cdb_ready() function which both enables us to handle the case where
scsi_cdb_length()
1 - 100 of 165 matches
Mail list logo
