On 21/2/24 22:31, Daniel Henrique Barboza wrote:
At this moment the global is used only in do_vsetvl(). Do a direct env
load in do_vsetvl() to read 'vl' and remove the global.
Suggested-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/insn_trans/trans_rvv.c.inc |
Hyman Huang writes:
> qmp_decode_protocols(), qmp_decode_status(), and qmp_decode_features()
> are now only used in virtio-hmp-cmds.c. So move them into there,
> redeclare them to static, and replace the qmp_ prefix with hmp_.
>
> Signed-off-by: Hyman Huang
Reviewed-by: Markus Armbruster
Hi Richard,
On 2/21/24 22:58, Richard Henderson wrote:
> On 2/21/24 10:58, Eric Auger wrote:
>> Introduce a new enum type property allowing to set an
>> IOMMU granule. Values are 4K, 16K, 64K and host. This
>> latter indicates the vIOMMU granule will matches the
>> host page size.
>>
>> A subseque
On 21/2/24 12:00, Thomas Huth wrote:
When using "--without-default-devices", the ARM_GICV3_TCG and ARM_GIC_KVM
settings currently get disabled, though the arm virt machine is only of
very limited use in that case. This also causes the migration-test to
fail in such builds. Let's make sure that we
On 21/2/24 19:49, Philippe Mathieu-Daudé wrote:
On 21/2/24 19:47, Philippe Mathieu-Daudé wrote:
On 21/2/24 19:07, Thomas Huth wrote:
leon3.c currently fails to compile with some compilers when the -Wvla
option has been enabled:
../hw/sparc/leon3.c: In function ‘leon3_cpu_reset’:
../hw/spar
Ping.
> Subject: RE: [EXT] Re: [PATCH] vhost_net: add NOTIFICATION_DATA and
> IN_ORDER feature bits to vdpa_feature_bits
>
>
>
> > -Original Message-
> > From: Michael S. Tsirkin
> > Sent: Monday, February 19, 2024 3:15 PM
> > To: Srujana Challa
> > Cc: qemu-devel@nongnu.org; Vamsi Kr
On Thu, Feb 22, 2024 at 09:04:14AM +0300, Michael Tokarev wrote:
> Date: Thu, 22 Feb 2024 09:04:14 +0300
> From: Michael Tokarev
> Subject: Re: [PATCH 0/6] [PATCH 0/6] Fix missing ERRP_GUARD() when
> dereference @errp
>
> 21.02.2024 12:43, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > Hi all,
> >
Fabiano Rosas writes:
> Roman Khapov writes:
>
> Hi Roman,
>
>> This is resending of series 20240215082659.1378342-1-rkha...@yandex-team.ru,
>> where patch subjects numbers were broken in patch 2/2.
>>
>> Sometimes, when migration fails, it is hard to find out
>> the cause of the problems: you h
Fabiano Rosas writes:
> Markus Armbruster writes:
>
>> Fabiano Rosas writes:
>>
>>> We're about to enable the use of O_DIRECT in the migration code and
>>> due to the alignment restrictions imposed by filesystems we need to
>>> make sure the flag is only used when doing aligned IO.
>>>
>>> The
On 2024/02/21 17:15, Markus Armbruster wrote:
Akihiko Odaki writes:
vfio determines if rombar is explicitly enabled by inspecting QDict.
Inspecting QDict is not nice because QDict is untyped and depends on the
details on the external interface. Add an infrastructure to determine if
rombar is e
On 2024/02/21 16:59, Markus Armbruster wrote:
Akihiko Odaki writes:
Currently there is no way to distinguish the case that rombar is
explicitly specified as 1 and the case that rombar is not specified.
Set rombar -1 by default to distinguish these cases just as it is done
for addr and romsize
On 2024/02/21 23:14, Alex Bennée wrote:
Akihiko Odaki writes:
On 2024/02/21 19:02, Alex Bennée wrote:
Akihiko Odaki writes:
On 2024/02/20 23:14, Alex Bennée wrote:
Akihiko Odaki writes:
On 2024/02/17 1:30, Alex Bennée wrote:
We can only request a list of registers once the vCPU has be
[Adding a few more Ccs]
17.02.2024 18:58, David Parsons :
macOS Sonoma changes the NSView.clipsToBounds to false by default where it was
true in
earlier version of macOS. This causes the window contents to be obscured by the
window
frame. This fixes the issue by conditionally setting the clipp
21.02.2024 12:43, Zhao Liu wrote:
From: Zhao Liu
Hi all,
Thanks to Markus's explanation about ERRP_GUARD() on my previsou
patch [1],
I realize that perhaps more @errp dereference cases need to be
double-checked to ensure that ERRP_GUARD() is being used correctly.
Therefore, there're the patc
On 2/21/2024 9:37 PM, RR NN wrote:
> Android Virtualization Framework (AVF) supports "KVM(pKVM)" also Qualcomm's
> "Gunyah" and MediaTek's "GenieZone" as the hypervisor. Please Add these
> hypervisors to QEMU.
I don't understand this comment. Do you want QEMU to work as VMM as well
for these Hyper
21.02.2024 22:52, Tianlan Zhou :
Input grab key should be Ctrl-Alt-g, not just Ctrl-Alt.
v2:
- Update help message in system/vl.c
v1:
- Initial patch
Tianlan Zhou (2):
docs/system: Update description for input grab key
system/vl: Update description for input grab key
docs/system/keys.
Android Virtualization Framework (AVF) supports "KVM(pKVM)" also Qualcomm's
"Gunyah" and MediaTek's "GenieZone" as the hypervisor. Please Add these
hypervisors to QEMU.
On 21/02/2024 20.52, Tianlan Zhou wrote:
Input grab key should be Ctrl-Alt-g, not just Ctrl-Alt.
Signed-off-by: Tianlan Zhou
---
docs/system/keys.rst.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/keys.rst.inc b/docs/system/keys.rst.inc
index 2e2c97aa23..
On 21/02/2024 20.52, Tianlan Zhou wrote:
Input grab key should be Ctrl-Alt-g, not just Ctrl-Alt.
Signed-off-by: Tianlan Zhou
---
system/vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/vl.c b/system/vl.c
index a82555ae15..b8469d9965 100644
--- a/system/vl.c
+++
On 2024/2/22 3:28, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> Support ALLINT msr access as follow:
>> mrs , ALLINT // read allint
>> msr ALLINT, // write allint with imm
>>
>> Signed-off-by: Jinjie Ruan
>> ---
>> target/arm/helper.c | 32
Hi all,
This is the v6 patch to support S3.
In current code, when guest does S3, virtio devices are reset during that
process, that causes the display resources of virtio-gpu are destroyed,
then the display can't come back after resuming.
This v6 patch implement the No_Soft_Reset bit of PCI_PM_CTRL
In current code, when guest does S3, virtio devices are reset due to
the bit No_Soft_Reset is not set. After resetting, the display resources
of virtio-gpu are destroyed, then the display can't come back and only
show blank after resuming.
Implement No_Soft_Reset bit of PCI_PM_CTRL register, then
Done. thanks.
On Wed, Feb 21, 2024 at 6:00 PM Konstantin Kostiuk
wrote:
>
>
> On Wed, Feb 21, 2024 at 11:51 AM Dehan Meng wrote:
>
>> Add support of Windows Server 2025 in get-osinfo command
>>
>> Signed-off-by: Dehan Meng
>> ---
>> qga/commands-win32.c | 1 +
>> 1 file changed, 1 insertion(+
v1 -> v2
update the array size "WIN_10_0_SERVER_VERSION_MATRIX" in case
array out of range elements.
Dehan Meng (1):
qga-win: Add support of Windows Server 2025 in get-osinfo command
qga/commands-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.35.1
Add support of Windows Server 2025 in get-osinfo command
Signed-off-by: Dehan Meng
---
qga/commands-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index 697c65507c..b37fa7b5ba 100644
--- a/qga/commands-win32.c
+++ b/qga/c
Add support of Windows Server 2025 in get-osinfo command
Signed-off-by: Dehan Meng
---
qga/commands-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index 697c65507c..b37fa7b5ba 100644
--- a/qga/commands-win32.c
+++ b/qga/c
v1 -> v2
update the array size "WIN_10_0_SERVER_VERSION_MATRIX" in case
array out of range elements.
Dehan Meng (1):
qga-win: Add support of Windows Server 2025 in get-osinfo command
qga/commands-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.35.1
On 2024/2/22 4:06, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> This only implements the external delivery method via the GICv3.
>>
>> Signed-off-by: Jinjie Ruan
>> ---
>> target/arm/cpu-qom.h | 3 ++-
>> target/arm/cpu.c | 39 ++
On 2024/2/22 4:41, Richard Henderson wrote:
> On 2/21/24 09:09, Richard Henderson wrote:
>> On 2/21/24 03:08, Jinjie Ruan via wrote:
>>> Add ALLINT MSR (immediate) to decodetree. And the EL0 check is necessary
>>> to ALLINT. Avoid the unconditional write to pc and use
>>> raise_exception_ra
>>>
On 2024/2/22 3:09, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> Add ALLINT MSR (immediate) to decodetree. And the EL0 check is necessary
>> to ALLINT. Avoid the unconditional write to pc and use raise_exception_ra
>> to unwind.
>>
>> Signed-off-by: Jinjie Ruan
>> ---
>
[ add Ira and Davidlohr ]
Shiyang Ruan wrote:
>
>
> 在 2024/2/10 14:34, Dan Williams 写道:
> > Shiyang Ruan wrote:
> >> The length of Physical Address in General Media Event Record/DRAM Event
> >> Record is 64-bit, so the field mask should be defined as such length.
> >
> > Can you include this us
Ping...
Hi Paolo,
do you have time to have a look at this patchset?
On 1/22/2024 4:55 PM, Binbin Wu wrote:
Gentle ping...
Please help to review and consider applying the patch series. (The KVM
part has been merged).
On 1/12/2024 2:00 PM, Binbin Wu wrote:
Linear-address masking (LAM) [1], mod
Hi Daniel,
> -Original Message-
> From: Daniel Henrique Barboza
> Sent: Thursday, February 22, 2024 2:06 AM
> To: Alvin Che-Chia Chang(張哲嘉) ;
> qemu-ri...@nongnu.org; qemu-devel@nongnu.org
> Cc: alistair.fran...@wdc.com; bin.m...@windriver.com;
> liwei1...@gmail.com; zhiwei_...@linux.alib
On 2024/2/22 上午5:24, Fabiano Rosas wrote:
Bibo Mao writes:
This patch adds migration test support for loongarch64. The test code
comes from aarch64 mostly, only that it it booted as bios in qemu since
kernel requires elf format and bios uses binary format.
In addition to providing the bina
On 2024/2/22 5:22, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> Enable FEAT_NMI on the 'max' CPU.
>>
>> Signed-off-by: Jinjie Ruan
>> ---
>> docs/system/arm/emulation.rst | 1 +
>> target/arm/tcg/cpu64.c | 1 +
>> 2 files changed, 2 insertions(+)
>
> Review
On 2024/2/22 2:50, Richard Henderson wrote:
> On 2/21/24 03:08, Jinjie Ruan via wrote:
>> The ALLINT bit in PSTATE is used to mask all IRQ or FIQ interrupts.
>>
>> Place this in its own field within ENV, as that will
>> make it easier to reset from within TCG generated code.
>>
>> With the chang
Hi Daniel,
> -Original Message-
> From: Daniel Henrique Barboza
> Sent: Thursday, February 22, 2024 1:26 AM
> To: Alvin Che-Chia Chang(張哲嘉) ;
> qemu-ri...@nongnu.org; qemu-devel@nongnu.org
> Cc: alistair.fran...@wdc.com; bin.m...@windriver.com;
> liwei1...@gmail.com; zhiwei_...@linux.alib
On 2/12/24 10:43, Ilya Leoshkevich wrote:
int main(void)
{
shmat(shmget(IPC_PRIVATE, 1836016, IPC_CREAT | 0600), (void
*)0x2804000, 0);
open("/proc/self/maps", O_RDONLY);
}
Apparently an mmap() is missing for shmat() when g>h and shmaddr is
specified. The mismatch between
The PL031 allows you to read RTCLR, which is meant to give you the last
value written. PL031State has an lr field which is used when reading
from RTCLR, and is present in the VM migration state, but we never
actually update it, so it always reads as its initial 0 value.
Signed-off-by: Jessica Clar
On Wed, Feb 21, 2024 at 09:59:49PM +0100, Philippe Mathieu-Daudé wrote:
> Hi,
>
> On 21/2/24 19:53, nifan@gmail.com wrote:
> > From: Fan Ni
> >
> > The whole mailbox output payload space is already zeroed after copying
> > out the input payload, which happens before processing the specific m
From: Fan Ni
The whole mailbox output payload space is already zeroed after copying
out the input payload, which happens before processing the specific mailbox
command:
https://elixir.bootlin.com/qemu/v8.2.1/source/hw/cxl/cxl-device-utils.c#L204
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-uti
On 2/21/24 11:31, Daniel Henrique Barboza wrote:
Change the for loops in ldst helpers to do a single increment in the
counter, and assign it env->vstart, to avoid re-reading from vstart
every time.
Suggested-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/vector_h
On 2/21/24 11:31, Daniel Henrique Barboza wrote:
At this moment the global is used only in do_vsetvl(). Do a direct env
load in do_vsetvl() to read 'vl' and remove the global.
Suggested-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/insn_trans/trans_rvv.c.inc | 2
On 2/21/24 10:58, Eric Auger wrote:
Introduce a new enum type property allowing to set an
IOMMU granule. Values are 4K, 16K, 64K and host. This
latter indicates the vIOMMU granule will matches the
host page size.
A subsequent patch will add such a property to the
virtio-iommu device.
Signed-off
From: Zhenzhong Duan
s->iommu_pcibus_by_bus_num is a IOMMUPciBus pointer cache indexed
by bus number, bus number may not always be a fixed value,
i.e., guest reboot to different kernel which set bus number with
different algorithm.
This could lead to endpoint binding to wrong iommu MR in
virtio_
From: Ziqiao Kong
target/i386: As specified by Intel Manual Vol2 3-180, cmp instructions
are not allowed to have lock prefix and a `UD` should be raised. Without
this patch, s1->T0 will be uninitialized and used in the case OP_CMPL.
Signed-off-by: Ziqiao Kong
Message-ID: <20240215095015.570748-
From: Xiaoyao Li
Existing code misses a decrement of cpuid_i when skip leaf 0x1F.
There's a blank CPUID entry(with leaf, subleaf as 0, and all fields
stuffed 0s) left in the CPUID array.
It conflicts with correct CPUID leaf 0.
Signed-off-by: Xiaoyao Li
Reviewed-by:Yang Weijiang
Message-ID: <2
From: Daniel P. Berrangé
The extended clipboard message protocol requires that the client
activate the extension by requesting a psuedo encoding. If this
is not done, then any extended clipboard messages from the client
should be considered invalid and the client dropped.
Signed-off-by: Daniel P
From: Peter Maydell
It doesn't make sense to read the value of MDCR_EL2 on a non-A-profile
CPU, and in fact if you try to do it we will assert:
#6 0x74b95e96 in __GI___assert_fail
(assertion=0x565a8c70 "!arm_feature(env, ARM_FEATURE_M)",
file=0x565a6e5c "../../target/arm/he
From: Ira Weiny
The callback for building CDAT tables may return negative error codes.
This was previously unhandled and will result in potentially huge
allocations later on in ct3_build_cdat()
Detect the negative error code and defer cdat building.
Fixes: f5ee7413d592 ("hw/mem/cxl-type3: Add C
From: Fiona Ebner
Should an issue like CVE-2023-6683 ever appear again in the future,
it will be more obvious which assumption was violated.
Suggested-by: Marc-André Lureau
Signed-off-by: Fiona Ebner
Reviewed-by: Marc-André Lureau
Message-ID: <20240124105749.204610-2-f.eb...@proxmox.com>
(che
From: Xiaoyao Li
Leaf FEAT_XSAVE_XSS_LO and FEAT_XSAVE_XSS_HI also need to be cleared
when CPUID_EXT_XSAVE is not set.
Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
Signed-off-by: Xiaoyao Li
Reviewed-by: Yang Weijiang
Message-ID: <20240115091325.1904229-2-xiaoya
From: Fiona Ebner
With VNC, a client can send a non-extended VNC_MSG_CLIENT_CUT_TEXT
message with len=0. In qemu_clipboard_set_data(), the clipboard info
will be updated setting data to NULL (because g_memdup(data, size)
returns NULL when size is 0). If the client does not set the
VNC_ENCODING_CL
From: Xiaoyao Li
CPUID leaf 7 was grouped together with SGX leaf 0x12 by commit
b9edbadefb9e ("i386: Propagate SGX CPUID sub-leafs to KVM") by mistake.
SGX leaf 0x12 has its specific logic to check if subleaf (starting from 2)
is valid or not by checking the bit 0:3 of corresponding EAX is 1 or
From: Tianlan Zhou
In `qemu_console_resize()`, the old surface of the console is keeped if the new
console size is the same as the old one. If the old surface is a placeholder,
and the new size of console is the same as the placeholder surface (640*480),
the surface won't be replace.
In this situ
From: Jonathan Cameron
The _STA value returned currently indicates the ACPI0017 device
is not enabled. Whilst this isn't a real device, setting _STA
like this may prevent an OS from enumerating it correctly and
hence from parsing the CEDT table.
Signed-off-by: Jonathan Cameron
Message-Id: <202
From: Richard Henderson
The TBI and TCMA bits are located within mtedesc, not desc.
Cc: qemu-sta...@nongnu.org
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Tested-by: Gustavo Romero
Message-id: 20240207025210.8837-7-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
(ch
From: Guenter Roeck
The latest version of qemu (v8.2.0-869-g7a1dc45af5) crashes when booting
the mcimx7d-sabre emulation with Linux v5.11 and later.
qemu-system-arm: ../system/memory.c:2750: memory_region_set_alias_offset:
Assertion `mr->alias' failed.
Problem is that the Designware PCIe emula
From: "Richard W.M. Jones"
With GCC 14 the code failed to compile on i686 (and was wrong for any
version of GCC):
../block/blkio.c: In function ‘blkio_file_open’:
../block/blkio.c:857:28: error: passing argument 3 of ‘blkio_get_uint64’ from
incompatible pointer type [-Wincompatible-pointer-type
From: Akihiko Odaki
dbusaudio needs dbus_display1_dep.
Fixes: 739362d4205c ("audio: add "dbus" audio backend")
Signed-off-by: Akihiko Odaki
Reviewed-by: Marc-André Lureau
Message-Id: <20240214-dbus-v7-1-7eff29f04...@daynix.com>
(cherry picked from commit d67611907590a1e6c998b7c5a5cb4394acf8432
From: Richard Henderson
The field is encoded as [0-3], which is convenient for
indexing our array of function pointers, but the true
value is [1-4]. Adjust before calling do_mem_zpa.
Add an assert, and move the comment re passing ZT to
the helper back next to the relevant code.
Cc: qemu-sta...
From: Kevin Wolf
Since commit effd60c8 changed how QMP commands are processed, the order
of the block-commit return value and job events in iotests 144 wasn't
fixed and more and caused the test to fail intermittently.
Change the test to cache events first and then print them in a
predefined orde
From: Xiaoyao Li
The value of FEAT_XSAVE_XCR0_HI leaf and FEAT_XSAVE_XSS_HI leaf also
need to be masked by XCR0 and XSS mask respectively, to make it
logically correct.
Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
Signed-off-by: Xiaoyao Li
Reviewed-by: Yang Weij
From: Ira Weiny
The addition of the DCD support for CXL type-3 devices extended the CDAT
table large enough that the checksum being returned was incorrect.[1]
This was because the checksum value was using the header length field
rather than each of the 4 bytes of the length field. This was
prev
From: Peter Maydell
Currently if the user passes multiple -serial options on the command
line, we mostly treat those as applying to the different serial
devices in order, so that for example
-serial stdio -serial file:filename
will connect the first serial port to stdio and the second to the
nam
From: Jonathan Cameron
_STA will now return 0xB (in common with most other devices)
rather than not setting the bits to indicate this fake device
has not been enabled, and self tests haven't passed.
Signed-off-by: Jonathan Cameron
Message-Id: <20240126120132.24248-13-jonathan.came...@huawei.com
From: Zhenzhong Duan
s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed
by bus number, bus number may not always be a fixed value,
i.e., guest reboot to different kernel which set bus number with
different algorithm.
This could lead to smmu_iommu_mr() providing the wrong iommu MR.
From: Richard Henderson
The API does not generate an error for setting ASYNC | SYNC; that merely
constrains the selection vs the per-cpu default. For qemu linux-user,
choose SYNC as the default.
Cc: qemu-sta...@nongnu.org
Reported-by: Gustavo Romero
Signed-off-by: Richard Henderson
Tested-by:
The following patches are queued for QEMU stable v7.2.10:
https://gitlab.com/qemu-project/qemu/-/commits/staging-7.2
Patch freeze is 2024-03-02, and the release is planned for 2024-03-04:
https://wiki.qemu.org/Planning/7.2
Please respond here or CC qemu-sta...@nongnu.org on any additional p
From: Andrey Ignatov
There is no "size" field in vring address structure. Remove it.
Fixes: 5fc0e00291 ("Add vhost-user protocol documentation")
Signed-off-by: Andrey Ignatov
Message-Id: <20240112004555.64900-1-r...@apple.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
On 2/21/24 03:08, Jinjie Ruan via wrote:
A SPI, PPI or SGI interrupt can have a superpriority property. So
maintain superpriority information in PendingIrq and GICR/GICD.
Signed-off-by: Jinjie Ruan
---
include/hw/intc/arm_gicv3_common.h | 4
1 file changed, 4 insertions(+)
Acked-by: Ri
From: Peter Maydell
The -serial option documentation is a bit brief about '-serial none'
and '-serial null'. In particular it's not very clear about the
difference between them, and it doesn't mention that it's up to
the machine model whether '-serial none' means "don't create the
serial port" or
From: Fabiano Rosas
We're currently allowing the process_incoming_migration_bh bottom-half
to run without holding a reference to the 'current_migration' object,
which leads to a segmentation fault if the BH is still live after
migration_shutdown() has dropped the last reference to
current_migrati
From: Li Zhijian
cache_mem_ops.{read,write}() interprets opaque as
CXLComponentState(cxl_cstate) instead of ComponentRegisters(cregs).
Fortunately, cregs is the first member of cxl_cstate, so their values are
the same.
Fixes: 9e58f52d3f8 ("hw/cxl/component: Introduce CXL components (8.1.x, 8.2.
From: Jonathan Cameron
Found whilst testing a series for the linux kernel that actually
bothers to check if enabled is set. 0xB is the option used
for vast majority of DSDT entries in QEMU.
It is a little odd for a device that doesn't really exist and
is simply a hook to tell the OS there is a CE
From: Akihiko Odaki
qemu_smbios_type11_opts did not have the list terminator and that
resulted in out-of-bound memory access. It also needs to have an element
for the type option.
Cc: qemu-sta...@nongnu.org
Fixes: 2d6dcbf93fb0 ("smbios: support setting OEM strings table")
Signed-off-by: Akihiko
From: Yihuan Pan
The command line options `-ctrl-grab` and `-alt-grab` have been removed
in QEMU 7.1. Instead, use the `-display sdl,grab-mod=` option
to specify the grab modifiers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2103
Signed-off-by: Yihuan Pan
Signed-off-by: Michael Tok
From: Jan Klötzke
Debug exceptions that target AArch32 Hyp mode are reported differently
than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore
such exceptions need to be either converted to a prefetch abort
(breakpoints, vector catch) or a data abort (watchpoints).
Cc: qemu-st
From: Akihiko Odaki
qemu_smbios_type8_opts did not have the list terminator and that
resulted in out-of-bound memory access. It also needs to have an element
for the type option.
Cc: qemu-sta...@nongnu.org
Fixes: fd8caa253c56 ("hw/smbios: support for type 8 (port connector)")
Signed-off-by: Akih
On 2/21/24 03:08, Jinjie Ruan via wrote:
Included support FEAT_GICv3_NMI feature as part of virt platform
GIC initialization.
Signed-off-by: Jinjie Ruan
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c442652d0f..0359dbd8bd 100644
-
On 2/21/24 03:08, Jinjie Ruan via wrote:
Add GICD_INMIR0, GICD_INMIRnE register and support access GICD_INMIR0.
Signed-off-by: Jinjie Ruan
---
hw/intc/arm_gicv3_dist.c | 38 ++
hw/intc/gicv3_internal.h | 2 ++
2 files changed, 40 insertions(+)
Reviewed-
On 2/21/24 03:08, Jinjie Ruan via wrote:
Add IS and FS bit in ISR_EL1 and handle the read according to whether the
NMI is IRQ or FIQ.
Signed-off-by: Jinjie Ruan
---
target/arm/cpu.h| 2 ++
target/arm/helper.c | 9 +
2 files changed, 11 insertions(+)
diff --git a/target/arm/cpu.
After the 'mark_vs_dirty' changes from the previous patch the 'is_store'
bool is unused in all load/store functions that were changed. Remove it.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/riscv/insn_trans/trans_rvv.c.in
From: Ivan Klokov
The vstart_qe_zero flag is set at the beginning of the translation
phase from the env->vstart variable. During the execution phase all
functions will set env->vstart = 0 after a successful execution,
but the vstart_eq_zero flag remains the same as at the start of the
block. This
At this moment the global is used only in do_vsetvl(). Do a direct env
load in do_vsetvl() to read 'vl' and remove the global.
Suggested-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
target/riscv/translate.c| 3 +
The helper isn't setting env->vstart = 0 after its execution, as it is
expected from every vector instruction that completes successfully.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Richard Henderson
---
target/riscv/vector_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/t
trans_vmv_v_i , trans_vfmv_v_f and the trans_##NAME macro from
GEN_VMV_WHOLE_TRANS() are calling mark_vs_dirty() in both branches of
their 'ifs'. conditionals.
Call it just once in the end like other functions are doing.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Richard Henderson
---
Hi,
In this version 2 new patches were added:
- patch 5 eliminates the 'cpu_vl' global, and do_vsetvl() now loads 'vl'
directly from env. This was suggested by Richard in the v5 review;
- patch 9 does a change in how we're doing the loops in ldst helpers.
This was also proposed by Richard bu
Change the for loops in ldst helpers to do a single increment in the
counter, and assign it env->vstart, to avoid re-reading from vstart
every time.
Suggested-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/vector_helper.c | 6 +++---
1 file changed, 3 insertions(+
The global is unused after recent changes.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Richard Henderson
---
target/riscv/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 177418b2b9..f2f0593830 1
Most of the vector translations has this following pattern at the start:
TCGLabel *over = gen_new_label();
tcg_gen_brcond_tl(TCG_COND_GEU, cpu_vstart, cpu_vl, over);
And then right at the end:
gen_set_label(over);
return true;
This means that if vstart >= vl we'll not set vsta
While discussing a problem with how we're (not) setting vstart_eq_zero
Richard had the following to say w.r.t the conditional mark_vs_dirty()
calls on load/store functions [1]:
"I think it's required to have stores set dirty unconditionally, before
the operation.
Consider a store that traps on th
ppc440_pcix.c is moved from the target specific ppc_ss[] meson
source set to pci_ss[] which is common to all targets: the
object is built once.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20240215105017.57748-5-phi...@linaro.org>
---
MAINTAINERS
On 2/21/24 03:08, Jinjie Ruan via wrote:
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan
---
target/arm/cpu-qom.h | 3 ++-
target/arm/cpu.c | 39 ++-
target/arm/cpu.h | 2 ++
target/arm/helper.c | 1
On 2/21/24 10:10, Richard Henderson wrote:
On 2/21/24 03:08, Jinjie Ruan via wrote:
The NMI exception state include whether the interrupt with super priority
is IRQ or FIQ, so add a nmi_is_irq flag in CPUARMState to distinguish it.
Signed-off-by: Jinjie Ruan
---
target/arm/cpu.h | 2 ++
On 2/20/24 08:20, Daniel Henrique Barboza wrote:
On 2/20/24 08:08, frank.ch...@sifive.com wrote:
From: Frank Chang
Add missing include guard in pmu.h to avoid the problem of double
inclusion.
Signed-off-by: Frank Chang
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/pmu.h | 5
Add missing long options and --help output.
Signed-off-by: Michael Tokarev
---
qemu-img.c | 45 -
1 file changed, 36 insertions(+), 9 deletions(-)
diff --git a/qemu-img.c b/qemu-img.c
index ee35768af8..ce939708d4 100644
--- a/qemu-img.c
+++ b/qemu-img
Add missing long options and --help output.
Options added:
--format, --cache - for the image in question
--backing, --backing-format, --backing-cache, --backing-unsafe -
for the new backing file
(was eg CACHE vs SRC_CACHE, which is unclear).
Probably should rename local variables.
Signed-of
Currently we have:
./qemu-img resize none +10
qemu-img: Could not open 'none': Could not open 'none': No such file or
directory
stop printing the message twice, - local_err already has
all the info, no need to prepend additional text there.
There are a few other places like this, but I'm un
In order to correctly print executable name in various
error messages, pass argv[0] to error_exit() function.
This way, error messages will refer to actual executable
name, which may be different from 'qemu-img'.
For subcommands, pass whole argv[] array, so argv[0] is
the executable name, not subc
1 - 100 of 453 matches
Mail list logo
