[PATCH] ui: Optimization dirty rect empty check logic

2023-11-24 Thread lijiejun
Reduce unnecessary code execution in function qemu_spice_create_update, such as "int blocks = DIV_ROUND_UP(surface_width(ssd->ds), blksize);" and "int bpp = surface_bytes_per_pixel(ssd->ds);". Signed-off-by: lijiejun --- ui/spice-display.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletio

Re: [PATCH v5 12/14] tests: acpi: implement TPM CRB tests for ARM virt

2023-11-24 Thread Joelle van Dyne
On Fri, Nov 24, 2023 at 8:26 AM Stefan Berger wrote: > > > > On 11/24/23 11:21, Joelle van Dyne wrote: > > On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote: > >> > >> > >> > >> On 11/23/23 19:56, Joelle van Dyne wrote: > >>> On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger > >>> wrote: > >

[RFC PATCH v3 3/5] xen: add option to disable legacy backends

2023-11-24 Thread Volodymyr Babchuk
This patch makes legacy backends optional. As was discussed at [1] this is a solution to a problem when we can't run QEMU as a device model in a non-privileged domain. This is because legacy backends assume that they are always running in domain with ID = 0. Actually, this may prevent running QEMU

[PATCH v3 1/5] hw/xen: Set XenBackendInstance in the XenDevice before realizing it

2023-11-24 Thread Volodymyr Babchuk
From: David Woodhouse This allows a XenDevice implementation to know whether it was created by QEMU, or merely discovered in XenStore after the toolstack created it. This will allow us to create frontend/backend nodes only when we should, rather than unconditionally attempting to overwrite them f

[PATCH v3 2/5] xen: backends: don't overwrite XenStore nodes created by toolstack

2023-11-24 Thread Volodymyr Babchuk
Xen PV devices in QEMU can be created in two ways: either by QEMU itself, if they were passed via command line, or by Xen toolstack. In the latter case, QEMU scans XenStore entries and configures devices accordingly. In the second case we don't want QEMU to write/delete front-end entries for two r

[PATCH v3 4/5] xen_arm: set mc->max_cpus to GUEST_MAX_VCPUS

2023-11-24 Thread Volodymyr Babchuk
From: Oleksandr Tyshchenko The number of vCPUs used for the IOREQ configuration (machine->smp.cpus) should really match the system value as for each vCPU we setup a dedicated evtchn for the communication with Xen at the runtime. This is needed for the IOREQ to be properly configured and work if t

[PATCH v3 0/5] xen-arm: add support for virtio-pci

2023-11-24 Thread Volodymyr Babchuk
Hello, This patch series adds the basic support for virtio-pci for xen-arm guests. The main changes are in "xen_arm: Add virtual PCIe host bridge support", while most of other patches are required to make QEMU work as device model in a non-privileged domains like driver domain. New in version 3:

[PATCH v3 5/5] xen_arm: Add virtual PCIe host bridge support

2023-11-24 Thread Volodymyr Babchuk
From: Oleksandr Tyshchenko The bridge is needed for virtio-pci support, as QEMU can emulate the whole bridge with any virtio-pci devices connected to it. This patch provides a flexible way to configure PCIe bridge resources using QEMU machine properties. We made this for several reasons: - We d

[PATCH for-9.0 v12 08/18] target/riscv: add rva22u64 profile definition

2023-11-24 Thread Daniel Henrique Barboza
The rva22U64 profile, described in: https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva22-profiles Contains a set of CPU extensions aimed for 64-bit userspace applications. Enabling this set to be enabled via a single user flag makes it convenient to enable a predictable set of fe

[PATCH for-9.0 v12 16/18] target/riscv/tcg: validate profiles during finalize

2023-11-24 Thread Daniel Henrique Barboza
Enabling a profile and then disabling some of its mandatory extensions is a valid use. It can be useful for debugging and testing. But the common expected use of enabling a profile is to enable all its mandatory extensions. Add an user warning when mandatory extensions from an enabled profile are

[PATCH for-9.0 v12 10/18] target/riscv/tcg: add user flag for profile support

2023-11-24 Thread Daniel Henrique Barboza
The TCG emulation implements all the extensions described in the RVA22U64 profile, both mandatory and optional. The mandatory extensions will be enabled via the profile flag. We'll leave the optional extensions to be enabled by hand. Given that this is the first profile we're implementing in TCG w

[PATCH for-9.0 v12 14/18] target/riscv/tcg: add hash table insert helpers

2023-11-24 Thread Daniel Henrique Barboza
Previous patches added several g_hash_table_insert() patterns. Add two helpers, one for each user hash, to make the code cleaner. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 28 1 file changed, 16 insertions(+),

[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile support

2023-11-24 Thread Daniel Henrique Barboza
Hi, This new version contains naming changes suggested by Drew in v11. We're also eliminating riscv_cpu_validate_zic64b() and open-coding it inside riscv_cpu_update_named_features() since it's not worth creating a helper just to do a single assignment. Patches based on master. All patches acked

[PATCH for-9.0 v12 06/18] target/riscv/tcg: add 'zic64b' support

2023-11-24 Thread Daniel Henrique Barboza
zic64b is defined in the RVA22U64 profile [1] as a named feature for "Cache blocks must be 64 bytes in size, naturally aligned in the address space". It's a fantasy name for 64 bytes cache blocks. The RVA22U64 profile mandates this feature, meaning that applications using this profile expects 64 by

[PATCH for-9.0 v12 09/18] target/riscv/kvm: add 'rva22u64' flag as unavailable

2023-11-24 Thread Daniel Henrique Barboza
KVM does not have the means to support enabling the rva22u64 profile. The main reasons are: - we're missing support for some mandatory rva22u64 extensions in the KVM module; - we can't make promises about enabling a profile since it all depends on host support in the end. We'll revisit this

[PATCH for-9.0 v12 12/18] target/riscv/tcg: add riscv_cpu_write_misa_bit()

2023-11-24 Thread Daniel Henrique Barboza
We have two instances of the setting/clearing a MISA bit from env->misa_ext and env->misa_ext_mask pattern. And the next patch will end up adding one more. Create a helper to avoid code repetition. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei Rev

[PATCH for-9.0 v12 13/18] target/riscv/tcg: handle profile MISA bits

2023-11-24 Thread Daniel Henrique Barboza
The profile support is handling multi-letter extensions only. Let's add support for MISA bits as well. We'll go through every known MISA bit. If the profile doesn't declare the bit as mandatory, ignore it. Otherwise, set the bit in env->misa_ext and env->misa_ext_mask. Now that we're setting prof

[PATCH for-9.0 v12 07/18] riscv-qmp-cmds.c: expose named features in cpu_model_expansion

2023-11-24 Thread Daniel Henrique Barboza
Named features (zic64b the sole example at this moment) aren't expose to users, thus we need another way to expose them. Go through each named feature, get its boolean value, do the needed conversions (bool to qbool, qbool to QObject) and add it to output dict. Another adjustment is needed: named

[PATCH for-9.0 v12 03/18] target/riscv/tcg: update priv_ver on user_set extensions

2023-11-24 Thread Daniel Henrique Barboza
We'll add a new bare CPU type that won't have any default priv_ver. This means that the CPU will default to priv_ver = 0, i.e. 1.10.0. At the same we'll allow these CPUs to enable extensions at will, but then, if the extension has a priv_ver newer than 1.10, we'll end up disabling it. Users will t

[PATCH for-9.0 v12 05/18] target/riscv: add zicbop extension flag

2023-11-24 Thread Daniel Henrique Barboza
QEMU already implements zicbom (Cache Block Management Operations) and zicboz (Cache Block Zero Operations). Commit 59cb29d6a5 ("target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder") added placeholders for what would be the instructions for zicbop (Cache Block Prefetch Operations), which are

[PATCH for-9.0 v12 15/18] target/riscv/tcg: honor user choice for G MISA bits

2023-11-24 Thread Daniel Henrique Barboza
RVG behaves like a profile: a single flag enables a set of bits. Right now we're considering user choice when handling RVG and zicsr/zifencei and ignoring user choice on MISA bits. We'll add user warnings for profiles when the user disables its mandatory extensions in the next patch. We'll do the

[PATCH for-9.0 v12 04/18] target/riscv: add rv64i CPU

2023-11-24 Thread Daniel Henrique Barboza
We don't have any form of a 'bare bones' CPU. rv64, our default CPUs, comes with a lot of defaults. This is fine for most regular uses but it's not suitable when more control of what is actually loaded in the CPU is required. A bare-bones CPU would be annoying to deal with if not by profile suppor

[PATCH for-9.0 v12 02/18] target/riscv/tcg: do not use "!generic" CPU checks

2023-11-24 Thread Daniel Henrique Barboza
Our current logic in get/setters of MISA and multi-letter extensions works because we have only 2 CPU types, generic and vendor, and by using "!generic" we're implying that we're talking about vendor CPUs. When adding a third CPU type this logic will break so let's handle it beforehand. In set_mis

[PATCH for-9.0 v12 18/18] target/riscv: add 'rva22u64' CPU

2023-11-24 Thread Daniel Henrique Barboza
This CPU was suggested by Alistair [1] and others during the profile design discussions. It consists of the bare 'rv64i' CPU with rva22u64 enabled by default, like an alias of '-cpu rv64i,rva22u64=true'. Users now have an even easier way of consuming this user-mode profile by doing '-cpu rva22u64'

[PATCH for-9.0 v12 17/18] riscv-qmp-cmds.c: add profile flags in cpu-model-expansion

2023-11-24 Thread Daniel Henrique Barboza
Expose all profile flags for all CPUs when executing query-cpu-model-expansion. This will allow callers to quickly determine if a certain profile is implemented by a given CPU. This includes vendor CPUs - the fact that they don't have profile user flags doesn't mean that they don't implement the pr

[PATCH for-9.0 v12 11/18] target/riscv/tcg: add MISA user options hash

2023-11-24 Thread Daniel Henrique Barboza
We already track user choice for multi-letter extensions because we needed to honor user choice when enabling/disabling extensions during realize(). We refrained from adding the same mechanism for MISA extensions since we didn't need it. Profile support requires tne need to check for user choice f

[PATCH for-9.0 v12 01/18] target/riscv: create TYPE_RISCV_VENDOR_CPU

2023-11-24 Thread Daniel Henrique Barboza
We want to add a new CPU type for bare CPUs that will inherit specific traits of the 2 existing types: - it will allow for extensions to be enabled/disabled, like generic CPUs; - it will NOT inherit defaults, like vendor CPUs. We can make this conditions met by adding an explicit type for the

Re: [PATCH for-9.0 6/7] target/riscv: add RVA22S64 profile

2023-11-24 Thread Daniel Henrique Barboza
On 11/24/23 14:16, Andrew Jones wrote: On Thu, Nov 23, 2023 at 04:15:31PM -0300, Daniel Henrique Barboza wrote: The RVA22S64 profile consists of the following: - all mandatory extensions of RVA22U64; - priv spec v1.12.0; - satp mode sv39; - Ssccptr, a cache related named feature that we're a

[RFC PATCH-for-9.0] hw/display/qxl: Directly use VGACommonState::vram_size

2023-11-24 Thread Philippe Mathieu-Daudé
PCIQXLDevice::vram_size seems to be some shadow of VGACommonState::vram_size. Just use the latter. Signed-off-by: Philippe Mathieu-Daudé --- RFC: I don't understand this field otherwise. --- hw/display/qxl.h | 1 - hw/display/qxl.c | 17 - 2 files changed, 8 insertions(+), 10 de

[PATCH-for-8.2? v3 2/2] hw/net/can/xlnx-zynqmp: Avoid underflow while popping RX FIFO

2023-11-24 Thread Philippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data by

[PATCH-for-8.2? v3 0/2] hw/net/can/xlnx-zynqmp: Avoid underflow while popping FIFOs

2023-11-24 Thread Philippe Mathieu-Daudé
Series fully reviewed. Since v2: - Addressed Vikram review comments, - Added R-b tags Fix a pair of fuzzed bugs. Tested with the CAN tests from 'make check-qtest-aarch64'. Regards, Phil. Philippe Mathieu-Daudé (2): hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOs hw/net/can/

[PATCH-for-8.2? v3 1/2] hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOs

2023-11-24 Thread Philippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data by

[PATCH] hw/audio/sb16: Do not migrate qdev properties

2023-11-24 Thread Philippe Mathieu-Daudé
Since commit f7b4f61f63 ("qdev/isa: convert soundblaster") these fields has been converted to qdev properties, so don't need to be migrated: static Property sb16_properties[] = { DEFINE_AUDIO_PROPERTIES(SB16State, card), DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5

Re: [PATCH v2] arm/kvm: Enable support for KVM_ARM_VCPU_PMU_V3_FILTER

2023-11-24 Thread Eric Auger
Hi, On 11/17/23 07:08, Shaoqin Huang wrote: > The KVM_ARM_VCPU_PMU_V3_FILTER provide the ability to let the VMM decide > which PMU events are provided to the guest. Add a new option > `pmu-filter` as -accel sub-option to set the PMU Event Filtering. > > The `pmu-filter` has such format: > > pm

Re: [PATCH for-8.2 1/2] qdev: Fix crash in array property getter

2023-11-24 Thread Philippe Mathieu-Daudé
On 21/11/23 18:34, Kevin Wolf wrote: Passing an uninitialised list to visit_start_list() happens to work for the QObject output visitor because it treats the pointer as an opaque value and never dereferences it, but the string output visitor expects a valid list to check if it has more than one e

[PATCH for-8.2] export/vhost-user-blk: Fix consecutive drains

2023-11-24 Thread Kevin Wolf
The vhost-user-blk export implement AioContext switches in its drain implementation. This means that on drain_begin, it detaches the server from its AioContext and on drain_end, attaches it again and schedules the server->co_trip coroutine in the updated AioContext. However, nothing guarantees tha

Re: [PATCH v2] linux-user/riscv: Add Zicboz extensions to hwprobe

2023-11-24 Thread Christoph Müllner
On Fri, Nov 24, 2023 at 5:59 PM Andrew Jones wrote: > > On Thu, Nov 23, 2023 at 07:12:59PM +0100, Christoph Muellner wrote: > > From: Christoph Müllner > > > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > > This patch introduces this for QEMU's user space emulator. >

Re: [PATCH V7 0/8] Add architecture agnostic code to support vCPU Hotplug

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:28 + Salil Mehta wrote: > Virtual CPU hotplug support is being added across various architectures[1][3]. > This series adds various code bits common across all architectures: > > 1. vCPU creation and Parking code refactor [Patch 1] > 2. Update ACPI GED framework to

[PATCH 9.0 07/13] vdpa: move iotlb_batch_begin_sent to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

Re: [PATCH V7 0/8] Add architecture agnostic code to support vCPU Hotplug

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:28 + Salil Mehta wrote: [...] > physmem: Add helper function to destroy CPU AddressSpace > gdbstub: Add helper function to unregister GDB register space [...] above patches look like potential bugfixes (modulo they aren't getting used actually), only commit mes

Re: [PATCH for-9.0 4/7] target/riscv/cpu: add riscv_cpu_is_32bit()

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 04:15:29PM -0300, Daniel Henrique Barboza wrote: > Next patch will need to retrieve if a given RISCVCPU is 32 or 64 bit. > The existing helper riscv_is_32bit() (hw/riscv/boot.c) will always check > the first CPU of a given hart array, not any given CPU. > > Create a helper

[PATCH 9.0 08/13] vdpa: move backend_cap to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 10/13] vdpa: move iommu_list to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 06/13] vdpa: move file descriptor to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 05/13] vdpa: use vdpa shared for tracing

2023-11-24 Thread Eugenio Pérez
By the end of this series dma_map and dma_unmap functions don't have the vdpa device for tracing. Movinge trace function to shared member one. Print it also in the vdpa initialization so log reader can relate them. Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-vdpa.c | 26 ++-

[PATCH 9.0 02/13] vdpa: move iova tree to the shared struct

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 01/13] vdpa: add VhostVDPAShared

2023-11-24 Thread Eugenio Pérez
It will hold properties shared among all vhost_vdpa instances associated with of the same device. For example, we just need one iova_tree or one memory listener for the entire device. Next patches will register the vhost_vdpa memory listener at the beginning of the VM migration at the destination

Re: [PATCH for-9.0 7/7] target/riscv: add rva22s64 cpu

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 04:15:32PM -0300, Daniel Henrique Barboza wrote: > Add a new profile CPU 'rva22s64' to work as an alias of > > -cpu rv64i,rva22s64 > > Like the existing rva22u64 CPU already does with the RVA22U64 profile. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/

[PATCH 9.0 12/13] vdpa: use dev_shared in vdpa_iommu

2023-11-24 Thread Eugenio Pérez
The memory listener functions can call these too. Make vdpa_iommu work with VhostVDPAShared. Signed-off-by: Eugenio Pérez --- include/hw/virtio/vhost-vdpa.h | 2 +- hw/virtio/vhost-vdpa.c | 16 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/hw/v

[PATCH 9.0 11/13] vdpa: use VhostVDPAShared in vdpa_dma_map and unmap

2023-11-24 Thread Eugenio Pérez
The callers only have the shared information by the end of this series. Start converting this functions. Signed-off-by: Eugenio Pérez --- include/hw/virtio/vhost-vdpa.h | 4 +-- hw/virtio/vhost-vdpa.c | 50 +- net/vhost-vdpa.c | 5 ++-- 3 f

[PATCH 9.0 09/13] vdpa: remove msg type of vhost_vdpa

2023-11-24 Thread Eugenio Pérez
It is always VHOST_IOTLB_MSG_V2. We can always make it back per vhost_dev if needed. This change makes easier for vhost_vdpa_map and unmap not to depend on vhost_vdpa but only in VhostVDPAShared. Signed-off-by: Eugenio Pérez --- include/hw/virtio/vhost-vdpa.h | 1 - hw/virtio/vhost-vdpa.c

Re: [PATCH for-9.0 6/7] target/riscv: add RVA22S64 profile

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 04:15:31PM -0300, Daniel Henrique Barboza wrote: > The RVA22S64 profile consists of the following: > > - all mandatory extensions of RVA22U64; > - priv spec v1.12.0; > - satp mode sv39; > - Ssccptr, a cache related named feature that we're assuming always > enable since w

[PATCH 9.0 13/13] vdpa: move memory listener to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 03/13] vdpa: move iova_range to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 04/13] vdpa: move shadow_data to vhost_vdpa_shared

2023-11-24 Thread Eugenio Pérez
Next patches will register the vhost_vdpa memory listener while the VM is migrating at the destination, so we can map the memory to the device before stopping the VM at the source. The main goal is to reduce the downtime. However, the destination QEMU is unaware of which vhost_vdpa device will re

[PATCH 9.0 00/13] Consolidate common vdpa members in VhostVDPAShared

2023-11-24 Thread Eugenio Pérez
Current memory operations like pinning may take a lot of time at the destination. Currently they are done after the source of the migration is stopped, and before the workload is resumed at the destination. This is a period where neigher traffic can flow, nor the VM workload can continue (downtim

Re: [RFC PATCH 02/18] vdpa: move iova tree to the shared struct

2023-11-24 Thread Eugenio Perez Martin
On Thu, Nov 2, 2023 at 10:37 AM Si-Wei Liu wrote: > > > > On 10/19/2023 7:34 AM, Eugenio Pérez wrote: > > Next patches will register the vhost_vdpa memory listener while the VM > > is migrating at the destination, so we can map the memory to the device > > before stopping the VM at the source. Th

Re: [PATCH for-9.0 5/7] target/riscv: add satp_mode profile support

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 04:15:30PM -0300, Daniel Henrique Barboza wrote: > 'satp_mode' is a requirement for supervisor profiles like RVA22S64. > User-mode/application profiles like RVA22U64 doesn't care. > > Add 'satp_mode' to the profile description. If a profile requires it, > set it during cpu_

Re: [PATCH for-9.0 3/7] target/riscv/cpu.c: finalize satp_mode earlier

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 04:15:28PM -0300, Daniel Henrique Barboza wrote: > Profiles will need to validate satp_mode during their own finalize > methods. This will occur inside riscv_tcg_cpu_finalize_features() for > TCG. Given that satp_mode does not have any pre-req from the accelerator > finalize

Re: [PATCH V7 8/8] docs/specs/acpi_hw_reduced_hotplug: Add the CPU Hotplug Event Bit

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:36 + Salil Mehta wrote: > GED interface is used by many hotplug events like memory hotplug, NVDIMM > hotplug > and non-hotplug events like system power down event. Each of these can be > selected using a bit in the 32 bit GED IO interface. A bit has been reserved >

Re: [PATCH V7 5/8] hw/acpi: Update CPUs AML with cpu-(ctrl)dev change

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:33 + Salil Mehta wrote: wrt subj: 'cpu-(ctrl)dev change' doesn't make any sense to me, pls rephrase and be more specific. > CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is IO port > based and existing CPUs AML code assumes _CRS objects would

Re: [PATCH] hw/core: define stack variable to NULL to fix qtest with sanitizers

2023-11-24 Thread Dan Hoffman
Yes, that fixes my issue. I was receiving two errors with the sanitizers: 1. UBsan complaining that the (garbage) value didn't have the required alignment of the type 2. ASan complaining about some memory failure by read/write/accessing it On Fri, Nov 24, 2023 at 8:02 AM Markus Armbruster wrote:

Re: [PATCH v2] linux-user/riscv: Add Zicboz extensions to hwprobe

2023-11-24 Thread Andrew Jones
On Thu, Nov 23, 2023 at 07:12:59PM +0100, Christoph Muellner wrote: > From: Christoph Müllner > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > This patch introduces this for QEMU's user space emulator. > > Signed-off-by: Christoph Müllner > --- > linux-user/syscall

Re: [PATCH] block/monitor: blk_bs() return value check

2023-11-24 Thread Kevin Wolf
Am 24.11.2023 um 15:05 hat Дмитрий Фролов geschrieben: > > > On 24.11.2023 16:06, Kevin Wolf wrote: > > Am 24.11.2023 um 12:30 hat Dmitry Frolov geschrieben: > > > blk_bs() may return NULL, which will be dereferenced without a check in > > > bdrv_commit(). > > > > > > Found by Linux Verification

Re: [PATCH v1 3/3] hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMA

2023-11-24 Thread Francisco Iglesias
On 2023-11-24 15:35, Frederic Konrad wrote: UG1087 states for the source channel that: if SIZE is programmed to 0, and the DMA is started, the interrupts DONE and MEM_DONE will be asserted. This implies that it is allowed for the guest to stop the source DMA by writing a size of 0 to the SIZE

Re: [PATCH v5 12/14] tests: acpi: implement TPM CRB tests for ARM virt

2023-11-24 Thread Stefan Berger
On 11/24/23 11:21, Joelle van Dyne wrote: On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote: On 11/23/23 19:56, Joelle van Dyne wrote: On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote: On 11/14/23 16:05, Stefan Berger wrote: On 11/14/23 13:03, Stefan Berger wrote: On 11/1

[PATCH for-9.0] qapi: Add 'recurse-children' option to qom-list

2023-11-24 Thread Alberto Garcia
This allows returning a tree of all object properties under a given path, in a way similar to scripts/qmp/qom-tree. Signed-off-by: Alberto Garcia --- qapi/qom.json | 10 +- qom/qom-hmp-cmds.c | 4 ++-- qom/qom-qmp-cmds.c | 22 +- 3 files changed, 32 insertions(+

Re: [PATCH V7 4/8] hw/acpi: Update GED _EVT method AML with CPU scan

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:32 + Salil Mehta wrote: > OSPM evaluates _EVT method to map the event. The CPU hotplug event eventually > results in start of the CPU scan. Scan figures out the CPU and the kind of > event(plug/unplug) and notifies it back to the guest. Update the GED AML _EVT > meth

Re: [PATCH v5 12/14] tests: acpi: implement TPM CRB tests for ARM virt

2023-11-24 Thread Joelle van Dyne
On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote: > > > > On 11/23/23 19:56, Joelle van Dyne wrote: > > On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote: > >> > >> > >> > >> On 11/14/23 16:05, Stefan Berger wrote: > >>> > >>> > >>> On 11/14/23 13:03, Stefan Berger wrote: > > > >>>

Re: [PATCH v5 12/14] tests: acpi: implement TPM CRB tests for ARM virt

2023-11-24 Thread Stefan Berger
On 11/23/23 19:56, Joelle van Dyne wrote: On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote: On 11/14/23 16:05, Stefan Berger wrote: On 11/14/23 13:03, Stefan Berger wrote: On 11/14/23 04:36, Marc-André Lureau wrote: Hi On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote: S

Re: [PATCH v1 2/3] fix some url for amd / xilinx models

2023-11-24 Thread Francisco Iglesias
On 2023-11-24 15:35, Frederic Konrad wrote: It seems that the url changed a bit, and it triggers an error. Fix the URLs so the documentation can be reached again. Signed-off-by: Frederic Konrad Reviewed-by: Francisco Iglesias --- hw/dma/xlnx_csu_dma.c | 2 +- in

[PATCH v1 1/7] migration/multifd: Remove MultiFDPages_t::packet_num

2023-11-24 Thread Fabiano Rosas
This was introduced by commit 34c55a94b1 ("migration: Create multipage support") and never used. Signed-off-by: Fabiano Rosas --- migration/multifd.c | 1 - migration/multifd.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/migration/multifd.c b/migration/multifd.c index ec58c58082..e7dd9

Re: [PATCH V7 3/8] hw/acpi: Update ACPI GED framework to support vCPU Hotplug

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:31 + Salil Mehta wrote: > ACPI GED (as described in the ACPI 6.4 spec) uses an interrupt listed in the > _CRS object of GED to intimate OSPM about an event. Later then demultiplexes > the ^^^ typo? > notified event by evaluating ACPI _EVT me

[PATCH v1 7/7] tests/qtest/migration: Use the new migration_test_add

2023-11-24 Thread Fabiano Rosas
Replace the tests registration with the new function that prints tests names. Signed-off-by: Fabiano Rosas --- tests/qtest/migration-test.c | 201 ++- 1 file changed, 104 insertions(+), 97 deletions(-) diff --git a/tests/qtest/migration-test.c b/tests/qtest/migra

[PATCH v1 2/7] migration/multifd: Remove QEMUFile from where it is not needed

2023-11-24 Thread Fabiano Rosas
Signed-off-by: Fabiano Rosas --- migration/multifd.c | 12 ++-- migration/multifd.h | 4 ++-- migration/ram.c | 15 +++ 3 files changed, 15 insertions(+), 16 deletions(-) diff --git a/migration/multifd.c b/migration/multifd.c index e7dd9c6317..7e7fe59fcb 100644 --- a/mig

[PATCH v1 6/7] tests/qtest/migration: Add a wrapper to print test names

2023-11-24 Thread Fabiano Rosas
Our usage of gtest results in us losing the very basic functionality of "knowing which test failed". The issue is that gtest only prints test names ("paths" in gtest parlance) once the test has finished, but we use asserts in the tests and crash gtest itself before it can print anything. We also us

[PATCH v1 3/7] migration/multifd: Change multifd_pages_init argument

2023-11-24 Thread Fabiano Rosas
The 'size' argument is actually the number of pages that fit in a multifd packet. Change it to uint32_t and rename. Signed-off-by: Fabiano Rosas --- migration/multifd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/migration/multifd.c b/migration/multifd.c index 7e7fe

[PATCH v1 4/7] migration: Report error in incoming migration

2023-11-24 Thread Fabiano Rosas
We're not currently reporting the errors set with migrate_set_error() when incoming migration fails. Signed-off-by: Fabiano Rosas --- migration/migration.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/migration/migration.c b/migration/migration.c index 28a34c9068..cca32c553c 100644

[PATCH v1 5/7] tests/qtest/migration: Print migration incoming errors

2023-11-24 Thread Fabiano Rosas
We're currently just asserting when incoming migration fails. Let's print the error message from QMP as well. Signed-off-by: Fabiano Rosas --- tests/qtest/migration-helpers.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/tests/qtest/migration-helpers.c b/tests/qtest/migration-helpers

[PATCH v1 0/7] migration cleanups and testing improvements

2023-11-24 Thread Fabiano Rosas
Hi, These are some general cleanups and improvements to testing and debugging that I collected over the past month. Fabiano Rosas (7): migration/multifd: Remove MultiFDPages_t::packet_num migration/multifd: Remove QEMUFile from where it is not needed migration/multifd: Change multifd_pages_

Re: [PATCH v1 1/3] hw/ssi/xilinx_spips: fix an out of bound access

2023-11-24 Thread Francisco Iglesias
On 2023-11-24 15:35, Frederic Konrad wrote: The spips, qspips, and zynqmp-qspips share the same realize function (xilinx_spips_realize) and initialize their io memory region with different mmio_ops passed through the class. The size of the memory region is set to the largest area (0x200 bytes

Re: [PATCH V7 1/8] accel/kvm: Extract common KVM vCPU {creation,parking} code

2023-11-24 Thread Igor Mammedov
On Mon, 13 Nov 2023 20:12:29 + Salil Mehta wrote: > KVM vCPU creation is done once during the vCPU realization when Qemu vCPU > thread > is spawned. This is common to all the architectures as of now. > > Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the > correspon

Re: [PATCH v2 6/6] xen_arm: Add virtual PCIe host bridge support

2023-11-24 Thread Volodymyr Babchuk
Hi Igor, Thank you for the review, Igor Mammedov writes: > On Tue, 21 Nov 2023 22:10:28 + > Volodymyr Babchuk wrote: > >> From: Oleksandr Tyshchenko >> >> The bridge is needed for virtio-pci support, as QEMU can emulate the >> whole bridge with any virtio-pci devices connected to it. >

Re: [PATCH] sh4: Coding style: Remove tabs

2023-11-24 Thread Philippe Mathieu-Daudé
Hi, On 24/11/23 05:45, xun wrote: From: Yihuan Pan Replaces TABS with spaces to ensure have a consistent coding style with an indentation of 4 spaces in the SH4 subsystem. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/376 Signed-off-by: Yihuan Pan --- linux-user/sh4/termbits.h |

[PULL 00/10] Misc bug fixes for QEMU 8.2.0-rc2

2023-11-24 Thread Paolo Bonzini
This pull request is based on https://patchew.org/QEMU/20231123155620.3042891-1-alex.ben...@linaro.org/. The following changes since commit 6ef164188d005d7636f7ed8a1033cc4083498301: tests/tcg: finesse the registers check for "hidden" regs (2023-11-23 14:10:06 +) are available in the Git

[PULL 03/10] docs: document what configure does with virtual environments

2023-11-24 Thread Paolo Bonzini
Given the recent confusion around how QEMU detects the system Meson installation, and/or decides to install its own, it is time to fill in the "Python virtual environments and the QEMU build system" section of the documentation. Signed-off-by: Paolo Bonzini --- docs/devel/build-system.rst | 88 +

[PULL 07/10] disas/cris: Pass buffer size to format_dec() to avoid overflow warning

2023-11-24 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé Propagate the buffer size to format_dec() and use snprintf(). This should silence this UBSan -Wformat-overflow warning: In file included from /usr/include/stdio.h:906, from include/qemu/osdep.h:114, from ../disas/cris.c:21:

[PULL 04/10] buildsys: Bump known good meson version to v1.2.3

2023-11-24 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé We need meson v1.2.3 to build QEMU on macOS Sonoma. It also builds fine all our CI jobs (as tested by also bumping "accepted" in pythondeps.toml), so let's use it as our "good enough" packaged wheel. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1939 Sugge

[PULL 09/10] configure: Make only once with pseudo-"in source tree" builds

2023-11-24 Thread Paolo Bonzini
From: Akihiko Odaki Pseudo-"in source tree" build used to run make in the build directory as many times as goals. Worse, although .NOTPARALLEL is specified, it does not work for patterns, and run make in parallel, which can break things. Add a new rule "build", and let it call make. The pattern

[PULL 10/10] scripts: adjust url to Coverity tools

2023-11-24 Thread Paolo Bonzini
The URL to the Coverity tools download has changed; the old one points to an obsolete version that is not supported anymore. Adjust to point to the correct and supported tools. Suggested-by: Peter Maydell Signed-off-by: Paolo Bonzini --- scripts/coverity-scan/run-coverity-scan | 4 ++-- 1 file

[PULL 01/10] coverity: physmem: use simple assertions instead of modelling

2023-11-24 Thread Paolo Bonzini
From: Vladimir Sementsov-Ogievskiy Unfortunately Coverity doesn't follow the logic aroung "len" and "l" variables in stacks finishing with flatview_{read,write}_continue() and generate a lot of OVERRUN false-positives. When small buffer (2 or 4 bytes) is passed to mem read/write path, Coverity as

[PULL 06/10] audio: Free consumed default audio devices

2023-11-24 Thread Paolo Bonzini
From: Akihiko Odaki Failed default audio devices were removed from the list but not freed, and that made LeakSanitizer sad. Free default audio devices as they are consumed. Signed-off-by: Akihiko Odaki Acked-by: Marc-André Lureau Message-ID: <20231120112804.9736-1-akihiko.od...@daynix.com> Sig

[PULL 08/10] system: Use &error_abort in memory_region_init_ram_[device_]ptr()

2023-11-24 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé If an unexpected error condition happens, we have to abort (&fatal_error is meant for expected errors). Suggested-by: Paolo Bonzini Suggested-by: Markus Armbruster Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Reviewed-by: Markus Armbruster

[PULL 05/10] .gitlab-ci.d/cirrus: Add manual testing of macOS 14 (Sonoma)

2023-11-24 Thread Paolo Bonzini
From: Philippe Mathieu-Daudé Upgrade libvirt-ci so it covers macOS 14. Add a manual entry (QEMU_JOB_OPTIONAL: 1) to test on Sonoma release. Refresh the lci-tool generated files. Signed-off-by: Philippe Mathieu-Daudé Message-ID: <20231109160504.93677-3-phi...@linaro.org> Signed-off-by: Paolo Bon

[PULL 02/10] tests: respect --enable/--disable-download for Avocado

2023-11-24 Thread Paolo Bonzini
Pass the content of $mkvenv_flags (which is either "--online" or empty) down to tests/Makefile.include. Signed-off-by: Paolo Bonzini --- configure | 9 + tests/Makefile.include | 2 +- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/configure b/configure index

Re: [PATCH 16/19] qapi/schema: add type hints

2023-11-24 Thread Markus Armbruster
John Snow writes: > This patch only adds type hints, which aren't utilized at runtime and > don't change the behavior of this module in any way. > > In a scant few locations, type hints are removed where no longer > necessary due to inference power from typing all of the rest of > creation; and a

Re: [PATCH v2] tests/acpi/bios-tables-test: do not write new blobs unless there are changes

2023-11-24 Thread Igor Mammedov
On Tue, 7 Nov 2023 10:19:51 +0530 Ani Sinha wrote: > When dumping table blobs using rebuild-expected-aml.sh, table blobs from all > test variants are dumped regardless of whether there are any actual changes to > the tables or not. This creates lot of new files for various test variants > that

Re: [PATCH 0/4] ICH9 root PCI hotplug

2023-11-24 Thread Michael S. Tsirkin
On Fri, Nov 24, 2023 at 03:01:35PM +0100, Igor Mammedov wrote: > On Wed, 15 Nov 2023 17:18:53 + > Thierry Escande wrote: > > > Hi, > > > > This series fixes acpi_hotplug_bridge accessor names, adds new accessors > > for acpi-root-pci-hotplug property, and enables root PCI hotplug by > > defa

[PATCH 1/2] block: commit: Allow users to request only format driver names in backing file format

2023-11-24 Thread Peter Krempa
Introduce a new flag 'backing_file_format_no_protocol' for the block-commit QMP command which instructs the internals to use 'raw' instead of the protocol driver in case when a image is used without a dummy 'raw' wrapper. The flag is designed such that it can be always asserted by management tools

[PATCH 0/2] block: commit/stream: Allow users to request only format driver names in backing file format

2023-11-24 Thread Peter Krempa
Please see patches for rationale. Libvirt patches using this new flag will be posted soon-ish (after cleanup). Peter Krempa (2): block: commit: Allow users to request only format driver names in backing file format block: stream: Allow users to request only format driver names in back

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