Hi Philippe,
On 10/11/23 13:28, Philippe Mathieu-Daudé wrote:
On 25/9/23 02:24, Gavin Shan wrote:
On 9/12/23 08:40, Gavin Shan wrote:
On 9/11/23 19:43, Philippe Mathieu-Daudé wrote:
On 11/9/23 01:28, Gavin Shan wrote:
On 9/8/23 21:22, Philippe Mathieu-Daudé wrote:
Add a field to return the
On 2023/10/10 16:56, Michael Tokarev wrote:
10.10.2023 05:59, Akihiko Odaki wrote:
The largest possible virtio-net header is struct virtio_net_hdr_v1_hash.
Fixes: fbbdbddec0 ("tap: allow extended virtio header with hash info")
Signed-off-by: Akihiko Odaki
---
net/tap.c | 4 ++--
1 file chan
From: Volker Rümelin
Replace the #ifdef ES1370_VERBOSE code with code that the compiler
can optimize away to avoid bit rot and fix the already rotten code.
Tested-by: Rene Engel
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
Message-Id: <20230917065813
From: Volker Rümelin
Change the block structure according to the QEMU Coding Style
documentation.
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
Message-Id: <20230917065813.6692-6-vr_q...@t-online.de>
---
hw/audio/es1370.c | 36
Hi
On Tue, Oct 10, 2023 at 4:26 PM BALATON Zoltan wrote:
>
> On Sun, 17 Sep 2023, Volker Rümelin wrote:
> > Cc: qemu-stable. Patch 1/8 is a bug fix.
> > Cc: more people. The maintainer of hw/audio is busy with other projects.
> >
> > Earlier this year I was asked if I could help to debug an audio
From: Volker Rümelin
Change the type of the variable temp to size_t to avoid a type
cast. While at it, rename the variable name to to_transfer. This
improves the readability of the code.
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
Message-Id: <202309
From: Volker Rümelin
It turns out that there are drivers which assume that interrupts
can't be lost. E.g. the AROS sb128 driver is such a driver. Add
a lost interrupt tracepoint to debug this kind of issues.
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
From: Marc-André Lureau
The following changes since commit cea3ea670fe265421131aad90c36fbb87bc4d206:
Merge tag 'pull-vfio-20231009' of https://github.com/legoater/qemu into
staging (2023-10-09 10:11:35 -0400)
are available in the Git repository at:
https://gitlab.com/marcandre.lureau/qemu
From: Volker Rümelin
Replace the #ifdef ES1370_DEBUG code with code that the compiler
can optimize away to avoid bit rot. While at it, replace strcat()
with pstrcat().
Tested-by: Rene Engel
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
Message-Id: <20
From: Volker Rümelin
It seems that nobody has enabled the debug code of the ES1370
device for a long time. Since then, the code has bit-rotted.
Replace the bit-rotten code with tracepoints.
Tested-by: Rene Engel
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Z
From: Volker Rümelin
The dolog macro is unused. Remove the macro and use the now unused
ES1370_VERBOSE macro to replace its inverse ES1370_SILENT macro.
Tested-by: Rene Engel
Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
Tested-by: BALATON Zoltan
Message-Id: <20230917065813.66
From: Volker Rümelin
Reset the current sample counter when writing the Channel Sample
Count Register. The Linux ens1370 driver and the AROS sb128
driver expect the current sample counter counts down from sample
count to 0 after a write to the Channel Sample Count Register.
Currently the current s
On 2023/10/11 11:21, Philippe Mathieu-Daudé wrote:
Hi Zhiwei,
On 11/10/23 04:51, LIU Zhiwei wrote:
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types.
Hi Philippe,
I don't understand why should w
Hi,
https://wiki.qemu.org/ displays:
(Cannot access the database)
Backtrace:
#0 /var/www/html/includes/libs/rdbms/loadbalancer/LoadBalancer.php(972):
Wikimedia\Rdbms\LoadBalancer->reportConnectionError()
#1 /var/www/html/includes/libs/rdbms/loadbalancer/LoadBalancer.php(944):
Wikimedia\Rdbms
Hi Paolo,
On 7/9/23 14:59, Paolo Bonzini wrote:
This allows building libblkio at the same time as QEMU, if QEMU is
configured with --enable-blkio --enable-download.
Signed-off-by: Paolo Bonzini
---
subprojects/libblkio.wrap | 6 ++
1 file changed, 6 insertions(+)
create mode 100644 su
On 11/10/23 05:25, LIU Zhiwei wrote:
On 2023/10/11 1:04, Richard Henderson wrote:
On 10/9/23 05:42, LIU Zhiwei wrote:
On 2023/10/9 19:02, Philippe Mathieu-Daudé wrote:
When CPUArchState* is available (here CPURISCVState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
RISCVCP
On 25/07/2023 13.36, Peter Maydell wrote:
In query_port() we pass the address of a local pvrdma_port_attr
struct to the rdma_query_backend_port() function. Unfortunately,
rdma_backend_query_port() wants a pointer to a struct ibv_port_attr,
and the two are not the same length.
Coverity spotted t
Philippe Mathieu-Daudé writes:
> Signed-off-by: Philippe Mathieu-Daudé
g_autofree enables direct return, which is easier to understand. Like
it.
Reviewed-by: Markus Armbruster
Peter Xu writes:
> Hi, Markus,
>
> On Tue, Oct 10, 2023 at 09:18:23PM +0200, Markus Armbruster wrote:
>
> [...]
>
>> >> The point I was trying to make is this. Before the patch, we reject
>> >> attempts to set the property value to null. Afterwards, we accept them,
>> >> i.e. the patch loses "r
On Tue, Oct 10, 2023 at 8:23 PM Nicholas Piggin wrote:
> On Wed Oct 11, 2023 at 7:55 AM AEST, Warner Losh wrote:
> > On Tue, Oct 10, 2023 at 1:53 AM Nicholas Piggin
> wrote:
> >
> > > FreeBSD project provides qcow2 images that work well for testing QEMU.
> > > Add pseries tests for HPT and Radix
On Tue, Oct 10, 2023 at 6:36 PM Nicholas Piggin wrote:
> On Wed Oct 11, 2023 at 7:55 AM AEST, Warner Losh wrote:
> > On Tue, Oct 10, 2023 at 1:53 AM Nicholas Piggin
> wrote:
> >
> > > FreeBSD project provides qcow2 images that work well for testing QEMU.
> > > Add pseries tests for HPT and Radix
Hi
I am trying to understand how migration, more specifically live-migration
works in QEMU. I've tried going through the source code but didn't
understand much, and couldn't find documentation either. I want to work on
live migration and need help getting to know the code.
More specifically I want
Hi Gavin,
On 25/9/23 02:24, Gavin Shan wrote:
On 9/12/23 08:40, Gavin Shan wrote:
On 9/11/23 19:43, Philippe Mathieu-Daudé wrote:
On 11/9/23 01:28, Gavin Shan wrote:
On 9/8/23 21:22, Philippe Mathieu-Daudé wrote:
Add a field to return the QOM type name of a CPU class.
Signed-off-by: Philipp
On 2023/10/11 1:04, Richard Henderson wrote:
On 10/9/23 05:42, LIU Zhiwei wrote:
On 2023/10/9 19:02, Philippe Mathieu-Daudé wrote:
When CPUArchState* is available (here CPURISCVState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
RISCVCPU*). The QOM cast RISCV_CPU() macro w
Hi Zhiwei,
On 11/10/23 04:51, LIU Zhiwei wrote:
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types.
Hi Philippe,
I don't understand why should we use FOO_CPU_TYPE_NAME macro to resolve
target CPU t
On Mon, Sep 25, 2023 at 9:08 PM Mayuresh Chitale
wrote:
>
> From: Himanshu Chauhan
>
> Smepmp is a ratified extension which qemu refers to as epmp.
> Rename epmp to smepmp and add it to extension list so that
> it is added to the isa string.
>
> Signed-off-by: Himanshu Chauhan
> Signed-off-by: M
On 10/5/23 11:54 AM, Stefan Hajnoczi wrote:
On Wed, Oct 04, 2023 at 04:34:10PM -0400, Tyler Fanelli wrote:
The Rust sev library provides a C API for the AMD SEV launch ioctls, as
well as the ability to build with meson. Add the Rust sev library as a
QEMU subproject with the goal of outsourcing a
On 10/5/23 2:03 AM, Philippe Mathieu-Daudé wrote:
Hi Tyler,
On 4/10/23 22:34, Tyler Fanelli wrote:
The Rust sev library provides a C API for the AMD SEV launch ioctls, as
well as the ability to build with meson. Add the Rust sev library as a
QEMU subproject with the goal of outsourcing all SEV
On Sat, Oct 7, 2023 at 12:29 AM Daniel Henrique Barboza
wrote:
>
> We have two instances of the setting/clearing a MISA bit from
> env->misa_ext and env->misa_ext_mask pattern. And the next patch will
> end up adding one more.
>
> Create a helper to avoid code repetition.
>
> Signed-off-by: Daniel
On Sat, Oct 7, 2023 at 12:25 AM Daniel Henrique Barboza
wrote:
>
> We already track user choice for multi-letter extensions because we
> needed to honor user choice when enabling/disabling extensions during
> realize(). We refrained from adding the same mechanism for MISA
> extensions since we did
On Sat, Oct 7, 2023 at 12:23 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> Several design changes were made in this version after the reviews and
> feedback in the v1 [1]. The high-level summary is:
>
> - we'll no longer allow users to set profile flags for vendor CPUs. If
> we're to adhere to t
On Fri, Oct 6, 2023 at 11:24 PM Daniel Henrique Barboza
wrote:
>
> KVM does not have the means to support enabling the rva22u64 profile.
> The main reasons are:
>
> - we're missing support for some mandatory rva22u64 extensions in the
> KVM module;
>
> - we can't make promises about enabling a p
Hi Li and Zhao,
On 9/10/23 11:01, xianglai li wrote:
From: Tianrui Zhao
Implement kvm_arch_get/set_registers interfaces, many regs
can be get/set in the function, such as core regs, csr regs,
fpu regs, mp state, etc.
Cc: "Michael S. Tsirkin"
Cc: Cornelia Huck
Cc: Paolo Bonzini
Cc: "Marc-An
On Fri, Oct 6, 2023 at 11:23 PM Daniel Henrique Barboza
wrote:
>
> The rva22U64 profile, described in:
>
> https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva22-profiles
>
> Contains a set of CPU extensions aimed for 64-bit userspace
> applications. Enabling this set to be enabled
On 2023/10/10 17:28, Philippe Mathieu-Daudé wrote:
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types.
Hi Philippe,
I don't understand why should we use FOO_CPU_TYPE_NAME macro to resolve
target CPU types? In my opinion, we should pass the
CPU type
On Fri, Oct 6, 2023 at 11:23 PM Daniel Henrique Barboza
wrote:
>
> zicntr is the Base Counters and Timers extension described in chapter 12
> of the unprivileged spec. It describes support for RDCYCLE, RDTIME and
> RDINSTRET.
>
> QEMU already implements it way before it was a discrete extension.
>
Hi Dmitry,
On 8/10/23 08:54, ~disean wrote:
From: Dmitry Borisov
Fix incorrect MII status value (0xf02c).
Use default values from a 21143-based board:
https://www.beowulf.org/pipermail/tulip-bug/2000-February/000485.html
Thank you for your patch!
Cc'ing the maintainers for this file (you c
On 10/10/23 16:24, Cornelia Huck wrote:
We can neaten the code by switching to the kvm_set_one_reg function.
Reviewed-by: Gavin Shan
Signed-off-by: Cornelia Huck
---
target/arm/kvm.c | 13 +++--
target/arm/kvm64.c | 66 +-
2 files changed,
On 10/10/23 16:24, Cornelia Huck wrote:
We can neaten the code by switching the callers that work on a
CPUstate to the kvm_get_one_reg function.
Reviewed-by: Gavin Shan
Signed-off-by: Cornelia Huck
---
target/arm/kvm.c | 15 +++-
target/arm/kvm64.c | 57 ---
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on:
v2: Do use g_autofree...
---
migration/ram.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/migration/ram.c b/migration/ram.c
index 982fbbeee1..a0e2ef4f1c 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@
On Wed Oct 11, 2023 at 7:55 AM AEST, Warner Losh wrote:
> On Tue, Oct 10, 2023 at 1:53 AM Nicholas Piggin wrote:
>
> > FreeBSD project provides qcow2 images that work well for testing QEMU.
> > Add pseries tests for HPT and Radix, KVM and TCG.
> >
> > Other architectures could be added so this doe
在 2023/10/10 下午9:53, Philippe Mathieu-Daudé 写道:
ISA bus and serial aren't used by the LoongArch virt
machine. Remove the dead code.
Philippe Mathieu-Daudé (2):
hw/loongarch/virt: Remove unused ISA UART
hw/loongarch/virt: Remove unused ISA Bus
include/hw/loongarch/virt.h | 3 ---
hw/loo
Hi Eric,
>-Original Message-
>From: Eric Auger
>Sent: Monday, October 9, 2023 5:09 PM
>Subject: [PATCH v5 07/15] vfio/pci: Introduce vfio_[attach/detach]_device
>
>We want the VFIO devices to be able to use two different
>IOMMU backends, the legacy VFIO one and the new iommufd one.
>
>Int
On Thu, Oct 5, 2023 at 8:29 PM Max Chou wrote:
>
> The operator (fwmacc16) of vfwmaccbf16.vf helper function should be
> replaced by fwmaccbf16.
>
> Signed-off-by: Max Chou
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/vector_helper.c | 2 +-
> 1 file changed, 1 insert
On Mon, Oct 9, 2023 at 11:08 PM Daniel Henrique Barboza
wrote:
>
> At this moment there are eleven CPU extension properties that starts
> with capital 'Z': Zifencei, Zicsr, Zihintntl, Zihintpause, Zawrs, Zfa,
> Zfh, Zfhmin, Zve32f, Zve64f and Zve64d. All other extensions are named
> with lower-cas
On Mon, Oct 9, 2023 at 9:03 PM Philippe Mathieu-Daudé wrote:
>
> When CPUArchState* is available (here CPUPPCState*), we
> can use the fast env_archcpu() macro to get ArchCPU* (here
> PowerPCCPU*). The QOM cast POWERPC_CPU() macro will be
> slower when building with --enable-qom-cast-debug.
>
> Si
On Mon, Oct 9, 2023 at 10:50 PM Richard W.M. Jones wrote:
>
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has
On Mon, Oct 9, 2023 at 9:04 PM Philippe Mathieu-Daudé wrote:
>
> When CPUArchState* is available (here CPUS390XState*), we
> can use the fast env_archcpu() macro to get ArchCPU* (here
> S390CPU*). The QOM cast S390_CPU() macro will be slower when
> building with --enable-qom-cast-debug.
>
> Signed
On Mon, Oct 9, 2023 at 9:03 PM Philippe Mathieu-Daudé wrote:
>
> When CPUArchState* is available (here CPUXtensaState*), we
> can use the fast env_archcpu() macro to get ArchCPU* (here
> XtensaCPU*). The QOM cast XTENSA_CPU() macro will be slower
> when building with --enable-qom-cast-debug.
>
> S
On Mon, Oct 9, 2023 at 9:03 PM Philippe Mathieu-Daudé wrote:
>
> When CPUArchState* is available (here CPURISCVState*), we
> can use the fast env_archcpu() macro to get ArchCPU* (here
> RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower
> when building with --enable-qom-cast-debug.
>
> Insp
On Mon, Oct 9, 2023 at 10:50 PM Richard W.M. Jones wrote:
>
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has
On Tue, Oct 10, 2023 at 4:00 AM Atish Kumar Patra wrote:
>
> On Sun, Oct 8, 2023 at 5:58 PM Alistair Francis wrote:
> >
> > On Wed, Oct 4, 2023 at 7:36 PM Rob Bradford wrote:
> > >
> > > Hi Atish,
> > >
> > > On Tue, 2023-10-03 at 13:25 -0700, Atish Kumar Patra wrote:
> > > > On Tue, Oct 3, 2023
On Tue, Oct 10, 2023 at 3:52 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> GDB has XML support since 6.7 which was released in 2007.
> It's time to remove support for old GDB versions without XML support.
>
> Signed-off-by: Akihiko Odaki
> Acked-by: Alex Bennée
> Message-Id: <20230912224107
On Wed, Oct 11, 2023 at 12:54 AM Gregory Price
wrote:
>
> On Tue, Oct 10, 2023 at 10:35:03AM +0900, Hyeonggon Yoo wrote:
> > Hello folks,
> >
> > I experienced strange application crashes/internal KVM errors
> > while playing with emulated type 3 CXL memory. I would like to know
> > if this is a r
On Tue, Oct 10, 2023 at 4:05 AM Alex Bennée wrote:
>
> Since 0b1a649047 (tests/docker: use direct RUNC call to build
> containers) we ended up with the potential for the remaining docker.py
> script calls to deviate from the direct RUNC calls. Fix this by
> dropping the use of ENGINE in the makefi
On Tue, Oct 10, 2023 at 4:36 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> target_xml is no longer a fixed-length array but a pointer to a
> variable-length memory.
>
> Fixes: 56e534bd11 ("gdbstub: refactor get_feature_xml")
> Signed-off-by: Akihiko Odaki
> Reviewed-by: Philippe Mathieu-Daud
On Tue, Oct 10, 2023 at 3:52 AM Alex Bennée wrote:
>
> If you have both engines installed but one is broken you are stuck
> with the automagic. Allow the user to override the engine for this
> case.
>
> Signed-off-by: Alex Bennée
Reviewed-by: Alistair Francis
Alistair
> ---
> configure | 8 +
On Tue, Oct 10, 2023 at 2:48 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> GDB has XML support since 6.7 which was released in 2007.
> It's time to remove support for old GDB versions without XML support.
>
> Signed-off-by: Akihiko Odaki
> Message-Id: <20230912224107.29669-12-akihiko.od...@d
On Tue, Oct 10, 2023 at 2:47 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> An array is a more appropriate data structure than a list for gdb_regs
> since it is initialized only with append operation and read-only after
> initialization.
>
> Signed-off-by: Akihiko Odaki
> Message-Id: <2023091
On Tue, Oct 10, 2023 at 2:44 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> All implementations of gdb_arch_name() returns dynamic duplicates of
> static strings. It's also unlikely that there will be an implementation
> of gdb_arch_name() that returns a truly dynamic value due to the nature
>
On Tue, Oct 10, 2023 at 7:32 PM Philippe Mathieu-Daudé
wrote:
>
> TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64
> definitions which are target specific. Such target specific
> definition taints "cpu-qom.h".
>
> Since "cpu-qom.h" must be target agnostic, remove its target
> speci
On Wed Oct 11, 2023 at 7:55 AM AEST, Warner Losh wrote:
> On Tue, Oct 10, 2023 at 1:53 AM Nicholas Piggin wrote:
>
> > FreeBSD project provides qcow2 images that work well for testing QEMU.
> > Add pseries tests for HPT and Radix, KVM and TCG.
> >
> > Other architectures could be added so this doe
On Tue Oct 10, 2023 at 5:58 PM AEST, Philippe Mathieu-Daudé wrote:
> Hi Nicholas,
>
> On 10/10/23 09:52, Nicholas Piggin wrote:
> > Similarly to the AIX test, this adds some tests that can boot MacOS9
> > and OSX images that are provided.
> > ---
> > tests/avocado/ppc/macos9.ppm | Bin 0 -> 921615
On 10/11/23 00:24, Cornelia Huck wrote:
We can use read_sys_reg64 to get the SVE_VLS register instead of
calling GET_ONE_REG directly.
Suggested-by: Gavin Shan
Signed-off-by: Cornelia Huck
---
target/arm/kvm64.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
Reviewed-by: Gavi
Hello Cedric,
Thanks for the review.
On 9/11/23 07:43, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This patchset introduces IBM's Flexible Service Interface(FSI).
Time for some fun with inter-processor buses. FSI allows a service
processor access to the internal buses of a h
Hello Cedric,
Thanks for the review.
On 9/11/23 07:41, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limi
On Tue, 10 Oct 2023, Vikram Garhwal wrote:
> On Mon, Oct 09, 2023 at 05:02:14PM -0700, Stefano Stabellini wrote:
> > On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> > > From: Juergen Gross
> > >
> > > Add a memory region which can be used to automatically map granted
> > > memory. It is starting at 0
Hello Cedric,
Thanks for the review.
On 9/11/23 07:29, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in
POWER processors. This now
Migration bandwidth is a very important value to live migration. It's
because it's one of the major factors that we'll make decision on when to
switchover to destination in a precopy process.
This value is currently estimated by QEMU during the whole live migration
process by monitoring how fast
On Tue, Oct 10, 2023 at 06:43:05PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Sep 22, 2023 at 11:53:17AM -0300, Fabiano Rosas wrote:
> >> Commit d2026ee117 ("multifd: Fix the number of channels ready") moved
> >> the "post" of channels_ready to the start of the multifd_send_thre
On Tue, Oct 10, 2023 at 1:53 AM Nicholas Piggin wrote:
> FreeBSD project provides qcow2 images that work well for testing QEMU.
> Add pseries tests for HPT and Radix, KVM and TCG.
>
> Other architectures could be added so this does not get a ppc_ prefix
> but is instead named similarly to boot_li
Peter Xu writes:
> On Fri, Sep 22, 2023 at 11:53:17AM -0300, Fabiano Rosas wrote:
>> Commit d2026ee117 ("multifd: Fix the number of channels ready") moved
>> the "post" of channels_ready to the start of the multifd_send_thread()
>> loop and added a missing "wait" at multifd_send_sync_main(). Whil
On Tue, Oct 10, 2023 at 05:00:37PM -0400, Peter Xu wrote:
> On Fri, Sep 22, 2023 at 11:53:17AM -0300, Fabiano Rosas wrote:
> > Commit d2026ee117 ("multifd: Fix the number of channels ready") moved
> > the "post" of channels_ready to the start of the multifd_send_thread()
> > loop and added a missin
On Mon, Oct 09, 2023 at 05:10:43PM -0700, Stefano Stabellini wrote:
> On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> > From: Juergen Gross
> >
> > qemu_map_ram_ptr() and qemu_ram_ptr_length() share quite some code, so
> > modify qemu_ram_ptr_length() a little bit and use it for
> > qemu_map_ram_ptr(
Hi Stefano,
On Mon, Oct 09, 2023 at 05:02:14PM -0700, Stefano Stabellini wrote:
> On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> > From: Juergen Gross
> >
> > Add a memory region which can be used to automatically map granted
> > memory. It is starting at 0x8000ULL in order to be able to
Hello Cedirc,
Thanks for the review.
On 9/11/23 07:26, Cédric Le Goater wrote:
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
This commit models the FSI bus. CFAM is hanging out of FSI bus. The bus
is model such a way tha
On Tue Oct 10, 2023 at 10:49 PM AEST, Philippe Mathieu-Daudé wrote:
> On 10/10/23 14:43, Alex Bennée wrote:
> >
> > Nicholas Piggin writes:
> >
> >> An AIX image can be provided by setting AIX_IMAGE environment
> >> variable when running avocado.
> >>
> >> It's questionable whether we should car
On Tue Oct 10, 2023 at 11:01 PM AEST, Daniel P. Berrangé wrote:
> On Tue, Oct 10, 2023 at 01:43:16PM +0100, Alex Bennée wrote:
> >
> > Nicholas Piggin writes:
> >
> > > An AIX image can be provided by setting AIX_IMAGE environment
> > > variable when running avocado.
> > >
> > > It's questionabl
On Fri, Sep 22, 2023 at 11:53:17AM -0300, Fabiano Rosas wrote:
> Commit d2026ee117 ("multifd: Fix the number of channels ready") moved
> the "post" of channels_ready to the start of the multifd_send_thread()
> loop and added a missing "wait" at multifd_send_sync_main(). While it
> does work, the pl
On Tue Oct 10, 2023 at 10:05 PM AEST, Joel Stanley wrote:
> On Tue, 10 Oct 2023 at 18:24, Nicholas Piggin wrote:
> >
> > POWER10 is the latest IBM Power machine. Although it is not offered in
> > "OPAL mode" (i.e., powernv configuration), so there is a case that it
> > should remain at powernv9, m
On Tue Oct 10, 2023 at 10:03 PM AEST, Joel Stanley wrote:
> On Tue, 10 Oct 2023 at 18:23, Nicholas Piggin wrote:
> >
> > Add simple Linux kernel boot tests for BookE 64-bit and 32-bit CPUs
> > using Guenter Roeck's rootfs images for Linux testing, and a gitlab
> > repository with kernel images tha
On Fri, Sep 29, 2023 at 04:51:35PM +0200, Kevin Wolf wrote:
> After all the preparation in previous series, this series reaches an
> important milestone for the graph locking work: TSA can now verify that
> all accesses to the children and parent lists of nodes happen under the
> graph lock.
>
> H
On 10/10/23 22:35, Miles Glenn wrote:
On Tue, 2023-10-10 at 21:31 +0100, Mark Cave-Ayland wrote:
On 10/10/2023 20:52, Glenn Miles wrote:
Testing of the pca9552 device on the powernv platform
showed that the reset method was not being called when
an instance of the device was realized. This wa
On Tue, 2023-10-10 at 21:31 +0100, Mark Cave-Ayland wrote:
> On 10/10/2023 20:52, Glenn Miles wrote:
>
> > Testing of the pca9552 device on the powernv platform
> > showed that the reset method was not being called when
> > an instance of the device was realized. This was causing
> > the INPUT0/I
On 10/10/2023 20:52, Glenn Miles wrote:
Testing of the pca9552 device on the powernv platform
showed that the reset method was not being called when
an instance of the device was realized. This was causing
the INPUT0/INPUT1 POR values to be incorrect.
Fixed by overriding the parent pca955x_rea
On Tue, 2023-10-10 at 21:58 +0200, Cédric Le Goater wrote:
> On 10/10/23 21:52, Glenn Miles wrote:
> > Testing of the pca9552 device on the powernv platform
> > showed that the reset method was not being called when
> > an instance of the device was realized. This was causing
> > the INPUT0/INPUT1
Hi Stefano,
On Mon, Oct 09, 2023 at 04:51:53PM -0700, Stefano Stabellini wrote:
> On Thu, 5 Oct 2023, Vikram Garhwal wrote:
> > From: Juergen Gross
> >
> > Virtio devices should never be unplugged at boot time, as they are
> > similar to pci passthrough devices.
> >
> > Signed-off-by: Juergen Gr
Fabiano Rosas writes:
> was: [PATCH] qtest/migration: Add a test for the analyze-migration script
> https://lore.kernel.org/r/20230927214756.14117-1-faro...@suse.de
>
> The analyze-migration.py script should be kept in sync with the code
> that generates the migration stream. The addition/removal
On Thu, Sep 21, 2023 at 11:56:23PM -0700, Elena Ufimtseva wrote:
> In migration rate limiting atomic operations are used
> to read the rate limit variables and transferred bytes and
> they are expensive. Check first if rate_limit_max is equal
> to RATE_LIMIT_DISABLED and return false immediately if
On Mon, 2023-10-09 at 22:42 +0200, Cédric Le Goater wrote:
> Hello Glenn,
>
> On 10/9/23 20:05, Glenn Miles wrote:
> > From: Cédric Le Goater
> >
> > Not supported :
> >
> > . 10 bit addresses
> > . multimaster
> > . slave
> >
> > Signed-off-by: Cédric Le Goater
> > Signed-off-by: Glenn
On 10/10/23 19:19, Glenn Miles wrote:
From: Cédric Le Goater
Wires up three I2C controller instances to the powernv9 chip
XSCOM address space.
Each controller instance is wired up to a single I2C bus of
its own. No other I2C devices are connected to the buses
at this time.
Signed-off-by: Céd
Hi, Markus,
On Tue, Oct 10, 2023 at 09:18:23PM +0200, Markus Armbruster wrote:
[...]
> >> The point I was trying to make is this. Before the patch, we reject
> >> attempts to set the property value to null. Afterwards, we accept them,
> >> i.e. the patch loses "reject null property value". If
On 10/10/23 19:19, Glenn Miles wrote:
From: Cédric Le Goater
The more recent IBM power processors have an embedded I2C
controller that is accessible by software via the XSCOM
address space.
Each instance of the I2C controller is capable of controlling
multiple I2C buses (one at a time). Prior
On 10.10.23 20:55, Vladimir Sementsov-Ogievskiy wrote:
On 09.10.23 12:46, Fiona Ebner wrote:
Changes in v2:
* move bitmap to filter which allows to avoid draining when
changing the copy mode
* add patch to determine copy_to_target only once
* drop patches returning redundan
On 10/10/23 21:52, Glenn Miles wrote:
Testing of the pca9552 device on the powernv platform
showed that the reset method was not being called when
an instance of the device was realized. This was causing
the INPUT0/INPUT1 POR values to be incorrect.
Fixed by overriding the parent pca955x_realiz
On 09.10.23 12:46, Fiona Ebner wrote:
Signed-off-by: Fiona Ebner
This should be merged to the previous patch, to not break git bisect. Tests
should work at any commit.
--
Best regards,
Vladimir
On Mon, 2023-10-09 at 23:06 +0200, Cédric Le Goater wrote:
> Hello Glenn,
>
> On 10/5/23 23:10, Glenn Miles wrote:
> > Testing of the pca9552 device on the powernv platform
> > showed that the reset method was not being called when
> > an instance of the device was realized. This was causing
> >
On 09.10.23 12:46, Fiona Ebner wrote:
To start out, only actively-synced is returned.
For example, this is useful for jobs that started out in background
mode and switched to active mode. Once actively-synced is true, it's
clear that the mode switch has been completed. Note that completion of
th
Testing of the pca9552 device on the powernv platform
showed that the reset method was not being called when
an instance of the device was realized. This was causing
the INPUT0/INPUT1 POR values to be incorrect.
Fixed by overriding the parent pca955x_realize method with a
new pca9552_realize meth
On 09.10.23 12:46, Fiona Ebner wrote:
Signed-off-by: Fiona Ebner
---
No changes in v2.
blockjob.c | 4
include/block/blockjob_int.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/blockjob.c b/blockjob.c
index f8cf6e58e2..7e8cfad0fd 100644
--- a/blockjob.c
1 - 100 of 305 matches
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