From: Philippe Mathieu-Daudé
Use object_dynamic_cast() to determine if 'dev' is a TYPE_VIRTIO_MMIO.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Sergio Lopez
Signed-off-by: Michael Tokarev
---
hw/i386/microvm.c | 3 +--
1 file changed, 1 insertion(+), 2
From: Mattias Nissler
The printed offset value is prefixed with 0x, but was actually printed
in decimal. To spare others the confusion, adjust the format specifier
to hexadecimal.
Signed-off-by: Mattias Nissler
Reviewed-by: Jagannathan Raman
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by:
Hi here!
This is my first pullreq in quite some years.
It looks like there has been quite some trivial patches which were forgotten,
so I thought I'd give it a shot at least.
And since I haven't done a PR in a while, I basically forgot how to do it
properly :)
Please note: there are 2 patches i
Fixes: f3034ad71fcd0a6a58bc37830f182b307f089159
Signed-off-by: Michael Tokarev
Reviewed-by: Stefan Weil
---
hw/virtio/virtio-qmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/virtio-qmp.c b/hw/virtio/virtio-qmp.c
index b5e1835299..3528fc628d 100644
--- a/hw/virt
From: Andrew Jeffery
As-is the error message can cause some confusion as the mentioned sysctl
attribute name is wrong:
https://www.kernel.org/doc/html/latest/admin-guide/sysctl/vm.html#mmap-min-addr
Signed-off-by: Andrew Jeffery
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
On 2022/12/01 20:00, Akihiko Odaki wrote:
On 2022/12/01 19:40, Peter Maydell wrote:
On Thu, 1 Dec 2022 at 10:27, Akihiko Odaki
wrote:
A register access error typically means something seriously wrong
happened so that anything bad can happen after that and recovery is
impossible.
Even failing
On 2023/04/24 19:58, Akihiko Odaki wrote:
On 2023/01/16 20:18, Peter Maydell wrote:
On Sat, 14 Jan 2023 at 06:49, Akihiko Odaki
wrote:
On 2023/01/14 14:23, Richard Henderson wrote:
On 1/8/23 22:22, Akihiko Odaki wrote:
libvirt uses "none" machine type to test KVM availability. Before this
c
Hi Mohd,
On 6/10/23 10:01 AM, Mohd Yusuf Abdul Hamid wrote:
I am trying to reserve a portion of the system memory in QEMU (arm64 virt),
v7.2.1 - but the kernel never honors the reserved memory area and keeps using
the area.
Say, I dumped out DTB and added:
reserved-memory {
#address-cells
Hi,
I am trying to reserve a portion of the system memory in QEMU (arm64 virt),
v7.2.1 - but the kernel never honors the reserved memory area and keeps
using the area.
Say, I dumped out DTB and added:
reserved-memory {
#address-cells = <0x02>;
#size-cells = <0x02>;
rsvdram@5000 {
no-
From: Ira Weiny
Sent: Friday, June 9, 2023 2:06 PM
To: ni...@outlook.com ; Ira Weiny ;
Shesha Bhushan Sreenivasamurthy
Cc: Shesha Bhushan Sreenivasamurthy ; Fan Ni
; Jonathan Cameron ;
qemu-devel@nongnu.org ; linux-...@vger.kernel.org
; gregory.pr...@memverge.com
; hch...@avery-design.com
On 6/9/23 10:07, Stefano Stabellini wrote:
From: Vikram Garhwal
Add a new machine xenpvh which creates a IOREQ server to register/connect with
Xen Hypervisor.
Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a
TPM emulator and connects to swtpm running on host machin
On 9/6/23 18:41, Suravee Suthikulpanit wrote:
To use the newly introduced PC machine class local variable.
Suggedted-by: Igor Mammedov
"Suggested-by"
Signed-off-by: Suravee Suthikulpanit
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/
On Fri, Jun 09, 2023 at 05:49:06AM +, Duan, Zhenzhong wrote:
> Seems vtd_page_walk_one() already works in above way, checking mapping
> changes and calling kernel for changed entries?
Agreed in most cases, but the path this patch modified is not? E.g. it
happens in rare cases where we simply
ni...@outlook.com wrote:
> The 06/08/2023 08:43, Ira Weiny wrote:
> > Shesha Bhushan Sreenivasamurthy wrote:
[snip]
>
> Hi Ira & Shesha,
> FYI. I reabased my patch series on top of the above branch and created a new
> branch here:
>
> https://github.com/moking/qemu-dcd-preview-latest/tree/dcd-p
On 6/9/23 10:23, Aaron Lindsay wrote:
+static inline int isar_feature_pauth_get_features(const ARMISARegisters *id)
+{
+if (isar_feature_aa64_pauth_arch_qarma5(id)) {
+return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, APA);
+} else if (isar_feature_aa64_pauth_arch_qarma3(id)) {
+
On 6/9/23 10:23, Aaron Lindsay wrote:
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -847,6 +847,7 @@ static bool
hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
{ HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.id_aa64dfr1 },
{ HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isa
27.03.2023 14:55, Andrew Jeffery wrote:
Hello,
This series is a couple of trivial improvements to the error message from
linux-user's ELF loader
when it fails to mmap() the guest's address space. Both issues caused me brief
confusion when trying
to sort myself out after hitting
https://gitlab
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index 8fb44a8b7f..5621728271 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -19,12 +19,16 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#incl
09.06.2023 12:23, Anastasia Belova wrote:
job may be NULL if queue->exit is true. Check
it before dereference job.
Fixes: f31f9c1080 ("vnc: add magic cookie to VncState")
Signed-off-by: Anastasia Belova
---
ui/vnc-jobs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/u
From: Lin Ma
We're converting callers of bdrv_get_allocated_file_size() to run in
coroutines because that function will be made asynchronous when called
(indirectly) from the QMP dispatcher.
This QMP command is a candidate because it indirectly calls
bdrv_get_allocated_file_size() through bdrv_b
This is another caller of bdrv_get_allocated_file_size() that needs to
be converted to a coroutine because that function will be made
asynchronous when called (indirectly) from the QMP dispatcher.
This QMP command is a candidate because it calls bdrv_do_query_node_info(),
which in turn calls bdrv_
The last call site of this function has been removed by commit
c04d0ab026 ("qemu-img: Let info print block graph").
Reviewed-by: Claudio Fontana
Signed-off-by: Fabiano Rosas
---
block/qapi.c | 27 ---
include/block/qapi.h | 3 ---
2 files changed, 30 deletions(-
We're currently doing a full query-block just to enumerate the devices
for qmp_nbd_server_add and then discarding the BlockInfoList
afterwards. Alter hmp_nbd_server_start to instead iterate explicitly
over the block_backends list.
This allows the removal of the dependency on qmp_query_block from
h
Some callers of this function are about to be converted to run in
coroutines, so allow it to be executed both inside and outside a
coroutine while we convert all the callers.
This will be reverted once all callers of bdrv_do_query_node_info run
in a coroutine.
Signed-off-by: Fabiano Rosas
Review
We're converting callers of bdrv_get_allocated_file_size() to run in
coroutines because that function will be made asynchronous when called
(indirectly) from the QMP dispatcher.
This function is a candidate because it calls bdrv_do_query_node_info(),
which in turn calls bdrv_get_allocated_file_siz
From: João Silva
The fstat call can take a long time to finish when running over
NFS. Add a version of it that runs in the thread pool.
Adapt one of its users, raw_co_get_allocated_file size to use the new
version. That function is called via QMP under the qemu_global_mutex
so it has a large cha
We're converting callers of bdrv_get_allocated_file_size() to run in
coroutines because that function will be made asynchronous when called
(indirectly) from the QMP dispatcher.
This function is a candidate because it calls bdrv_query_image_info()
-> bdrv_do_query_node_info() -> bdrv_get_allocated
Hi,
The major change from the last version is that this time I'm moving
all of the callers of bdrv_get_allocated_file_size() into
coroutines. I had to make some temporary changes to avoid asserts
while not all the callers were converted.
I tried my best to explain why I think the changes are safe
The following patches will add co_wrapper annotations to functions
declared in qapi.h. Add that header to the set of files used by
block-coroutine-wrapper.py.
Signed-off-by: Fabiano Rosas
---
block/meson.build | 1 +
scripts/block-coroutine-wrapper.py | 1 +
2 files changed, 2 i
The commit 5d8813593f ("block/qapi: Let bdrv_query_image_info()
recurse") removed the loop where we set the 'bs0' variable, so now it
is just the same as 'bs'.
Signed-off-by: Fabiano Rosas
---
block/qapi.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/block/qapi.c b/bl
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
SME set_svcr() is called by handle_msr_i() in translate-a64.c.
To be able to restrict helper-sme.h.inc to SME-specific files,
move the set_svcr() helper definition into the common helper.h.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/help
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h| 96 +---
target/arm/tcg/helper-iwmmxt.h.inc | 114 +
2 files changed, 115 insertions(+), 95 deletions(-)
create mode
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
helper.h is used by all units, but not all require the
SVE2 definitions. We already have helper-sve.h.inc for
SVE* definitions, move them there. The next commit will
remove it from the common helper.h.
Signed-off-by: Philippe Mathieu-Daudé
---
tar
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Instead of including helper-neon.h.inc via helper.h which
is included by all TCG files, restrict it to the few files
that require it.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h | 1 -
target/arm/tcg/neon_helper.c
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
helper.h is used by all units, but not all require the NEON
definitions. Move them to a new header; the next commit will
remove it from the common helper.h.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h | 206 +
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
neon_tbl() helper is only called by NEON files. No need
to have it in the generic op_helper.c, move it with the
rest of the NEON helpers.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/tcg/neon_helper.c | 22 ++
target/a
> On 8 Jun 2023, at 14.41, Mads Ynddal wrote:
>
> From: Mads Ynddal
>
> By moving the dynamic argument construction to keyword-arguments,
> we can remove all of the specialized handling, and streamline it.
> If a tracing method wants to access these, they can define the
> kwargs, or ignore it
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Instead of including helper-vfp.h.inc via helper.h which
is included by all TCG files, restrict it to the few files
that require it.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h | 1 -
target/arm/tcg/mve_helper.c
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
helper.h is used by all units, but not all require the VFP
definitions. Move them to a new header; the next commit will
remove it from the common helper.h.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h | 137 +--
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Instead of including helper-iwmmxt.h.inc via helper.h which
is included by all TCG files, restrict it to the few files
that require it.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/helper.h | 1 -
target/arm/tcg/iwmmxt_help
On 09.06.23 18:55, Michael S. Tsirkin wrote:
This is tagged, pull request will be delayed due to kvm forum though.
OK, thanks!
On Fri, Jun 09, 2023 at 04:32:40PM +0300, Vladimir Sementsov-Ogievskiy wrote:
ping.
On 22.05.23 23:17, Vladimir Sementsov-Ogievskiy wrote:
v4:
preparation patches
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Extract 1300 lines from the big enough translate.c.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/tcg/translate-iwmmxt.c | 1334 +
target/arm/tcg/translate.c| 1312
target/a
On 6/8/23 09:58, Philippe Mathieu-Daudé wrote:
On 8/6/23 18:29, Richard Henderson wrote:
Cut and paste error from the 4-operand memops.
Fixes: ab64da797740 ("tcg/tci: Adjust passing of MemOpIdx")
I had this patch tagged for review but you were quicker
(not sure I'd have caught the issue altho
On 6/8/23 11:21, Jagannathan Raman wrote:
The following changes since commit 45ae97993a75f975f1a01d25564724c7e10a543f:
Merge tag 'pull-tricore-20230607' of https://github.com/bkoppelmann/qemu
into staging (2023-06-07 11:45:22 -0700)
are available in the Git repository at:
https://gitlab
The aim here is to eliminate any device-specific registers from the main BMDMA
bar memory region so it can potentially be moved into the shared PCI IDE device.
For each BMDMA bus create a new cmd646-bmdma-specific memory region representing
the device-specific BMDMA registers and then map them usi
This will enable CMD646-specific fields to be added to CMD6464IDEState in
future.
Signed-off-by: Mark Cave-Ayland
---
hw/ide/cmd646.c | 4 +++-
include/hw/ide/cmd646.h | 38 ++
2 files changed, 41 insertions(+), 1 deletion(-)
create mode 100644 inclu
Signed-off-by: Mark Cave-Ayland
---
hw/alpha/dp264.c | 4 ++--
hw/sparc64/sun4u.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 03495e1e60..f2affecad9 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -13,7 +13,7 @@
#in
Signed-off-by: Mark Cave-Ayland
---
hw/ide/cmd646.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index a68357c1c5..20f1e41d57 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -96,7 +96,7 @@ static uint64_t bmdma_read(void
This series follows on from a comment I made on Bernhard's PCI IDE tidy-up
series [1]
that it should be possible to further consolidate the BMDMA registers into the
PCI
IDE device with some minor rework to the CMD646 device.
It does this by moving the CMD646 device-specific BMDMA registers to a
This is to allow us to use the cmd646_bmdma_ops name for the CMD646
device-specific registers in the next commit.
Signed-off-by: Mark Cave-Ayland
---
hw/ide/cmd646.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index a3e227fba7..9103da
On 6/8/23 02:35, Xiao Wang wrote:
There's no code using MTYPE, which was a concept used in older vector
implementation.
Signed-off-by: Xiao Wang
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/vector_helper.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --gi
The macOS catalina compiler produces an error for __int128_t
as the type for allocation with SSE inline asm constraint.
Create a new X86Int128Union type and use the vector type for
all SSE register inputs and outputs.
Signed-off-by: Richard Henderson
---
host/include/x86_64/host/atomic128-ldst.h
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
Expose a few methods and variables before extracting iwmmxt
code from translate.c.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/tcg/translate.h | 6 ++
target/arm/tcg/translate.c | 8
2 files changed, 10 insertions(+), 4 del
On 6/9/23 03:47, Philippe Mathieu-Daudé wrote:
In order to be able to move the iwmmxt-related code,
fix its style to avoid:
ERROR: braces {} are necessary for all arms of this statement
ERROR: space prohibited before that '++' (ctx:WxB)
Signed-off-by: Philippe Mathieu-Daudé
---
target/a
On 6/9/23 03:46, Philippe Mathieu-Daudé wrote:
CONFIG_TCG is always defined within target/arm/tcg/.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/tcg/cpu32.c| 4 +---
target/arm/tcg/m_helper.c | 6 --
2 files changed, 1 insertion(+), 9 deletions(-)
Reviewed-by: Richard Hende
On 6/9/23 03:46, Philippe Mathieu-Daudé wrote:
We only need lookup_tb_ptr() typedef.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/cpu-exec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
prototype, not typedef.
Reviewed-by: Richard Henderson
r~
On 6/9/23 03:46, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
plugins/core.c | 1 -
1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On Fri, 9 Jun 2023 at 18:58, Richard Henderson
wrote:
>
> The macOS catalina compiler produces an error for __int128_t
> as the type for allocation with SSE inline asm constraint.
> Create a new X86Int128Union type and use the vector type for
> all SSE register inputs and outputs.
>
> Signed-off-b
On 6/9/23 08:54, Peter Maydell wrote:
The LDG instruction loads the tag from a memory address (identified
by [Xn + offset]), and then merges that tag into the destination
register Xt. We implemented this correctly for the case when
allocation tags are enabled, but didn't get it right when ATA=0:
Changes from v2 of this patchset [0]:
- Remove properties for EPAC, Pauth2, FPAC, FPACCombined
- Separate out aa64isar2 addition into its own patch
- Comment clarifications
- Several code formatting/simplifications
- Rebase on top of latest upstream changes (for example, those which
reorganized d
Signed-off-by: Aaron Lindsay
---
target/arm/cpu.h | 65 +--
target/arm/tcg/pauth_helper.c | 2 +-
2 files changed, 63 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index df04c9a9ab..22dd898577 100644
--- a/target/arm/
Signed-off-by: Aaron Lindsay
---
target/arm/syndrome.h | 7 +++
target/arm/tcg/pauth_helper.c | 16
2 files changed, 23 insertions(+)
diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
index d27d1bc31f..bf79c539d9 100644
--- a/target/arm/syndrome.h
+++ b/tar
Signed-off-by: Aaron Lindsay
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/tcg/pauth_helper.c | 54 ---
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/pauth_helper.c b/target/arm/tcg/pauth_helper.c
index
Signed-off-by: Aaron Lindsay
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/tcg/pauth_helper.c | 33 +++--
1 file changed, 23 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/pauth_helper.c b/target/arm/tcg/pauth_helper.c
index 1e
Signed-off-by: Aaron Lindsay
---
target/arm/cpu.h | 1 +
target/arm/cpu64.c | 48 +++---
2 files changed, 34 insertions(+), 15 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 22dd898577..0c4c6c9c82 100644
--- a/target/arm/cpu.h
+++ b
Signed-off-by: Aaron Lindsay
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
---
target/arm/tcg/pauth_helper.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/target/arm/tcg/pauth_helper.c b/target/arm/tcg/pauth_helper.c
index 68942015e1..1e9159c31
Signed-off-by: Aaron Lindsay
---
target/arm/cpu.h | 1 +
target/arm/helper.c | 4 ++--
target/arm/hvf/hvf.c | 1 +
target/arm/kvm64.c | 2 ++
4 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 36c608f0e6..df04c9a9ab 100644
--- a/target/
An instruction is a 'combined' Pointer Authentication instruction if it
does something in addition to PAC - for instance, branching to or
loading an address from the authenticated pointer. Knowing whether a PAC
operation is 'combined' is needed to implement the FPACCOMBINE feature
for ARMv8.3.
Sig
From: Vikram Garhwal
Add CONFIG_XEN for aarch64 device to support build for ARM targets.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabellini
Reviewed-by: Alex Bennée
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
inde
From: Vikram Garhwal
In preparation to moving most of xen-hvm code to an arch-neutral location,
move non IOREQ references to:
- xen_get_vmport_regs_pfn
- xen_suspend_notifier
- xen_wakeup_notifier
- xen_ram_init
towards the end of the xen_hvm_init_pc() function.
This is done to keep the common
From: Stefano Stabellini
On ARM it is possible to have a functioning xenpv machine with only the
PV backends and no IOREQ server. If the IOREQ server creation fails continue
to the PV backends initialization.
Also, moved the IOREQ registration and mapping subroutine to new function
xen_do_ioreq_
From: Stefano Stabellini
From: Stefano Stabellini
This is done to prepare for enabling xenpv support for ARM architecture.
On ARM it is possible to have a functioning xenpv machine with only the
PV backends and no IOREQ server. If the IOREQ server creation fails,
continue to the PV backends ini
From: Vikram Garhwal
Add a new machine xenpvh which creates a IOREQ server to register/connect with
Xen Hypervisor.
Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a
TPM emulator and connects to swtpm running on host machine via chardev socket
and support TPM functio
From: Stefano Stabellini
have_xen_pci_passthrough is only used for Xen x86 VMs.
Signed-off-by: Stefano Stabellini
Reviewed-by: Alex Bennée
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index 34306a6205..481865bfa9 100644
--- a/meson.build
+++
From: Vikram Garhwal
Replace g_malloc with g_new and perror with error_report.
Signed-off-by: Vikram Garhwal
Reviewed-by: Stefano Stabellini
Reviewed-by: Paul Durrant
---
hw/xen/xen-hvm-common.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/xen/xen-hvm-c
From: Stefano Stabellini
This patch does following:
1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in
preparation for moving most of xen-hvm code to an arch-neutral location,
move the x86-specific portion of xen_set_memory to arch_xen_set_memory.
Also, move han
From: Vikram Garhwal
xen-mapcache.c contains common functions which can be used for enabling Xen on
aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it
accessible for both aarch64 and x86.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabellini
Reviewed-by:
From: Stefano Stabellini
In preparation to moving most of xen-hvm code to an arch-neutral location, move:
- shared_vmport_page
- log_for_dirtybit
- dirty_bitmap
- suspend
- wakeup
out of XenIOState struct as these are only used on x86, especially the ones
related to dirty logging.
Updated XenIOS
Hi Peter,
Vikram fixed the gitlab test problem again. This time I am providing
proof that it is not introducing build regressions:
baseline: https://gitlab.com/sstabellini/qemu/-/pipelines/894578994
with new commits: https://gitlab.com/sstabellini/qemu/-/pipelines/894471770
Cheers,
Stefano
Th
09.06.2023 19:29, Peter Maydell wrote:
Coverity doesn't like the way we might end up calling getgroups()
with a NULL grouplist pointer. This is fine for the special case
of gidsetsize == 0, but we will also do it if the guest passes
us a negative gidsetsize. (CID 1512465)
Explicitly fail the neg
To use the newly introduced PC machine class local variable.
Suggedted-by: Igor Mammedov
Signed-off-by: Suravee Suthikulpanit
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 33ffb03a32..f8d105e829 100644
--- a/hw/i386/pc.c
+
On 6/8/2023 3:40 PM, Igor Mammedov wrote:
On Wed, 7 Jun 2023 15:57:16 -0500
Suravee Suthikulpanit wrote:
Currently, pc-q35 and pc-i44fx machine models are default to use SMBIOS 2.8
(32-bit entry point). Since SMBIOS 3.0 (64-bit entry point) is now fully
supported since QEMU 7.0, default to
Coverity doesn't like the way we might end up calling getgroups()
with a NULL grouplist pointer. This is fine for the special case
of gidsetsize == 0, but we will also do it if the guest passes
us a negative gidsetsize. (CID 1512465)
Explicitly fail the negative gidsetsize with EINVAL, as the kern
On Fri, 9 Jun 2023 at 17:03, Richard Henderson
wrote:
>
> On 6/9/23 03:47, Peter Maydell wrote:
> > I noticed a couple of finalize_memop related oddities while I
> > was rebasing my decodetree series:
> >
> > (1) in disas_ldst_reg_imm9(), we calculate a memop, but then
> > when we call gen_mte_che
On 6/9/23 03:47, Peter Maydell wrote:
I noticed a couple of finalize_memop related oddities while I
was rebasing my decodetree series:
(1) in disas_ldst_reg_imm9(), we calculate a memop, but then
when we call gen_mte_check1_mmuidx() we don't pass the memop
as that function's memop argument, we j
This is tagged, pull request will be delayed due to kvm forum though.
On Fri, Jun 09, 2023 at 04:32:40PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> ping.
>
> On 22.05.23 23:17, Vladimir Sementsov-Ogievskiy wrote:
> > v4:
> > preparation patches are already merged to master
> > 01: fix false-pos
The LDG instruction loads the tag from a memory address (identified
by [Xn + offset]), and then merges that tag into the destination
register Xt. We implemented this correctly for the case when
allocation tags are enabled, but didn't get it right when ATA=0:
instead of merging the tag bits into Xt,
On Fri, 9 Jun 2023 at 15:32, Wu, Fei wrote:
>
> On 6/8/2023 5:23 PM, Peter Maydell wrote:
> > On Thu, 8 Jun 2023 at 08:44, Wu, Fei wrote:
> >> Is there any existing function to convert ram_addr_t to guest pa?
> >
> > Such a function would not be well-defined, because a block of RAM
> > as specifi
From: Niklas Cassel
Hello John,
Here comes some misc AHCI cleanups.
Most are related to error handling.
Please review.
Changes since v2:
-Squashed in the test commits that were sent out as a separate series into
the patch "hw/ide/ahci: PxCI should not get cleared when ERR_STAT is set",
and
On Wed, May 24, 2023 at 01:19:00PM +0200, Klaus Jensen wrote:
> From: Klaus Jensen
>
> A set of fixes and small quality-of-life improvements for the TP4146
> ("Flexible Data Placement") support.
>
> Klaus Jensen (4):
> hw/nvme: fix verification of number of ruhis
> hw/nvme: verify uniqueness
As recent CVE-2023-2861 once again showed, the 9p 'proxy' fs driver is in
bad shape. Using the 'proxy' backend was already discouraged for safety
reasons before and we recommended to use the 'local' backend instead,
but now it is time to officially deprecate the 'proxy' backend.
Signed-off-by: Chr
On Thu, 8 Jun 2023 23:38:34 +
Shesha Bhushan Sreenivasamurthy wrote:
> Hi,
>
> Thinking a bit more, LD in CXL are PCIe endpoint functions. Therefore 1-1
> mapping of cxl-i2c device per PCIe device is sufficient, and we use function
> number in BDF as the LD-ID. Does it makes sense ?
LDs a
From: Niklas Cassel
Currently, the first time sending an unsupported command
(e.g. READ LOG DMA EXT) will not have ERR_STAT set in the completion.
Sending the unsupported command again, will correctly have ERR_STAT set.
When ide_cmd_permitted() returns false, it calls ide_abort_command().
ide_ab
On Fri, Jun 9, 2023 at 12:39 AM Si-Wei Liu wrote:
>
>
> On 6/7/23 01:08, Eugenio Perez Martin wrote:
> > On Wed, Jun 7, 2023 at 12:43 AM Si-Wei Liu wrote:
> >> Sorry for reviving this old thread, I lost the best timing to follow up
> >> on this while I was on vacation. I have been working on this
From: Niklas Cassel
The AHCI spec states that:
For NCQ, PxCI is cleared on command queued successfully.
For non-NCQ, PxCI is cleared on command completed successfully.
(A non-NCQ command that completes with error does not clear PxCI.)
The current QEMU implementation either clears PxCI in check_
From: Niklas Cassel
When there is an error, we need to raise a TFES error irq, see AHCI 1.3.1,
5.3.13.1 SDB:Entry.
If ERR_STAT is set, we jump to state ERR:FatalTaskfile, which will raise
a TFES IRQ unconditionally, regardless if the I bit is set in the FIS or
not.
Thus, we should never raise a
On Fri, Jun 09, 2023 at 03:31:46AM +, Duan, Zhenzhong wrote:
>
>
> >-Original Message-
> >From: Peter Xu
> >Sent: Thursday, June 8, 2023 9:48 PM
> >To: Duan, Zhenzhong
> >Cc: qemu-devel@nongnu.org; m...@redhat.com; jasow...@redhat.com;
> >pbonz...@redhat.com; richard.hender...@linar
On 8/6/23 15:43, Paolo Bonzini wrote:
In commit b0fcc6fc7fc1 ("build: rebuild build.ninja using
"meson setup --reconfigure"", 2023-05-19) I changed the build.ninja
rule in the Makefile to use "meson setup" so that the Makefile would
pick up a changed path to the meson binary.
However, there was
Add new virtio transport feature to transport feature map:
- VIRTIO_F_RING_RESET
Add new vhost-user protocol feature to vhost-user protocol feature map
and enumeration:
- VHOST_USER_PROTOCOL_F_STATUS
Add new virtio device features for several virtio devices to their
respective feature mappings:
On 9/6/23 12:46, Philippe Mathieu-Daudé wrote:
Hi,
This series tries to do what Richard suggested in [*]:
Targets that have a tcg/ subdir should have helper.h.inc
moved into there. At the end, include/exec/helper-gen.h
and include/exec/helper-proto.h become unused and go away.
but on
1 - 100 of 171 matches
Mail list logo
