On 6/1/2023 9:08 AM, Richard Henderson wrote:
> On 5/30/23 01:35, Fei Wu wrote:
>> +static void collect_jit_profile_info(void *p, uint32_t hash, void
>> *userp)
>> +{
>> + struct jit_profile_info *jpi = userp;
>> + TBStatistics *tbs = p;
>> +
>> + jpi->translations += tbs->translations.tot
Richard Henderson wrote:
> On 5/31/23 14:03, Juan Quintela wrote:
>> Richard Henderson wrote:
>>> On 5/30/23 11:25, Juan Quintela wrote:
The following changes since commit
aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qe
Commit 63b88968f1 ("intel-iommu: rework the page walk logic") adds IOVA
tree to cache mapped ranges so we only need to send MAP or UNMAP when
there are changes. But there is still a corner case of unnecessary UNMAP.
During invalidation, either domain or device selective, we only need to
unmap when
Hi All,
This is an extention to original patch [1] based on discuss in [2].
1. Fixed a potential VFIO migration issue Peter found, and optimize
VFIO dirty page sync in intel_iommu incidentally.
2. Clarify the definition of replay() to match existent optimization
in intel_iommu.
3. Optimiz
This function is a variant of iova_tree_foreach and support tranversing
a range to trigger callback with a private data.
Signed-off-by: Zhenzhong Duan
---
include/qemu/iova-tree.h | 17 +++--
util/iova-tree.c | 31 +++
2 files changed, 46 insertion
Currently replay() callback is declared to be exactly same semantics
as memory_region_iommu_replay().
Customed replay() may provide some extent of optimization depending on
notifier's type. E.g. intel_iommu, IOMMU_NOTIFIER_MAP is optimized to
provide only changed entries.
Clarify the semantics of
Peter Xu found a potential issue:
"The other thing is when I am looking at the new code I found that we
actually extended the replay() to be used also in dirty tracking of vfio,
in vfio_sync_dirty_bitmap(). For that maybe it's already broken if
unmap_all() because afaiu log_sync() can be called i
On 2023/6/1 13:27, Alistair Francis wrote:
On Mon, May 29, 2023 at 10:19 PM Weiwei Li wrote:
Normally, MPRV can be set to 1 only in M mode (It will be cleared
when returning to lower-privilege mode by MRET/SRET).
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_
Please review the change.
- sbsa-ref: Add an XHCI on PCIe bus to provide an availiable
usb controller.
Yuquan Wang (1):
hw/arm/sbsa-ref: add XHCI controller on PCIe
hw/arm/sbsa-ref.c | 2 ++
1 file changed, 2 insertions(+)
--
2.34.1
The current sbsa-ref cannot use EHCI controller which is only
able to do 32-bit DMA, since sbsa-ref doesn't have RAM below 4GB.
Hence, this add an XHCI on PCIe to provide a usb controller with 64-bit
DMA capablity.
Signed-off-by: Yuquan Wang
---
hw/arm/sbsa-ref.c | 2 ++
1 file changed, 2 insert
Philippe Mathieu-Daudé writes:
> Audit the sysbus_init_irq() calls and manually convert
> to sysbus_init_irqs() when a loop is involved.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/intc/loongarch_extioi.c | 3 +--
> hw/intc/omap_intc.c| 3 +--
> hw/pci-host/gpex.c | 2 +
On 6/1/2023 8:05 AM, Richard Henderson wrote:
> On 5/30/23 01:35, Fei Wu wrote:
>> From: "Vanderson M. do Rosario"
>>
>> If a TB has a TBS (TBStatistics) with the TB_EXEC_STATS
>> enabled, then we instrument the start code of this TB
>> to atomically count the number of times it is executed.
>> We
On 6/1/2023 12:16 PM, Richard Henderson wrote:
> On 5/31/23 20:19, Wu, Fei wrote:
>> On 6/1/2023 8:01 AM, Richard Henderson wrote:
>>> On 5/30/23 01:35, Fei Wu wrote:
+/* TBStatistic collection controls */
+enum TBStatsStatus {
+ TB_STATS_DISABLED = 0,
+ TB_STATS_RUNNING,
On Thu, Jun 1, 2023 at 3:01 PM Sunil V L wrote:
>
> Currently, pflash devices can be configured only via -pflash
> or -drive options. This is the legacy way and the
> better way is to use -blockdev as in other architectures.
> libvirt also has moved to use -blockdev method.
>
> To support -blockde
On Thu, Jun 1, 2023 at 3:01 PM Sunil V L wrote:
>
> pflash devices can be used in virt machine for different
> purposes like for ROM code or S-mode FW payload. Add a
> section in the documentation on how to use pflash devices
> for different purposes.
>
> Signed-off-by: Sunil V L
> Reviewed-by: P
On Mon, May 29, 2023 at 10:18 PM Weiwei Li wrote:
>
> SXL is initialized as env->misa_mxl which is also the mxl value.
> So we can just remain it unchanged to keep it read-only.
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
> ---
> target
On Mon, May 29, 2023 at 10:18 PM Weiwei Li wrote:
>
> MPV and GVA bits are added by hypervisor extension to mstatus
> and mstatush (if MXLEN=32).
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/csr.c | 10 --
>
On Mon, May 29, 2023 at 10:19 PM Weiwei Li wrote:
>
> Normally, MPRV can be set to 1 only in M mode (It will be cleared
> when returning to lower-privilege mode by MRET/SRET).
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> ---
> target/riscv/cpu_helper.c | 2 +-
> 1 file changed,
On Mon, May 29, 2023 at 10:19 PM Weiwei Li wrote:
>
> Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
> when MPP=PRV_M.
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu_helper.c | 3 ++-
> targ
On Fri, May 26, 2023 at 5:24 PM Weiwei Li wrote:
>
> This patchset tries to add support for PC-relative translation.
>
> The existence of CF_PCREL can improve performance with the guest
> kernel's address space randomization. Each guest process maps libc.so
> (et al) at a different virtual addres
Currently, virt machine supports two pflash instances each with
32MB size. However, the first pflash is always assumed to
contain M-mode firmware and reset vector is set to this if
enabled. Hence, for S-mode payloads like EDK2, only one pflash
instance is available for use. This means both code and
pflash devices can be used in virt machine for different
purposes like for ROM code or S-mode FW payload. Add a
section in the documentation on how to use pflash devices
for different purposes.
Signed-off-by: Sunil V L
Reviewed-by: Philippe Mathieu-Daudé
---
docs/system/riscv/virt.rst | 31
This series improves the pflash usage in RISC-V virt machine with solutions to
below issues.
1) Currently the first pflash is reserved for ROM/M-mode firmware code. But
S-mode
payload firmware like EDK2 need both pflash devices to have separate code and
variable
store so that OS distros can keep
Currently, pflash devices can be configured only via -pflash
or -drive options. This is the legacy way and the
better way is to use -blockdev as in other architectures.
libvirt also has moved to use -blockdev method.
To support -blockdev option, pflash devices need to be
created in instance_init i
Dne 31. 05. 23 v 19:14 Stefan Hajnoczi napsal(a):
> On Wed, 31 May 2023 at 12:50, Lukáš Doktor wrote:
>>
>> Dne 26. 05. 23 v 12:56 Stefan Hajnoczi napsal(a):
>>> On Fri, 26 May 2023 at 04:07, Lukáš Doktor wrote:
Dne 25. 05. 23 v 17:21 Stefan Hajnoczi napsal(a):
> On Thu, 25 May 2023
On 5/31/23 20:19, Wu, Fei wrote:
On 6/1/2023 8:01 AM, Richard Henderson wrote:
On 5/30/23 01:35, Fei Wu wrote:
+/* TBStatistic collection controls */
+enum TBStatsStatus {
+ TB_STATS_DISABLED = 0,
+ TB_STATS_RUNNING,
+ TB_STATS_PAUSED,
+ TB_STATS_STOPPED
+};
I don't see what PAUSE
On 5/31/23 18:51, Thomas Huth wrote:
On 01/06/2023 01.25, Richard Henderson wrote:
Using "-o /dev/null" fails on Windows. Rather that working
around this in meson, add a separate command-line option so
that we can use python's os.devnull.
Reported-by: Thomas Huth
Fixes: 65dc7d1b ("tests/d
On 5/31/23 10:08, Richard Henderson wrote:
On 5/31/23 09:47, Ard Biesheuvel wrote:
On Wed, 31 May 2023 at 18:33, Richard Henderson
Thanks. I spent some time yesterday looking at this, with an encrypted disk
test case and
could only measure 0.6% and 0.5% for total overhead of decrypt and encry
On 5/31/2023 11:45 AM, Xiaoyao Li wrote:
On 5/31/2023 9:32 AM, Binbin Wu wrote:
From: Robert Hoo
Linear Address Masking (LAM) is a new Intel CPU feature, which allows
software
to use of the untranslated address bits for metadata.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[26]
Add CPUID
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
In preparation for such a change, add MemReentrancyGuard * as a
parameter of qemu_new_nic().
Signed-off-by: Akihik
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
This implementation follows what bottom half does, but it does not add
a tracepoint for the case that the network d
On 6/1/2023 8:01 AM, Richard Henderson wrote:
> On 5/30/23 01:35, Fei Wu wrote:
>> +/* TBStatistic collection controls */
>> +enum TBStatsStatus {
>> + TB_STATS_DISABLED = 0,
>> + TB_STATS_RUNNING,
>> + TB_STATS_PAUSED,
>> + TB_STATS_STOPPED
>> +};
>
> I don't see what PAUSED or STOPPE
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
This implementation follows what bottom half does, but it does not add
a tracepoint for the case that the network d
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
Audit the sysbus_init_irq() calls and manually convert
to sysbus_init_irqs() when a loop is involved.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/loongarch_extioi.c | 3 +--
hw/intc/omap_intc.c| 3 +--
hw/pci-host/gpex.c |
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
Change created mechanically using the following coccinelle
semantic patch:
@@
expression array;
identifier i;
expression sbd, count;
@@
-for (i = 0; i < count; i++) {
-sysbus_init_irq(sbd, &array[i]);
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
Since we don't have any use of the SYSBUS_DEVICE_GPIO_IRQ definition
outside of sysbus.c, we can reduce its scope, making it internal to
the API.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sysbus.h | 2 --
hw/core/sysbus.c| 2 ++
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Use the recently introduced sysbus_init_irqs()
method to avoid using this internal definition.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/hcd-xhci-sysbus.c | 5 ++--
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
+void sysbus_init_irqs(SysBusDevice *dev, qemu_irq *p, unsigned count);
unsigned count does not match qdev_init_gpio_out_named int n.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Here we simply open-coded sysbus_pass_irq().
Replace to use the proper API.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/xlnx-usb-subsystem.c | 2 +-
1 file changed,
On 5/31/23 15:33, Philippe Mathieu-Daudé wrote:
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Here we simply open-coded sysbus_connect_irq().
Replace to use the proper API.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/xlnx-versal.c | 4 +---
1 file changed, 1
在 2023/6/1 10:26, Zhao Liu 写道:
On Thu, Jun 01, 2023 at 09:09:13AM +0800, bibo, mao wrote:
Date: Thu, 1 Jun 2023 09:09:13 +0800
From: "bibo, mao"
Subject: Re: [PATCH] hw/smbios: fix thead count field in type 4 table
在 2023/5/31 16:42, Zhao Liu 写道:
On Tue, May 30, 2023 at 08:20:34PM +0800,
On Wed, May 31, 2023 at 9:46 PM Jon Kohler wrote:
>
>
>
> > On May 31, 2023, at 1:27 AM, Jason Wang wrote:
> >
> > On Wed, May 31, 2023 at 11:55 AM Jason Wang wrote:
> >>
> >> On Wed, May 31, 2023 at 11:47 AM Jon Kohler wrote:
> >>>
> >>>
> >>>
> On May 30, 2023, at 11:35 PM, Jason Wang w
On 5/31/23 18:30, Wu, Fei wrote:
On 6/1/2023 7:59 AM, Richard Henderson wrote:
On 5/30/23 01:35, Fei Wu wrote:
+ /*
+ * We want to fetch the stats structure before we start code
+ * generation so we can count interesting things about this
+ * generation.
+ */
+ if (tb_stat
On 5/30/23 01:35, Fei Wu wrote:
+static void do_dump_tbs_info(int total, int sort_by)
+{
+id = 1;
+GList *i;
+int count = total;
+
+g_list_free(last_search);
+last_search = NULL;
+
+qht_iter(&tb_ctx.tb_stats, collect_tb_stats, NULL);
+
+last_search = g_list_sort_with_d
Hi Leif,
> On Jun 1, 2023, at 00:36, Leif Lindholm wrote:
>
> On 2023-05-31 16:27, Peter Maydell wrote:
>> On Wed, 31 May 2023 at 15:58, Graeme Gregory wrote:
The current sbsa-ref cannot use EHCI controller which is only
able to do 32-bit DMA, since sbsa-ref doesn't have RAM above 4GB
On Thu, Jun 01, 2023 at 09:09:13AM +0800, bibo, mao wrote:
> Date: Thu, 1 Jun 2023 09:09:13 +0800
> From: "bibo, mao"
> Subject: Re: [PATCH] hw/smbios: fix thead count field in type 4 table
>
>
>
> 在 2023/5/31 16:42, Zhao Liu 写道:
> > On Tue, May 30, 2023 at 08:20:34PM +0800, Tianrui Zhao wrote:
On Wed, May 31, 2023 at 05:46:48PM +0200, Igor Mammedov wrote:
> Date: Wed, 31 May 2023 17:46:48 +0200
> From: Igor Mammedov
> Subject: Re: [PATCH 3/3] hw/smbios: Fix core count in type4
> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; x86_64-redhat-linux-gnu)
>
> On Tue, 30 May 2023 00:43:43 +0800
> Z
On 01/06/2023 01.25, Richard Henderson wrote:
Using "-o /dev/null" fails on Windows. Rather that working
around this in meson, add a separate command-line option so
that we can use python's os.devnull.
Reported-by: Thomas Huth
Fixes: 65dc7d1b ("tests/decode: Convert tests to meson")
Signed
On 2023/6/1 1:47, Richard Henderson wrote:
On 5/30/23 23:54, LIU Zhiwei wrote:
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei
They look ok, so far as it goes. What will they be used for?
T-Head Xuantie CPUs custom extension need these interfaces
On 6/1/2023 7:59 AM, Richard Henderson wrote:
> On 5/30/23 01:35, Fei Wu wrote:
>> + /*
>> + * We want to fetch the stats structure before we start code
>> + * generation so we can count interesting things about this
>> + * generation.
>> + */
>> + if (tb_stats_collection_enab
On 5/30/23 01:35, Fei Wu wrote:
diff --git a/accel/tcg/tb-stats.c b/accel/tcg/tb-stats.c
index 805e1fc74d..139f049ffc 100644
--- a/accel/tcg/tb-stats.c
+++ b/accel/tcg/tb-stats.c
@@ -267,6 +267,25 @@ void do_hmp_tbstats_safe(CPUState *cpu, run_on_cpu_data
icmd)
g_free(cmdinfo);
}
+/*
On 5/30/23 01:35, Fei Wu wrote:
From: "Vanderson M. do Rosario"
Adding tb_stats [start|pause|stop|filter] command to hmp.
This allows controlling the collection of statistics.
It is also possible to set the level of collection:
all, jit, or exec.
tb_stats filter allow to only collect statistic
On 5/30/23 01:35, Fei Wu wrote:
From: "Vanderson M. do Rosario"
-d tb_stats[[,level=(+all+jit+exec+time)][,dump_limit=]]
"dump_limit" is used to limit the number of dumped TBStats in
linux-user mode.
Why is user-mode special?
[all+jit+exec+time] control the profilling level used
by the
在 2023/5/31 16:42, Zhao Liu 写道:
On Tue, May 30, 2023 at 08:20:34PM +0800, Tianrui Zhao wrote:
Date: Tue, 30 May 2023 20:20:34 +0800
From: Tianrui Zhao
Subject: [PATCH] hw/smbios: fix thead count field in type 4 table
X-Mailer: git-send-email 2.39.1
The thread_count value in smbios type_4 ta
On 5/30/23 01:35, Fei Wu wrote:
+static void collect_jit_profile_info(void *p, uint32_t hash, void *userp)
+{
+struct jit_profile_info *jpi = userp;
+TBStatistics *tbs = p;
+
+jpi->translations += tbs->translations.total;
+jpi->ops += tbs->code.num_tcg_ops;
+if (stat_per_trans
Hi Philippe,
>Hi Jeuk,
>
>[+Alistair]
>
>On 26/5/23 07:05, Jeuk Kim wrote:
>> Universal Flash Storage (UFS) is a high-performance mass storage device
>> with a serial interface. It is primarily used as a high-performance
>> data storage device for embedded applications.
>>
>> This commit contains
On 5/30/23 01:35, Fei Wu wrote:
From: "Vanderson M. do Rosario"
If a TB has a TBS (TBStatistics) with the TB_EXEC_STATS
enabled, then we instrument the start code of this TB
to atomically count the number of times it is executed.
We count both the number of "normal" executions and atomic
execut
On 5/30/23 01:35, Fei Wu wrote:
+/* TBStatistic collection controls */
+enum TBStatsStatus {
+TB_STATS_DISABLED = 0,
+TB_STATS_RUNNING,
+TB_STATS_PAUSED,
+TB_STATS_STOPPED
+};
I don't see what PAUSED or STOPPED actually do.
As far as I can see, stats are either being collected o
On 5/30/23 01:35, Fei Wu wrote:
+/*
+ * We want to fetch the stats structure before we start code
+ * generation so we can count interesting things about this
+ * generation.
+ */
+if (tb_stats_collection_enabled()) {
+tb->tb_stats = tb_get_stats(phys_pc, pc, cs_ba
Using "-o /dev/null" fails on Windows. Rather that working
around this in meson, add a separate command-line option so
that we can use python's os.devnull.
Reported-by: Thomas Huth
Fixes: 65dc7d1b ("tests/decode: Convert tests to meson")
Signed-off-by: Richard Henderson
---
scripts/decodet
On 5/31/23 13:43, John Snow wrote:
The following changes since commit ab7252279727da51c01cdaf41c5fe563bbded3a6:
gitlab: switch from 'stable' to 'latest' docker container tags (2023-05-31
10:29:14 -0700)
are available in the Git repository at:
https://gitlab.com/jsnow/qemu.git tags/pyth
Since KVM_MAX_VCPUS is currently defined to 1024 for x86 as shown in
arch/x86/include/asm/kvm_host.h, update QEMU limits to the same number.
In case KVM could not support the specified number of vcpus, QEMU would
return the following error message:
qemu-system-x86_64: kvm_init_vcpu: kvm_get_vcp
The SysBus API currently only provides a method to initialize
a single IRQ: sysbus_init_irq(). When we want to initialize
multiple SysBus IRQs, we have to call this function multiple
times. In order to allow further simplifications, introduce
the sysbus_init_irqs() method.
Signed-off-by: Philippe
Since we don't have any use of the SYSBUS_DEVICE_GPIO_IRQ definition
outside of sysbus.c, we can reduce its scope, making it internal to
the API.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sysbus.h | 2 --
hw/core/sysbus.c| 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
di
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Use the recently introduced sysbus_init_irqs()
method to avoid using this internal definition.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/hcd-xhci-sysbus.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Change created mechanically using the following coccinelle
semantic patch:
@@
expression array;
identifier i;
expression sbd, count;
@@
-for (i = 0; i < count; i++) {
-sysbus_init_irq(sbd, &array[i]);
-}
+sysbus_init_irqs(sbd, array, count);
Audit the sysbus_init_irq() calls and manually convert
to sysbus_init_irqs() when a loop is involved.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/loongarch_extioi.c | 3 +--
hw/intc/omap_intc.c| 3 +--
hw/pci-host/gpex.c | 2 +-
hw/timer/renesas_tmr.c | 9 +++--
4 f
This series:
- Remove uses (out of sysbus.c) to the SYSBUS_DEVICE_GPIO_IRQ
definition, using proper SysBus API methods,
- Reduce SYSBUS_DEVICE_GPIO_IRQ scope, making it SysBus API
internal,
- Convert various for() loops iterating over sysbus_init_irq()
by calling a single sysbus_init_irqs()
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Here we simply open-coded sysbus_connect_irq().
Replace to use the proper API.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/xlnx-versal.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/arm/
The SYSBUS_DEVICE_GPIO_IRQ definition should be internal to
the SysBus API. Here we simply open-coded sysbus_pass_irq().
Replace to use the proper API.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/xlnx-usb-subsystem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb
On 27/5/23 01:15, Alex Williamson wrote:
This RFC proposes to allow a vfio-pci device to manipulate the PCI
Express capability of an associated root port to enable Atomic Op
completer support as equivalent to host capabilities. This would
[...]
While it's not exactly standard practice to modi
On 1/6/23 00:24, Alex Williamson wrote:
On Wed, 31 May 2023 23:55:41 +0200
Robin Voetter wrote:
Hi Alex,
Thanks for taking the time to implement support for Atomic Op completer
support properly :). I have tested out these patches and the kernel
patch, and apart from a minor issue with patch 2
On 27/5/23 01:15, Alex Williamson wrote:
Dynamically enable Atomic Ops completer support around realize/exit of
vfio-pci devices reporting host support for these accesses and adhering
to a minimal configuration standard. While the Atomic Ops completer
bits in the root port device capabilities2 r
On Wed, 31 May 2023 23:55:41 +0200
Robin Voetter wrote:
> Hi Alex,
>
> Thanks for taking the time to implement support for Atomic Op completer
> support properly :). I have tested out these patches and the kernel
> patch, and apart from a minor issue with patch 2 everything works fine;
Yes, Ced
On 5/31/23 11:07, Richard Henderson wrote:
On 5/31/23 09:12, Thomas Huth wrote:
On 31/05/2023 03.08, Richard Henderson wrote:
On 5/30/23 11:59, Richard Henderson wrote:
The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0:
Merge tag 'pull-target-arm-20230530-1'
ofht
On 1/6/23 00:02, Robin Voetter wrote:
On 5/27/23 01:15, Alex Williamson wrote:
Report the PCIe capability version for a device
Signed-off-by: Alex Williamson
Reviewed-by: Robin Voetter
Tested-by: Robin Voetter
Reviewed-by: Philippe Mathieu-Daudé
Kind regards,
Robin Voetter
On 5/27/23 01:15, Alex Williamson wrote:
> Dynamically enable Atomic Ops completer support around realize/exit of
> vfio-pci devices reporting host support for these accesses and adhering
> to a minimal configuration standard. While the Atomic Ops completer
> bits in the root port device capabi
On 5/27/23 01:15, Alex Williamson wrote:
> Report the PCIe capability version for a device
>
> Signed-off-by: Alex Williamson Reviewed-by: Robin
> Voetter
Tested-by: Robin Voetter
Kind regards,
Robin Voetter
Hi Alex,
Thanks for taking the time to implement support for Atomic Op completer
support properly :). I have tested out these patches and the kernel
patch, and apart from a minor issue with patch 2 everything works fine;
ROCm programs that use device->host atomic operations work properly.
Somethi
On 5/31/23 12:48, Stefan Hajnoczi wrote:
--- a/bsd-user/freebsd/os-syscall.c
+++ b/bsd-user/freebsd/os-syscall.c
@@ -531,7 +531,6 @@ abi_long do_freebsd_syscall(void *cpu_env, int num,
abi_long arg1,
CPUState *cpu = env_cpu(cpu_env);
abi_long ret;
-trace_guest_user_syscall(cpu
On 5/31/23 14:03, Juan Quintela wrote:
Richard Henderson wrote:
On 5/30/23 11:25, Juan Quintela wrote:
The following changes since commit aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qemu
into staging (2023-05-29 14:31:52 -0700)
are
On 31/5/23 23:10, Bernhard Beschow wrote:
Now that via_isa_set_irq() is unused it can be removed.
Signed-off-by: Bernhard Beschow
Reviewed-by: Mark Cave-Ayland
---
include/hw/isa/vt82c686.h | 2 --
hw/isa/vt82c686.c | 6 --
2 files changed, 8 deletions(-)
Reviewed-by: Philipp
On 31/5/23 23:10, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
---
hw/ide/pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 31/5/23 23:10, Bernhard Beschow wrote:
Every TYPE_PCI_IDE device performs the same not-so-trivial bit manipulation by
copy'n'paste code. Extract this into bmdma_status_writeb(), mirroring
bmdma_cmd_writeb().
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
include/hw/ide/pc
Exposing the legacy IDE interrupts as GPIOs allows them to be connected in the
parent device through qdev_connect_gpio_out(), i.e. without accessing private
data of TYPE_PCI_IDE.
Signed-off-by: Bernhard Beschow
Reviewed-by: Mark Cave-Ayland
---
hw/ide/pci.c | 9 +
1 file changed, 9 inse
Every invocation of bmdma_init() is followed by `d->bmdma[i].bus = &d->bus[i]`.
Resolve this redundancy by extracting it into bmdma_init().
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark Cave-Ayland
---
hw/ide/cmd646.c | 1 -
Now that via_isa_set_irq() is unused it can be removed.
Signed-off-by: Bernhard Beschow
Reviewed-by: Mark Cave-Ayland
---
include/hw/isa/vt82c686.h | 2 --
hw/isa/vt82c686.c | 6 --
2 files changed, 8 deletions(-)
diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h
i
This series is split off from a more general PCI IDE refactoring aiming for a
common implementation of the PCI IDE controller specification for all
TYPE_PCI_IDE models [1].
The first three patches resolve a circular dependency between the VIA IDE
controller and its south bridge. The next three pat
Signed-off-by: Bernhard Beschow
---
hw/ide/pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index 0b26a4ce9f..a25b352537 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -320,7 +320,8 @@ void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)
v
Resolves circular depencency between IDE function and south bridge.
Signed-off-by: Bernhard Beschow
Reviewed-by: Mark Cave-Ayland
---
hw/ide/via.c | 6 --
hw/isa/vt82c686.c | 5 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 177ba
Every TYPE_PCI_IDE device performs the same not-so-trivial bit manipulation by
copy'n'paste code. Extract this into bmdma_status_writeb(), mirroring
bmdma_cmd_writeb().
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
include/hw/ide/pci.h | 1 +
hw/ide/cmd646.c | 2 +-
hw/id
The modern, declarative way to set up VM state handling is to assign to
DeviceClass::vmsd attribute.
There shouldn't be any change in behavior since dc->vmsd causes
vmstate_register_with_alias_id() to be called on the instance during
the instance init phase. vmstate_register() was also called duri
Richard Henderson wrote:
> On 5/30/23 11:25, Juan Quintela wrote:
>> The following changes since commit aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
>>Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qemu
>> into staging (2023-05-29 14:31:52 -0700)
>> are available in the Git reposito
On Wed, May 31, 2023 at 10:39:48PM +0200, Philippe Mathieu-Daudé wrote:
> Hi Michael,
>
> On 24/5/23 11:37, Philippe Mathieu-Daudé wrote:
> > All patches reviewed.
>
> Could you take this series via your virtio tree?
>
> Thanks!
>
> Phil.
Will do, in next pull. Thanks!
> > Less controvertial
Le 31/05/2023 à 14:53, Mark Cave-Ayland a écrit :
Instead use the qdev_get_child_bus() function which is intended for this exact
purpose.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
ind
Instead of using accept() with sockets (which uses open_with_socket()),
use calls to connect() to utilize existing sockets instead. A benefit of
this is more robust error handling already present within the connect()
call that isn't present in open_with_socket().
Signed-off-by: John Snow
Message-
This reverts commit a3cfea92e2030926e00a2519d299384ea648e36e.
(It's being rolled back in favor of a different API, which brings the
in-tree and out-of-tree versions of qemu.qmp back in sync.)
Signed-off-by: John Snow
Message-id: 20230517163406.2593480-6-js...@redhat.com
Signed-off-by: John Snow
Favor using connect() when passing a socket instead of
open_with_socket(). Simultaneously, update constructor calls to use the
combined address argument for QEMUMonitorProtocol().
Signed-off-by: John Snow
Message-id: 20230517163406.2593480-5-js...@redhat.com
Signed-off-by: John Snow
---
python/
Allow existing sockets to be passed to connect(). The changes are pretty
minimal, and this allows for far greater flexibility in setting up
communications with an endpoint.
Signed-off-by: John Snow
Message-id: 20230517163406.2593480-2-js...@redhat.com
Signed-off-by: John Snow
---
python/qemu/qm
Instead of asserting that we have an address, allow the use of sockets
instead of addresses during a call to connect().
Signed-off-by: John Snow
Message-id: 20230517163406.2593480-3-js...@redhat.com
Signed-off-by: John Snow
---
python/qemu/qmp/legacy.py | 5 +++--
1 file changed, 3 insertions(+
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