On 11/05/2023 20:22, Philippe Mathieu-Daudé wrote:
On 19/4/23 17:16, Mark Cave-Ayland wrote:
Currently when portio_list MemoryRegions are freed using portio_list_destroy()
the RCU
thread segfaults generating a backtrace similar to that below:
#0 0x599a34b6 in phys_section_destroy ../
Add a new test in tests/avocado to check LoongArch virt machine start.
Reviewed-by: Thomas Huth
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
tests/avocado/machine_loongarch.py | 68 ++
2 files changed, 69 insertions(+)
create mode 100644 te
在 2023/5/12 上午11:45, Philippe Mathieu-Daudé 写道:
On 12/5/23 05:01, Song Gao wrote:
Hi, Philippe
在 2023/5/12 上午3:03, Philippe Mathieu-Daudé 写道:
On 6/4/23 12:00, Song Gao wrote:
When ipi mailbox is used, cpu index is decoded from iocsr register.
cpu maybe does not exist. This patch adss NULL
On Thu, May 11, 2023 at 09:44:51PM +, Bernhard Beschow wrote:
>
>
> Am 11. Mai 2023 08:57:16 UTC schrieb Mark Cave-Ayland
> :
> >Change pci_set_irq() to call qemu_set_irq() on the PCI device IRQ rather than
> >calling PCI bus IRQ handler function directly. In order to preserve the
> >existin
Hi Alex,
On 25/10/22 17:20, Cédric Le Goater wrote:
From: Alex Bennée
Investigating why some BMC models are so slow compared to a plain ARM
virt machines I did some profiling of:
./qemu-system-arm -M romulus-bmc -nic user \
-drive
file=obmc-phosphor-image-romulus.static.mtd,forma
Hi Cédric,
On 25/10/22 17:20, Cédric Le Goater wrote:
Store a reference on the AspeedSMC class under the flash object and
use it when accessing the flash contents. Avoiding the class cast
checkers in these hot paths improves performance by 10% when running
the aspeed avocado tests.
I doubt you
On 12/5/23 05:01, Song Gao wrote:
Hi, Philippe
在 2023/5/12 上午3:03, Philippe Mathieu-Daudé 写道:
On 6/4/23 12:00, Song Gao wrote:
When ipi mailbox is used, cpu index is decoded from iocsr register.
cpu maybe does not exist. This patch adss NULL pointer check on
ipi device.
How can that happens
On 12/5/23 04:10, Eric Blake wrote:
All the other qemu_strto* and parse_uint allow a NULL str. Having
qemu_strtosz crash on qemu_strtosz(NULL, NULL, &value) is an easy fix
that adds some consistency between our string parsers.
Signed-off-by: Eric Blake
---
tests/unit/test-cutils.c | 3 +++
On 12/5/23 04:10, Eric Blake wrote:
glib documentation[1] is clear: g_assert() should be avoided in unit
tests because it is ineffective if G_DISABLE_ASSERT is defined; unit
tests should stick to constructs based on g_assert_true() instead.
Note that since commit 262a69f428, we intentionally stat
Hi, Philippe
在 2023/5/12 上午3:03, Philippe Mathieu-Daudé 写道:
On 6/4/23 12:00, Song Gao wrote:
When ipi mailbox is used, cpu index is decoded from iocsr register.
cpu maybe does not exist. This patch adss NULL pointer check on
ipi device.
How can that happens from a guest vcpu context?
cpuid
As shown in the previous commit, qemu_strtosz_MiB sometimes leaves the
result value untouched (we have to audit further to learn that in that
case, the QAPI generator says that visit_type_NumaOptions() will have
zero-initialized it), and sometimes leaves it with the value of a
partial parse before
Rather than open-coding two different ways to check for an unwanted
negative sign, reuse the same code in both functions. That way, if we
decide down the road to accept "-0" instead of rejecting it, we have
fewer places to change. Also, it means we now get ERANGE instead of
EINVAL for negative va
All the other qemu_strto* and parse_uint allow a NULL str. Having
qemu_strtosz crash on qemu_strtosz(NULL, NULL, &value) is an easy fix
that adds some consistency between our string parsers.
Signed-off-by: Eric Blake
---
tests/unit/test-cutils.c | 3 +++
util/cutils.c| 2 +-
2 files
It's already confusing that we have two very similar functions for
wrapping the parse of a 64-bit unsigned value, differing mainly on
whether they permit leading '-'. Adjust the signature of parse_uint()
and parse_uint_full() to be like all of qemu_strto*(): put the result
parameter last, use the
It's hard to tweak code for consistency if I can't prove what will or
won't break from those tweaks. Time to add unit tests for
qemu_strtod() and qemu_strtod_finite().
Among other things, I wrote a check whether we have C99 semantics for
strtod("0x1") (which MUST parse hex numbers) rather than C8
Making callers determine whether or not *value was populated on error
is not nice for usability. Pre-patch, we have unit tests that check
that *result is left unchanged on most EINVAL errors and set to 0 on
many ERANGE errors. This is subtly different from libc strtoumax()
behavior which returns
We have quite a few undertested and underdocumented integer parsing
corner cases. To ensure that any changes we make in the code are
intentional rather than accidental semantic changes, it is time to add
more unit tests of existing behavior.
In particular, this demonstrates that parse_uint() and
All the qemu_strto*() functions permit a NULL endptr, just like their
libc counterparts, leaving parse_uint() as the oddball that caused
SEGFAULT on NULL and required the user to call parse_uint_full()
instead. Relax things for consistency, even though the testsuite is
the only impacted caller. A
Our goal in writing qemu_strtoi() and friends is to have an interface
harder to abuse than libc's strtol(). Leaving the return value
uninitialized on some but not all error paths does not lend itself
well to this goal; and our documentation wasn't helpful on what to
expect.
Note that the previous
Previous patches changed all integral qemu_strto*() error paths to
guarantee that *value is never left uninitialized. Do likewise for
qemu_strtod. Also, tighten qemu_strtod_finite() to never return a
non-finite value (prior to this patch, we were rejecting "inf" with
-EINVAL and unspecified resul
We have several limitations and bugs worth fixing; they are
inter-related enough that it is not worth splitting this patch into
smaller pieces:
* ".5k" should work to specify 512, just as "0.5k" does
* "1.k" and "1." + "9"*50 + "k" should both produce the same
result of 2048 after rounding
*
Add some more strings that the user might send our way. In
particular, some of these additions include FIXME comments showing
where our parser doesn't quite behave the way we want.
Signed-off-by: Eric Blake
---
v2: even more tests added, pad a string to avoid out-of-bounds
randomness [Hanna]
-
These two functions are subtly different, and not just because of
swapped parameter order. It took me adding better unit tests to
figure out why. Document the differences to make it more obvious to
developers trying to pick which one to use, as well as to aid in
upcoming semantic changes.
While
glib documentation[1] is clear: g_assert() should be avoided in unit
tests because it is ineffective if G_DISABLE_ASSERT is defined; unit
tests should stick to constructs based on g_assert_true() instead.
Note that since commit 262a69f428, we intentionally state that you
cannot define G_DISABLE_ASS
No need to copy-and-paste lots of boilerplate per string tested, when
we can consolidate that behind helper functions. Plus, this adds a
bit more coverage (we now test all strings both with and without
endptr, whereas before some tests skipped the NULL endptr case), which
exposed a SEGFAULT on qem
A quick search for 'qemu_strtosz' in the code base shows that outside
of the testsuite, the ONLY place that passes a non-NULL pointer to
@endptr of any variant of a size parser is in hmp.c (the 'o' parser of
monitor_parse_arguments), and that particular caller warns of
"extraneous characters at the
We are inconsistent on the contents of *value after a strto* parse
failure. I found the following behaviors:
- parse_uint() and parse_uint_full(), which document that *value is
slammed to 0 on all EINVAL failures and 0 or UINT_MAX on ERANGE
failures, and has unit tests for that (note that par
While we were matching 32-bit strtol in qemu_strtoi, our use of a
64-bit parse was leaking through for some inaccurate answers in
qemu_strtoui in comparison to a 32-bit strtoul. Fix those, and update
the testsuite now that our bounds checks are correct.
Our int wrappers would be a lot easier to w
v1 was here:
https://lists.gnu.org/archive/html/qemu-devel/2023-05/msg01988.html
since then:
- make parse_uint easier to use, then use it in qemu_strtosz
- add even more unit tests
- fix a bug in qemu_strtoui
- avoid dereferencing randome memory during unit tests [Hanna]
- other cleanups as I foun
When debugging test failures, seeing unsigned values as large positive
values rather than negative values matters (assuming glib 2.78+; given
that I just fixed a bug in glib 2.76 [1] where g_assert_cmpuint
displays signed instead of unsigned values). No impact when the test
is passing, but using a
On Thu, 11 May 2023 14:20:51 +0200
Markus Armbruster wrote:
[..]
> >
> > In my opinion the best way to deal with such situations would be to
> > abort() in test/development and log a warning in production. Of course
>
> Understand, but...
>
> > assert() wouldn't give me that, and it wouldn't b
The ivshmem-server failed when configured with the following:
./ivshmem-server -F -S ivshmem-file -l 2G
This is because the ivshmem_server_ftruncate fails without calling
ftruncate.
This commit allows the ivshmem-server to create a region of size 2G.
Signed-off-by: Erika Hunhoff
---
contrib/ivsh
On 5/11/23 12:56, Fan Ni wrote:
> From: Fan Ni
>
> Per cxl spec 3.0, add dynamic capacity region representative based on
> Table 8-126 and extend the cxl type3 device definition to include dc region
> information. Also, based on info in 8.2.9.8.9.1, add 'Get Dynamic Capacity
> Configuration' mail
Am 11. Mai 2023 08:57:16 UTC schrieb Mark Cave-Ayland
:
>Change pci_set_irq() to call qemu_set_irq() on the PCI device IRQ rather than
>calling PCI bus IRQ handler function directly. In order to preserve the
>existing behaviour update pci_qdev_realize() so that it automatically connects
>the PC
On Thu, May 04, 2023 at 11:34:17PM +0200, Kevin Wolf wrote:
> Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben:
> > All callers now pass is_external=false to aio_set_fd_handler() and
> > aio_set_event_notifier(). The aio_disable_external() API that
> > temporarily disables fd handlers that we
On Thu, May 04, 2023 at 11:13:42PM +0200, Kevin Wolf wrote:
> Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben:
> > Detach ioeventfds during drained sections to stop I/O submission from
> > the guest. virtio-blk is no longer reliant on aio_disable_external()
> > after this patch. This will al
On Thu, May 04, 2023 at 11:13:42PM +0200, Kevin Wolf wrote:
> Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben:
> > Detach ioeventfds during drained sections to stop I/O submission from
> > the guest. virtio-blk is no longer reliant on aio_disable_external()
> > after this patch. This will al
On Thu, May 04, 2023 at 11:00:35PM +0200, Kevin Wolf wrote:
> Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben:
> > virtio_queue_aio_detach_host_notifier() does two things:
> > 1. It removes the fd handler from the event loop.
> > 2. It processes the virtqueue one last time.
> >
> > The firs
>From 31fd9e07df62663e6fb427ce3e7e767e07cf7aeb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Th=C3=A9o=20Maillart?=
Date: Wed, 26 Apr 2023 13:57:44 +0200
Subject: [PATCH] scsi: check inquiry buffer length to prevent crash
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encodi
On 19/4/23 17:16, Mark Cave-Ayland wrote:
Currently when portio_list MemoryRegions are freed using portio_list_destroy()
the RCU
thread segfaults generating a backtrace similar to that below:
#0 0x599a34b6 in phys_section_destroy ../softmmu/physmem.c:996
#1 0x599a37a3 in phys_
Philippe Mathieu-Daudé wrote:
> On 11/5/23 16:12, Juan Quintela wrote:
>> Signed-off-by: Juan Quintela
>> ---
>> migration/dirtyrate.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>> diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c
>> index 38ea95af59..6706e3fe66 1006
On 6/4/23 12:00, Song Gao wrote:
ipi is used to communicate between cpus, this patch modified
loongarch ipi device as percpu deivce, so that there are
2 MemoryRegions with ipi device, rather than 2*cpus
MemoryRegions, which may be large than QDEV_MAX_MMIO if
more cpus are added on loongarch virt
On 6/4/23 12:00, Song Gao wrote:
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi
only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that
loongarch virt machine supports more cpus.
Interrupts from external devices can only be routed cpu 0-3 because
of extioi li
On 6/4/23 12:00, Song Gao wrote:
When ipi mailbox is used, cpu index is decoded from iocsr register.
cpu maybe does not exist. This patch adss NULL pointer check on
ipi device.
How can that happens from a guest vcpu context?
Signed-off-by: Song Gao
---
hw/intc/loongarch_ipi.c | 31
On 11/5/23 16:12, Juan Quintela wrote:
After the previous two patches, there is nothing else that is target
specific.
Signed-off-by: Juan Quintela
Reviewed-by: Richard Henderson
---
- Remove check for CONFIG_SOFTMMU for dirtyrate.c, not needed (thanks
Richard)
---
migration/dirtyrate.c
On 11/5/23 16:12, Juan Quintela wrote:
Signed-off-by: Juan Quintela
---
migration/dirtyrate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/migration/dirtyrate.c b/migration/dirtyrate.c
index 38ea95af59..6706e3fe66 100644
--- a/migration/dirtyrate.c
+++ b/migration/d
Since the early draft of DCD support in kernel is out
(https://lore.kernel.org/linux-cxl/20230417164126.GA1904906@bgt-140510-bm03/T/#t),
this patch series provide dcd emulation in qemu so people who are interested
can have an early try. It is noted that the patch series may need to be updated
accor
From: Fan Ni
Per cxl spec 3.0, add dynamic capacity region representative based on
Table 8-126 and extend the cxl type3 device definition to include dc region
information. Also, based on info in 8.2.9.8.9.1, add 'Get Dynamic Capacity
Configuration' mailbox support.
Signed-off-by: Fan Ni
---
hw
From: Fan Ni
Add a property 'num-dc-regions' to ct3_props to allow users to create DC
regions.
With the change, users can control the number of DC regions the device
supports.
To make it easier, other parameters of the region like region base, length,
and block size are hard coded. If desired, th
From: Fan Ni
Add dynamic capacity extent information to the definition of
CXLType3Dev and add get DC extent list mailbox command based on
CXL.spec.3.0:.8.2.9.8.9.2.
With this command, we can create dc regions as below:
region=$(cat /sys/bus/cxl/devices/decoder0.0/create_dc_region)
echo $region>
From: Fan Ni
Based on CXL spec 3.0 Table 8-94 (Identify Memory Device Output
Payload), dynamic capacity event log size should be part of
output of the Identify command.
Add dc_event_log_size to the output payload for the host to get the info.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.
From: Fan Ni
Before the change, read from or write to dynamic capacity of the memory
device is not support as 1) no host backed file/memory is provided for
it; 2) no address space is created for the dynamic capacity.
With the change, add code to support following:
1. add a new property to type3
From: Fan Ni
Per CXL spec 3.0, we implemented the two mailbox commands:
Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.8.9.3, and
Release Dynamic Capacity Response (Opcode 4803h) 8.2.9.8.9.4.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.c | 223
From: Fan Ni
Since fabric manager emulation is not supported yet, the change implements
the functions to add/release dynamic capacity extents as QMP interfaces.
1. Add dynamic capacity extents:
For example, the command to add two continuous extents (each is 128MB
long) to region 0 (starting at
Dinah Baum writes:
> This patch enables 'query-cpu-model-expansion' on all
> architectures. Only architectures that implement
> the command will return results, others will return an
> error message as before.
>
> This patch lays the groundwork for parsing a
> -cpu cpu,help option as specified in
On 5/11/23 15:12, Juan Quintela wrote:
Juan Quintela (5):
softmmu: Create qemu_target_pages_to_MiB()
Use new created qemu_target_pages_to_MiB()
migration: Teach dirtyrate about qemu_target_page_size()
migration: Teach dirtyrate about qemu_target_page_bits()
migration: Make dirtyrat
Paolo Bonzini writes:
> Il gio 11 mag 2023, 18:56 Alex Bennée ha scritto:
>
> This is the mechanism we use to avoid defaulting to a build dir when
> we don't need to.
>
> Signed-off-by: Alex Bennée
>
> I had already squashed this into Steven Sistare's recently posted patch,
> which otherw
Richard Henderson writes:
> All uses replaced with TCGContext.addr_type.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Il gio 11 mag 2023, 18:56 Alex Bennée ha scritto:
> This is the mechanism we use to avoid defaulting to a build dir when
> we don't need to.
>
> Signed-off-by: Alex Bennée
>
I had already squashed this into Steven Sistare's recently posted patch,
which otherwise would have broken the "pages" jo
Richard Henderson writes:
> All uses replaced with TCGContext.addr_type.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> All uses replaced with TCGContext.addr_type.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
This is the mechanism we use to avoid defaulting to a build dir when
we don't need to.
Signed-off-by: Alex Bennée
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index e421f8a1f4..c566aeb418 100644
--- a/Makefile
+++ b/Makefile
@@ -26,7 +26,7
Richard Henderson writes:
> Eliminate the test vs TARGET_LONG_BITS by considering this
> predicate to be always true, and simplify accordingly.
>
> Signed-off-by: Richard Henderson
Without having an idea if that extra register would make a difference
(tb-stats could record maybe) so:
Review
Richard Henderson writes:
> All uses can be infered from the INDEX_op_qemu_*_a{32,64}_*
> opcode being used.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Based-on: 20230503070656.1746170-1-richard.hender...@linaro.org
> ("[PATCH v4 00/57] tcg: Improve atomicity support")
>
> and also
>
> Based-on: 20230502160846.1289975-1-richard.hender...@linaro.org
> ("[PATCH 00/16] tcg: Remove TARGET_ALIGNED_ONLY")
>
> The goal her
Richard Henderson writes:
> All uses can be infered from the INDEX_op_qemu_*_a{32,64}_* opcode
> being used. Add a field into TCGLabelQemuLdst to record the usage.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Because of its use on tgen_arithi, this value must be a signed
> 32-bit quantity, as that is what may be encoded in the insn.
> The truncation of the value to unsigned for 32-bit guests is
> done via the REX bit via 'trexw'.
>
> Removes the only uses of target_ulong
Richard Henderson writes:
> Since TCG_TYPE_I32 values are kept zero-extended in registers, via
> omission of the REXW bit, we need not extend if the register matches.
> This is already relied upon by qemu_{ld,st}.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
Rev
Richard Henderson writes:
> Keep all 32-bit values zero extended in the register, not solely when
> addresses are 32 bits. This eliminates a dependency on TARGET_LONG_BITS.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> We now have the address size as part of the opcode, so
> we no longer need to test TARGET_LONG_BITS. We can use
> uint64_t for target_ulong, as passed into load/store helpers.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtuali
Richard Henderson writes:
> For 32-bit hosts, we cannot simply rely on TCGContext.addr_bits,
> as we need one or two host registers to represent the guest address.
>
> Create the new opcodes and update all users. Since we have not
> yet eliminated TARGET_LONG_BITS, only one of the two opcodes
On Thu, May 11, 2023, 12:14 PM Paolo Bonzini wrote:
>
>
> Il gio 11 mag 2023, 17:58 John Snow ha scritto:
>
>> I'll make that simplifying change, which will also allow me to just put
>>> the import in the global scope instead of trying to do it JIT to work
>>> around ensurepip shenanigans. Shoul
On 5/3/23 3:42 AM, Jonathan Cameron wrote:
On Tue, 18 Apr 2023 15:21:36 -0700
Dave Jiang wrote:
s small RFC patch series is really a hack on what I need from qemu rather
than a proper implementation. I'm hoping to get some guidance from the list on
how to implement this correctly for qemu u
Il gio 11 mag 2023, 17:58 John Snow ha scritto:
> I'll make that simplifying change, which will also allow me to just put
>> the import in the global scope instead of trying to do it JIT to work
>> around ensurepip shenanigans. Should be a few less "I know this is bad"
>> comments for the linters
Richard Henderson writes:
> Expand from TCGv to TCGTemp inline in the translators,
> and validate that the size matches tcg_ctx->addr_type.
>
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg-op.h | 184 ++--
> tcg/tcg-op-ldst.c| 198 ++
On 5/11/23 4:15 AM, Stefano Garzarella wrote:
The virtio-blk-vhost-vdpa driver in libblkio 1.3.0 supports the new
'fd' property. Let's expose this to the user, so the management layer
can pass the file descriptor of an already opened vhost-vdpa character
device. This is useful especially when the
Richard Henderson writes:
> Expand from TCGv to TCGTemp inline in the translators,
> and validate that the size matches tcg_ctx->addr_type.
> These inlines will eventually be seen only by target-specific code.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Vir
On Thu, May 11, 2023, 11:57 AM Paolo Bonzini wrote:
>
>
> Il gio 11 mag 2023, 17:53 John Snow ha scritto:
>
>>
>> You're right, in the "optional" case for sphinx the error isn't really
>> *that* bad or serious. I'll try to work this or something very similar to
>> it in.
>>
>> I was thinking it
On Thu, May 11, 2023, 3:02 AM Paolo Bonzini wrote:
> On 5/11/23 05:54, John Snow wrote:
> > +if checkpip():
> > +# We ran ensurepip. We need to re-run post_init...!
> > +args = [sys.executable, __file__, "post_init"]
> > +subprocess.run(args, check=True)
> > +r
Il gio 11 mag 2023, 17:53 John Snow ha scritto:
>
> You're right, in the "optional" case for sphinx the error isn't really
> *that* bad or serious. I'll try to work this or something very similar to
> it in.
>
> I was thinking it could be up to the caller to discard the input, but I
> suppose we
On Thu, May 11, 2023, 2:53 AM Paolo Bonzini wrote:
> On 5/11/23 05:54, John Snow wrote:
> > This is a routine that is designed to print some usable info for human
> > beings back out to the terminal if/when "mkvenv ensure" fails to locate
> > or install a package during configure time, such as me
On 11/05/2023 16.12, Christian Schoenebeck wrote:
Add '9P' to the summary output section of 'VirtFS' to avoid being
confused with virtiofs.
Based-on: <20230503130757.863824-1-pefo...@google.com>
Signed-off-by: Christian Schoenebeck
---
meson.build | 4 ++--
1 file changed, 2 insertions(+), 2
Richard Henderson writes:
> This will enable replacement of TARGET_LONG_BITS within tcg/.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Since we do this inside gen_empty_mem_cb anyway, let's
> do this earlier inside tcg expansion.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/plugin-gen.h | 4 ++--
> accel/tcg/plugin-gen.c| 9 +++--
> tcg/tcg-op-ldst.c | 28 +++
Vladimir Sementsov-Ogievskiy wrote:
> On 11.05.23 15:00, Juan Quintela wrote:
+Now we start with the more interesting cases. Let start with the
+same qemu but not the same machine type.
>>> sounds like "different machine type on source and target" for me..
>>>
>>> Maybe, "not latest mac
Richard Henderson writes:
> We only need to make copies for loads, when the destination
> overlaps the address. For now, only eliminate the copy for
> stores and 128-bit loads.
>
> Rename plugin_prep_mem_callbacks to plugin_maybe_preserve_addr,
> returning NULL if no copy is made.
>
> Signed-o
Richard Henderson writes:
> As do_gen_mem_cb is called once, merge it into gen_empty_mem_cb.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> As gen_mem_wrapped is only used in plugin_gen_empty_mem_callback,
> we can avoid the curiosity of union mem_gen_fn by inlining it.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
> -Original Message-
> From: Matheus Tavares Bernardino
> Sent: Friday, January 13, 2023 7:39 AM
> To: qemu-devel@nongnu.org
> Cc: Taylor Simpson ; Brian Cain
> ; richard.hender...@linaro.org
> Subject: [PATCH 1/2] Hexagon (iclass): update J4_hintjumpr slot constraints
>
> The Hexagon
Richard Henderson writes:
> Always pass the target address as uint64_t.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
10.05.2023 15:20, Kevin Wolf wrote:
These functions must not be called in coroutine context, because they
need write access to the graph.
How important for this and 2 surrounding changes to be for 7.2-stable
(if we'll ever release one)? It smells like real bugs are being fixed
here, is it ever
Richard Henderson writes:
> Always pass the target address as uint64_t.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Always pass the target address as uint64_t.
> Adjust tcg_out_{ld,st}_helper_args to match.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> We already pass uint64_t to restore_state_to_opc; this changes all
> of the other uses from insn_start through the encoding to decoding.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
OpenRISC defines tininess to be detected before rounding. Setup qemu to
obey this.
Signed-off-by: Stafford Horne
Reviewed-by: Richard Henderson
---
Since v2:
- Add reviewed-by
Since v1:
- Remove setting default NaN behavior.
target/openrisc/cpu.c | 4
1 file changed, 4 insertions(+)
d
Hello,
Since v2:
- Add reviewed-by's from Richard
- Pull cpu definition out of ifdef in helper_mfspr
Since v1:
- Fixups suggested by Richard Henderson
This series adds support for the FPU related architecture changes defined in
architecture spec revision v1.4.
- https://openrisc.io/revisions
As per OpenRISC spec 1.4 FPCSR can be read and written in user mode.
Update mtspr and mfspr helpers to support this by moving the is_user
check into the helper.
Link:
https://raw.githubusercontent.com/openrisc/doc/master/openrisc-arch-1.4-rev0.pdf
Signed-off-by: Stafford Horne
Reviewed-by: Rich
Store the PC to ensure the correct value can be read in the exception
handler.
Signed-off-by: Stafford Horne
Reviewed-by: Richard Henderson
---
Since v2:
- Add reviewed-by
Since v1:
- Use function do_fpe (similar to do_range) to raise exception.
target/openrisc/fpu_helper.c | 13 +++-
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