On Fri, Jan 27, 2023 at 03:26:15PM -0600, Eric Blake wrote:
> In https://bugzilla.redhat.com/show_bug.cgi?id=2055229, the question
> was raised on how to make qemu-storage-daemon sufficiently powerful to
> be a full-blown replacement to qemu-nbd. One of the features still
> lacking is the ability
This patch move struct VirtQueue into virtio.h.
In order to implement Queue Reset, we have to record the queue reset
status of in struct VirtQueue and provide it to device.
Signed-off-by: Xuan Zhuo
---
hw/virtio/virtio.c | 49 ---
include/hw/virtio/virtio
In the current design, we stop the device from operating on the vring
during per-queue reset by resetting the structure VirtQueue.
But before the reset operation, when recycling some resources, we should
stop referencing new vring resources.
This bug is caused by this reason.
https://gitlab.
Check whether it is per-queue reset state in virtio_net_flush_tx().
Before per-queue reset, we need to recover async tx resources. At this
time, virtio_net_flush_tx() is called, but we should not try to send
new packets, so virtio_net_flush_tx() should check the current
per-queue reset state.
Fix
In the current design, we stop the device from operating on the vring
during per-queue reset by resetting the structure VirtQueue.
But before the reset operation, when recycling some resources, we should
stop referencing new vring resources. For example, when recycling
virtio-net's asynchrono
v1: https://lore.kernel.org/qemu-devel/20230114170151.87833-1-pe...@pjd.dev/
v2:
- Squashed 3 commits from original series into extract helper commit
- Dropped last 2 commits from original series
- Changed at24c_eeprom_init to return the I2CSlave object
- Added commit to introduce a
Allows users to specify binary data to initialize an EEPROM, allowing users to
emulate data programmed at manufacturing time.
- Added init_rom and init_rom_size attributes to TYPE_AT24C_EE
- Added at24c_eeprom_init_rom helper function to initialize attributes
- If -drive property is provided, it o
EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM,
I would expect the I2C state machine to be reset to default values, but I
wouldn't really expect the memory to change at all.
The current implementation of the at24c EEPROM resets its internal memory on
reset. This matches
aspeed_eeprom_init is an exact copy of at24c_eeprom_init, not needed.
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Reviewed-by: Corey Minyard
---
hw/arm/aspeed.c | 95 ++
- Create aspeed_eeprom.c and aspeed_eeprom.h
- Include aspeed_eeprom.c in CONFIG_ASPEED meson source files
- Include aspeed_eeprom.h in aspeed.c
- Add fby35_bmc_fruid data
- Use new at24c_eeprom_init_rom helper to initialize BMC FRUID EEPROM with data
from aspeed_eeprom.c
wget
https://github.co
This helper is useful in board initialization because lets users initialize and
realize an EEPROM on an I2C bus with a single function call.
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Corey Minyard
---
hw/arm/aspeed.c |
On Fri, Jan 27, 2023 at 08:42:40AM +0100, Cédric Le Goater wrote:
> > > > I2CSlave *at24c_eeprom_init(I2CBus *bus, uint8_t address, uint32_t
> > > > rom_size)
> > > > {
> > > > -I2CSlave *i2c_dev = i2c_slave_new(TYPE_AT24C_EE, address);
> > > > -DeviceState *dev = DEVICE(i2c_dev);
> >
On 2023/01/23 8:28, BALATON Zoltan wrote:
On Thu, 19 Jan 2023, Akihiko Odaki wrote:
On 2023/01/15 3:11, BALATON Zoltan wrote:
On Sat, 14 Jan 2023, Akihiko Odaki wrote:
On 2023/01/13 22:43, BALATON Zoltan wrote:
On Thu, 5 Jan 2023, BALATON Zoltan wrote:
Hello,
I got reports from several u
We have already used qapi to generate crypto device types, this allows
to convert type to a string 'model', so the 'model' field is not
needed.
And the 'name' field is not used by any backend driver, drop it.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: zhenwei pi
---
backends/cryptodev-buil
I developed the akcipher service, QoS setting, QMP/HMP commands and
statistics accounting for crypto device. Making myself as the
maintainer for QEMU's cryptodev.
Cc: Gonglei
Signed-off-by: zhenwei pi
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
Move queue_index, CryptoDevCompletionFunc and opaque into struct
CryptoDevBackendOpInfo, then cryptodev_backend_crypto_operation()
needs an argument CryptoDevBackendOpInfo *op_info only. And remove
VirtIOCryptoReq from cryptodev. It's also possible to hide
VirtIOCryptoReq into virtio-crypto.c in th
Now we have a QMP command to query crypto devices:
virsh qemu-monitor-command vm '{"execute": "query-cryptodev"}' | jq
{
"return": [
{
"service": [
"akcipher",
"mac",
"hash",
"cipher"
],
"id": "cryptodev1",
"client": [
{
Introduce cryptodev alg type in cryptodev.json, then apply this to
related codes, and drop 'enum CryptoDevBackendAlgType'.
There are two options:
1, { 'enum': 'QCryptodevBackendAlgType',
'prefix': 'CRYPTODEV_BACKEND_ALG',
'data': ['sym', 'asym']}
Then we can keep 'CRYPTODEV_BACKEND_ALG_SYM' an
Rather than exposing akcipher service/RSA algorithm to virtio crypto
device unconditionally, detect akcipher capability from akcipher
crypto framework. This avoids unsuccessful requests.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: zhenwei pi
---
backends/cryptodev-builtin.c | 18
Now we can use "query-stats" QMP command to query statistics of
crypto devices. (Originally this was designed to show statistics
by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that
querying configuration info by "query-cryptodev", and querying
runtime performance info by "query-stat
Account OPS/BPS for crypto device, this will be used for 'query-stats'
QEMU monitor command and QoS in the next step.
Note that a crypto device may support symmetric mode, asymmetric mode,
both symmetric and asymmetric mode. So we use two structure to
describe the statistics of a crypto device.
S
v3 -> v4:
- a small change in
'0005-cryptodev-Introduce-query-cryptodev-QMP-command.patch':
use 'uint32' instead of 'int' to describe CryptodevBackendClient:queue
- fix compling warning(gcc)/error(clang-11) on 32 bit platform in
'0007-hmp-add-cryptodev-info-command.patch':
use 'printf("%u",
Example of this command:
# virsh qemu-monitor-command vm --hmp info cryptodev
cryptodev1: service=[akcipher|mac|hash|cipher]
queue 0: type=builtin
cryptodev0: service=[akcipher]
queue 0: type=lkcf
Signed-off-by: zhenwei pi
---
hmp-commands-info.hx | 14 ++
include/monitor/h
Introduce cryptodev service type in cryptodev.json, then apply this
to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx
dependence from QEMU cryptodev.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: zhenwei pi
---
backends/cryptodev-builtin.c| 8
backends/cryptodev-lkcf.
Add 'throttle-bps' and 'throttle-ops' limitation to set QoS. The
two arguments work with both QEMU command line and QMP command.
Example of QEMU command line:
-object cryptodev-backend-builtin,id=cryptodev1,throttle-bps=1600,\
throttle-ops=100
Example of QMP command:
virsh qemu-monitor-command bu
Introduce QCryptodevBackendType in cryptodev.json, also apply this to
related codes. Then we can drop 'enum CryptoDevBackendOptionsType'.
Note that `CRYPTODEV_BACKEND_TYPE_NONE` is *NOT* used by anywhere, so
drop it(no 'none' enum in QCryptodevBackendType).
Reviewed-by: Daniel P. Berrangé
Signed
On 1/27/2023 8:28 AM, Michael S. Tsirkin wrote:
> On Sun, Jan 15, 2023 at 07:49:51PM -0500, Chuck Zmudzinski wrote:
> > The current reserved slot check in do_pci_register_device(), added with
> > commit 8b8849844fd6
>
> add ("subject here") please
>
> > ,is done even if the pci device being added i
On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitons for the registers trapped
by HDFGRTR/HDFGWTR bits 0..11. These cover various debug
related registers.
Signed-off-by: Peter Maydell
---
target/arm/cpregs.h | 12
target/arm/debug_helper.c | 11 +++
On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 36..63.
Of these, some correspond to RAS registers which we implement as
always-UNDEF: these don't need any extra handling for FGT because the
UNDEF-to-EL1 always takes priority
On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 24..35.
Signed-off-by: Peter Maydell
---
target/arm/cpregs.h | 12
target/arm/helper.c | 14 ++
2 files changed, 26 insertions(+)
Reviewed-by: Rich
On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 12..23.
Signed-off-by: Peter Maydell
---
target/arm/cpregs.h | 12
target/arm/helper.c | 12
2 files changed, 24 insertions(+)
Reviewed-by: Richar
On Thu, Jan 12, 2023 at 10:26:41AM +, Jonathan Cameron wrote:
> Noticed as this prevents iASL disasembling the DSDT table.
>
> Reviewed-by: Ira Weiny
> Signed-off-by: Jonathan Cameron
This needed but it looks like you did not bother updating
expected files for the tests. Did you run make ch
On 1/27/23 07:54, Peter Maydell wrote:
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 0..11.
Signed-off-by: Peter Maydell
---
The annotation of the cpreg definitions is split into multiple
patches for ease of review, 12 bits or so at a time.
---
target/arm/cpreg
On 1/27/23 07:54, Peter Maydell wrote:
Implement the machinery for fine-grained traps on normal sysregs.
Any sysreg with a fine-grained trap will set the new field to
indicate which FGT register bit it should trap on.
FGT traps only happen when an AArch64 EL2 enables them for
an AArch64 EL1. The
On 1/27/23 07:54, Peter Maydell wrote:
Define the system registers which are provided by the
FEAT_FGT fine-grained trap architectural feature:
HFGRTR_EL2, HFGWTR_EL2, HDFGRTR_EL2, HDFGWTR_EL2, HFGITR_EL2
All these registers are a set of bit fields, where each bit is set
for a trap and clear to
On 1/27/23 07:54, Peter Maydell wrote:
The HSTR_EL2 register is not supposed to have an effect unless EL2 is
enabled in the current security state. We weren't checking for this,
which meant that if the guest set up the HSTR_EL2 register we would
incorrectly trap even for accesses from Secure EL0
On 1/27/23 07:54, Peter Maydell wrote:
+void HELPER(hstr_trap_check)(CPUARMState *env, uint32_t mask, uint32_t
syndrome)
+{
+if (env->cp15.hstr_el2 & mask) {
+raise_exception(env, EXCP_UDEF, syndrome, 2);
+}
This is so simple...
@@ -4760,6 +4761,28 @@ static void do_coproc_i
On 1/27/23 07:54, Peter Maydell wrote:
The HSTR_EL2 register has a collection of trap bits which allow
trapping to EL2 for AArch32 EL0 or EL1 accesses to coprocessor
registers. The specification of these bits is that when the bit is
set we should trap
* EL1 accesses
* EL0 accesses, if the ac
On 1/27/23 07:54, Peter Maydell wrote:
Rearrange the code in do_coproc_insn() so that we calculate the
syndrome value for a potential trap early; we're about to add a
second check that wants this value earlier than where it is currently
determined.
(Specifically, a trap to EL2 because of HSTR_EL
On 1/27/23 07:54, Peter Maydell wrote:
We added the CPAccessResult values CP_ACCESS_TRAP_UNCATEGORIZED_EL2
and CP_ACCESS_TRAP_UNCATEGORIZED_EL3 purely in order to use them in
the ats_access() function, but doing so was incorrect (a bug fixed in
a previous commit). There aren't any cases where we
On 1/27/23 07:54, Peter Maydell wrote:
The AArch32 ATS12NSO* address translation operations are supposed to
trap to either EL2 or EL3 if they're executed at Secure EL1 (which
can only happen if EL3 is AArch64). We implement this, but we got
the syndrome value wrong: like other traps to EL2 or EL
On 1/27/23 07:54, Peter Maydell wrote:
The encodings 0,0,C7,C9,0 and 0,0,C7,C9,1 are AT SP1E1RP and AT
S1E1WP, but our ARMCPRegInfo definitions for them incorrectly name
them AT S1E1R and AT S1E1W (which are entirely different
instructions). Fix the names.
(This has no guest-visible effect as t
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
KVM does not support creating read-only mappings for realms at the
moment. Add an arch helper to detect whether read-only mappings are
supported.
Device ROM and flash normally use read-only mappings. Device ROM seems
limited to legacy use and does n
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
A realm cannot be reset, it must be recreated from scratch. The RMM
specification defines states of a Realm as NEW -> ACTIVE -> SYSTEM_OFF,
after which the Realm can only be destroyed. A PCSI_SYSTEM_RESET call,
which normally reboots the system, puts
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
Pass the num_cntrs parameter to Realm creation. These parameters
contribute to the initial Realm measurement.
Signed-off-by: Jean-Philippe Brucker
---
qapi/qom.json| 5 -
target/arm/kvm-rme.c | 21 -
2 files chan
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
Pass the num_bps and num_wps parameters to Realm creation. These
parameters contribute to the initial Realm measurement.
Signed-off-by: Jean-Philippe Brucker
---
qapi/qom.json| 8 +++-
target/arm/kvm-rme.c | 34 ++
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+static void rme_get_uint32(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+RmeGuest *guest = RME_GUEST(obj);
+uint32_t value;
+
+if (strcmp(name, "sve-vector-length") == 0) {
+
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+static void rme_get_uint32(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+RmeGuest *guest = RME_GUEST(obj);
+uint32_t value;
+
+if (strcmp(name, "sve-vector-length") == 0) {
+
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+static int rme_parse_rpv(uint8_t *out, const char *in, Error **errp)
+{
+int ret;
+size_t in_len = strlen(in);
+
+/* Two chars per byte */
+if (in_len > KVM_CAP_ARM_RME_RPV_SIZE * 2) {
+error_setg(errp, "Realm Personalization
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+object_class_property_add_str(oc, "measurement-algo",
+ rme_get_measurement_algo,
+ rme_set_measurement_algo);
+object_class_property_set_description(oc, "measurement-algo",
+
On 27/1/23 16:07, Jean-Philippe Brucker wrote:
Add a new RmeGuest object, inheriting from ConfidentialGuestSupport, to
support the Arm Realm Management Extension (RME). It is instantiated by
passing on the command-line:
-M virt,confidential-guest-support=
-object guest-rme,id=[,options...]
On 27/1/23 17:47, Bernhard Beschow wrote:
Going through pc_memory_init() seems quite complicated for a simple
assignment.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/i386/pc.h | 1 -
hw/i386/pc.c | 2 --
hw/i386/pc_piix.c| 4 ++--
hw/
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
Initialize the GPA space and populate it with boot images (kernel,
initrd, firmware, etc). Populating has to be done at VM start time,
because the images are loaded during reset by rom_reset()
Signed-off-by: Jean-Philippe Brucker
---
target/arm/k
On 27/1/23 17:47, Bernhard Beschow wrote:
No need to repeat the descriptions.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 2 +-
hw/i386/pc_q35.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 27/1/23 07:39, Richard Henderson wrote:
On 1/26/23 14:45, Philippe Mathieu-Daudé wrote:
+ /* Compare i128 */
+ tcg_gen_xor_i64(t0, TCGV128_LOW(oldv), TCGV128_LOW(cmpv));
+ tcg_gen_xor_i64(t1, TCGV128_HIGH(oldv), TCGV128_HIGH(cmpv));
+ tcg_gen_or_i64(t0, t0, t1);
On Thu, 26 Jan 2023 20:49:41 +0200
Avihai Horon wrote:
> From: Joao Martins
>
> Add device dirty page bitmap sync functionality. This uses the device
> DMA logging uAPI to sync dirty page bitmap from the device.
>
> Device dirty page bitmap sync is used only if all devices within a
> container
On Thu, Jan 26, 2023 at 03:14:01PM -0500, Stefan Hajnoczi wrote:
> This regression test demonstrates that detect-zeroes works with
> registered buffers. Bug details:
> https://gitlab.com/qemu-project/qemu/-/issues/1404
>
> Signed-off-by: Stefan Hajnoczi
> ---
> .../tests/detect-zeroes-registered
On Thu, Jan 26, 2023 at 03:14:00PM -0500, Stefan Hajnoczi wrote:
> The blk_register_buf() API is an optimization hint that allows some
> block drivers to avoid I/O buffer housekeeping or bounce buffers.
>
> Add an -r option to register the I/O buffer so that qemu-io can be used
> to test the blk_r
On Thu, Jan 26, 2023 at 03:13:59PM -0500, Stefan Hajnoczi wrote:
> The block layer APIs use BdrvRequestFlags while qemu-io code uses int.
> Although the code compiles and runs fine, BdrvRequestFlags is clearer
> because it differentiates between other types of flags like bdrv_open()
> flags.
>
> T
On Fri, Jan 27, 2023 at 3:47 PM Eric Blake wrote:
> On Thu, Jan 19, 2023 at 07:59:43AM +0100, Markus Armbruster wrote:
> > When a symbolic link points to a file that needs cleaning, the script
> > replaces the link with a cleaned regular file. Not wanted; skip them.
> >
> > We have a few symboli
On Thu, Jan 19, 2023 at 04:20:16PM +0100, Kevin Wolf wrote:
> Am 20.06.2022 um 18:26 hat Hanna Reitz geschrieben:
> > VMDK's implementation of .bdrv_get_specific_info() returns information
> > about its extent files, ostensibly in the form of ImageInfo objects.
> > However, it does not get this inf
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
--- a/target/arm/kvm-rme.c
+++ b/target/arm/kvm-rme.c
@@ -118,6 +118,16 @@ int kvm_arm_rme_init(ConfidentialGuestSupport *cgs, Error
**errp)
return 0;
}
+int kvm_arm_rme_vcpu_init(CPUState *cs)
+{
+ARMCPU *cpu = ARM_CPU(cs);
+
+i
On Mon, Jun 20, 2022 at 06:26:54PM +0200, Hanna Reitz wrote:
> Add some (optional) information that the file driver can provide for
> image files, namely the extent size hint.
>
> Signed-off-by: Hanna Reitz
> ---
> qapi/block-core.json | 26 --
> block/file-posix.c | 30
On 1/27/23 10:58, Helge Deller wrote:
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
---
v2: Use regpairs_aligned() and target_offset64(), noticed by Laurent Vivier
Reviewed-by: Richard Henderson
r~
On 1/27/23 10:25, Helge Deller wrote:
Add translation for the host error return code of:
getsockopt(19, SOL_SOCKET, SO_ERROR, [ECONNREFUSED], [4]) = 0
This fixes the testsuite of the cockpit debian package with a
hppa-linux guest on a x86-64 host.
Signed-off-by: Helge Deller
---
Reviewed
On Thu, Jan 19, 2023 at 07:59:54AM +0100, Markus Armbruster wrote:
> Clean up includes so that osdep.h is included first and headers
> which it implies are not included manually.
>
> This commit was created with scripts/clean-includes.
>
> Signed-off-by: Markus Armbruster
> ---
> include/block/
On 1/27/23 10:18, Helge Deller wrote:
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
r~
On 1/27/23 10:10, Helge Deller wrote:
The hppa architectures provides an own output for the emulated
/proc/cpuinfo file.
Some userspace applications count (even if that's not the recommended
way) the number of lines which start with "processor:" and assume that
this number then reflects the numb
On Thu, Jan 19, 2023 at 07:59:43AM +0100, Markus Armbruster wrote:
> When a symbolic link points to a file that needs cleaning, the script
> replaces the link with a cleaned regular file. Not wanted; skip them.
>
> We have a few symbolic links under subprojects/libvduse/ and
> subprojects/libvhos
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
Although the VM type does not affect values probed from the scratch vCPU
at the moment, it could later. Ensure we specify the right type when
creating the temporary VM.
Signed-off-by: Jean-Philippe Brucker
---
Does the PA size need changing as well
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+static int kvm_arm_rme_get_core_regs(CPUState *cs)
+{
+int i, ret;
+struct kvm_one_reg reg;
+ARMCPU *cpu = ARM_CPU(cs);
+CPUARMState *env = &cpu->env;
+
+for (i = 0; i < 8; i++) {
+reg.id = AARCH64_CORE_REG(regs.regs[i]);
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
The target code calls kvm_arm_vcpu_init() to mark the vCPU as part of a
realm. RME support does not use the register lists, because the host can
only set the boot PC and registers x0-x7. The rest is private to the
Realm and saved/restored by the RMM.
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
The confidential guest support in KVM limits the number of registers
that we can read and write. Split the get/put_registers function to
prepare for it.
Signed-off-by: Jean-Philippe Brucker
---
target/arm/kvm64.c | 30 -
On Fri, 27 Jan 2023 at 12:10, Warner Losh wrote:
>
> [[ cc list trimmed to just qemu-devel ]]
>
> On Fri, Jan 27, 2023 at 8:18 AM Stefan Hajnoczi wrote:
>>
>> Dear QEMU, KVM, and rust-vmm communities,
>> QEMU will apply for Google Summer of Code 2023
>> (https://summerofcode.withgoogle.com/) and
On Thu, 26 Jan 2023 20:49:38 +0200
Avihai Horon wrote:
> From: Joao Martins
>
> According to the device DMA logging uAPI, IOVA ranges to be logged by
> the device must be provided all at once upon DMA logging start.
>
> As preparation for the following patches which will add device dirty
> pag
On Thu, Jan 19, 2023 at 07:59:42AM +0100, Markus Armbruster wrote:
> When running with --check-dup-head, the script always claims it "Found
> duplicate header file includes." Fix to do it only when it actually
> found some.
>
> Fixes: d66253e46ae2b9c36a9dd90b2b74c0dfa5804b22
> Signed-off-by: Mark
On Thu, Jan 19, 2023 at 07:59:41AM +0100, Markus Armbruster wrote:
...
>
> Fix the script to fully skip files.
>
> Fixes: fd3e39a40ca2ee26b09a5de3149af8b056b85233
> Fixes: d66253e46ae2b9c36a9dd90b2b74c0dfa5804b22
> Signed-off-by: Markus Armbruster
> ---
> scripts/clean-includes | 8 +---
>
In https://bugzilla.redhat.com/show_bug.cgi?id=2055229, the question
was raised on how to make qemu-storage-daemon sufficiently powerful to
be a full-blown replacement to qemu-nbd. One of the features still
lacking is the ability to do systemd socket activation (qemu-nbd does
this, qemu-storage-da
On Thu, 26 Jan 2023 20:49:35 +0200
Avihai Horon wrote:
> There are already two places where dirty page bitmap allocation and
> calculations are done in open code. With device dirty page tracking
> being added in next patches, there are going to be even more places.
>
> To avoid code duplication,
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
When confidential-guest-support is enabled for the virt machine, call
the RME init function, and add the RME flag to the VM type.
* The Realm differentiates non-secure from realm memory using the upper
GPA bit. Reserve that bit when creating the
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
---
v2: Use regpairs_aligned() and target_offset64(), noticed by Laurent Vivier
diff --git a/linux-user/strace.c b/linux-user/strace.c
index 82dc1a1e20..379536f5c9 100644
--- a/linux-user/strace.c
+++ b/linux-user/str
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
+static inline int kvm_arm_rme_init(ConfidentialGuestSupport *cgs, Error **errp)
+{
+return 0;
+}
+
+static inline int kvm_arm_rme_vm_type(MachineState *ms)
+{
+return 0;
+}
Should the stubs really return 0, or g_assert_not_reached()?
+st
commit fb3f3730e4 added mechanism to generate virtual instruction
exception during instruction decode when virt is enabled.
However in some situations, illegal instruction exception can be raised
due to state of CPU. One such situation is implementing branch tracking.
[1] An indirect branch if doe
Please dis-regard this.
I've sent the patch to qemu-ri...@nongnu.org
On Sat, Jan 28, 2023 at 12:48 AM Deepak Gupta wrote:
>
> commit fb3f3730e4 added mechanism to generate virtual instruction
> exception during instruction decode when virt is enabled.
>
> However in some situations, illegal instr
On 1/26/23 16:12, Laurent Vivier wrote:
Le 15/01/2023 à 10:04, Helge Deller a écrit :
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
---
linux-user/strace.list | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-user/strace.list b/li
Add translation for the host error return code of:
getsockopt(19, SOL_SOCKET, SO_ERROR, [ECONNREFUSED], [4]) = 0
This fixes the testsuite of the cockpit debian package with a
hppa-linux guest on a x86-64 host.
Signed-off-by: Helge Deller
---
v2: Fix indenting to make checkscript.sh happy
d
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller
--
v2: use TARGET_ABI_FMT_lx instead of %p in personality output
as suggested by Philippe Mathieu-Daudé and Laurent Vivier
diff --git a/linux-user/strace.list b/linux-user/strace.list
index f9254725a1..703c0f160
The hppa architectures provides an own output for the emulated
/proc/cpuinfo file.
Some userspace applications count (even if that's not the recommended
way) the number of lines which start with "processor:" and assume that
this number then reflects the number of online CPUs. Since those 3
archite
On 1/27/23 05:07, Jean-Philippe Brucker wrote:
Add a new RmeGuest object, inheriting from ConfidentialGuestSupport, to
support the Arm Realm Management Extension (RME). It is instantiated by
passing on the command-line:
-M virt,confidential-guest-support=
-object guest-rme,id=[,options...]
On Fri, 27 Jan 2023, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Why? I'd rather replace locals with direct call to function as it's not
expensive (just returns a global) and adding a local name to it is not
much shorter so why do that?
Regards,
BALATON Zoltan
---
hw/i386/pc_
On Fri, 27 Jan 2023, Bernhard Beschow wrote:
The variable is redundant to "phb" and is never used by its real type.
Also replace qdev_get_machine() with reference already passed to init
function. (Maybe worth mentioning in commit message even if too small
change for a separate patch.)
Sign
On 1/27/23 07:08, Alex Bennée wrote:
Why do we have all these different allocate functions if TCGTemp's are a
shared abstract type anyway?
Type checking.
r~
On 1/27/23 04:00, Alex Bennée wrote:
+for (i = s = 0; i < n; ++i) {
Why the pre-increment for ++i here? It doesn't make a difference surely?
Why not? It doesn't make a difference.
(Semi-reflexive preference driven by c++, where post-inc operator might (or might not) be
less
On 1/27/23 00:40, Alex Bennée wrote:
Richard Henderson writes:
These will be used by some hosts, both 32 and 64-bit, to pass and
return i128. Not yet used, because allocation is not yet enabled.
Signed-off-by: Richard Henderson
---
tcg/tcg-internal.h | 3 +
tcg/tcg.c | 135 ++
On Fri, 27 Jan 2023 at 17:55, Peter Maydell wrote:
> The first seven patches are various cleanups and bugfixes that
> I noticed while I was doing the FEAT_FGT work. In particular, we
> weren't getting the priority of HSTR_EL2 traps right -- these should
> take priority over UNDEF-at-EL traps but n
On 1/27/23 02:03, Bastian Koppelmann wrote:
we were sign extending the result of the load, while the instruction
clearly states that the result should be unsigned.
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed
On 1/27/23 02:03, Bastian Koppelmann wrote:
if cpu_gpr_d[r3] == 0 then we were shifting the lower register to the
right by 32 which is undefined behaviour. In this case the TriCore would
do nothing an just return the higher register cpu_reg_d[r1]. We fixed
that by detecting whether cpu_gpr_d[r3]
Richard Henderson writes:
> Add code generation functions for data movement between
> TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract).
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg-op.h | 4
> tcg/tcg-internal.h | 13 +++
On 1/27/23 02:03, Bastian Koppelmann wrote:
if we used const16 == 0 we would crash qemu with the error:
../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed
This is a special case anyways as we can directly return cpu_gpr_d[r1]
as this is the most significant word an
On 1/27/23 02:03, Bastian Koppelmann wrote:
we were mixing up the "c" and "d" registers. We used "d" as a
destination register und "c" as the source. According to the TriCore ISA
manual 1.6 vol 2 it is the other way round.
Signed-off-by: Bastian Koppelmann
Resolves:https://gitlab.com/qemu-projec
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