[PATCH v2] travis.yml: Use the libfdt from the distro instead of the submodule

2023-01-19 Thread Thomas Huth
No need to compile-test third party submodules over and over again if we can simply use the pre-build library from the distribution instead. By also adding --enable-fdt=system to the configure options, we can also avoid to check out the "dtc" submodule here. Signed-off-by: Thomas Huth --- v2: A

[PULL 34/37] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst

2023-01-19 Thread Alistair Francis
From: Richard Henderson We failed to update this with the w^x split, so misses the fact that true pc-relative offsets are usually small. Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230117230415.354239-1-richard.hender...@linaro.org> Signed-off-by: Alistair Fra

[PULL 05/37] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState

2023-01-19 Thread Alistair Francis
From: Bin Meng At present for some unknown reason the HTIF registers (fromhost & tohost) are defined in the RISC-V CPUArchState. It should really be put in the HTIFState struct as it is only meaningful to HTIF. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair

[PULL 23/37] target/riscv/cpu: set cpu->cfg in register_cpu_props()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza There is an informal contract between the cpu_init() functions and riscv_cpu_realize(): if cpu->env.misa_ext is zero, assume that the default settings were loaded via register_cpu_props() and do validations to set env.misa_ext. If it's not zero, skip this whole proce

[PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng Reviewed-by: Alistair F

[PULL 31/37] hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <2023070

[PULL 32/37] target/riscv: Fix up masking of vsip/vsie accesses

2023-01-19 Thread Alistair Francis
From: Andrew Bresticker The current logic attempts to shift the VS-level bits into their correct position in mip while leaving the remaining bits in-tact. This is both pointless and likely incorrect since one would expect that any new, future VS-level interrupts will get their own position in mip

[PULL 22/37] hw/riscv/boot.c: use MachineState in riscv_load_kernel()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza All callers are using kernel_filename as machine->kernel_filename. This will also simplify the changes in riscv_load_kernel() that we're going to do next. Cc: Palmer Dabbelt Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by:

[PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid

2023-01-19 Thread Alistair Francis
From: Bin Meng env->mhartid is currently casted to long before printed, which drops the high 32-bit for rv64 on 32-bit host. Use TARGET_FMT_lx instead. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-Id: <20230109152655.340114-1-bm...@tinylab.org> Signed-off-by: Alistair Francis

[PULL 36/37] target/riscv: Remove helper_set_rod_rounding_mode

2023-01-19 Thread Alistair Francis
From: Richard Henderson The only setting of RISCV_FRM_ROD is from the vector unit, and now handled by helper_set_rounding_mode_chkfrm. This helper is now unused. Signed-off-by: Richard Henderson Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20230115160657.316

[PULL 33/37] target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1

2023-01-19 Thread Alistair Francis
From: Andrew Bresticker Per the AIA specification, writes to stimecmp from VS level should trap when hvictl.VTI is set since the write may cause vsip.STIP to become unset. Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp support") Signed-off-by: Andrew Bresticker Reviewed-by: Alistair Francis

[PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza riscv_load_firmware(), riscv_load_initrd() and riscv_load_kernel() works under the assumption that a 'filename' parameter is always not NULL. This is currently the case since all callers of these functions are checking for NULL before calling them. Add an g_assert()

[PULL 04/37] hw/char: riscv_htif: Use conventional 's' for HTIFState

2023-01-19 Thread Alistair Francis
From: Bin Meng QEMU source codes tend to use 's' to represent the hardware state. Let's use it for HTIFState. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20221229091828.1945072-5-bm...@tinylab.org> Signed-off-by: Alistair Francis --

[PULL 35/37] target/riscv: Introduce helper_set_rounding_mode_chkfrm

2023-01-19 Thread Alistair Francis
From: Richard Henderson The new helper always validates the contents of FRM, even if the new rounding mode is not DYN. This is required by the vector unit. Track whether we've validated FRM separately from whether we've updated fp_status with a given rounding mode, so that we can elide calls co

[PULL 30/37] hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <2023070

[PULL 14/37] tests/avocado: add RISC-V OpenSBI boot test

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza This test is used to do a quick sanity check to ensure that we're able to run the existing QEMU FW image. 'sifive_u', 'spike' and 'virt' riscv64 machines, and 'sifive_u' and 'virt' 32 bit machines are able to run the default RISCV64_BIOS_BIN | RISCV32_BIOS_BIN firmw

[PULL 37/37] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza Commit 1c20d3ff6004 ("hw/riscv: virt: Add a machine done notifier") moved the initialization of fw_cfg to the virt_machine_done() callback. Problem is that the validation of fw_cfg by devices such as ramfb is done before the machine done notifier is called. Moving c

[PULL 19/37] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza riscv_load_initrd() returns the initrd end addr while also writing a 'start' var to mark the addr start. These informations are being used just to write the initrd FDT node. Every existing caller of riscv_load_initrd() is writing the FDT in the same manner. We can s

[PULL 03/37] hw/char: riscv_htif: Drop useless assignment of memory region

2023-01-19 Thread Alistair Francis
From: Bin Meng struct HTIFState has 3 members for address space and memory region, and are initialized during htif_mm_init(). But they are actually useless. Drop them. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20221229091828.194507

[PULL 27/37] hw/riscv/virt.c: simplify create_fdt()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza 'mem_size' and 'cmdline' aren't being used. Remove them. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <2023070948.316276-3-dbarb...@ventanamicro.com> Signed-off-by: Alistair Francis ---

[PULL 12/37] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading

2023-01-19 Thread Alistair Francis
From: Bin Meng At present create_fdt() calls htif_uses_elf_symbols() to determine whether to insert a property for the HTIF. This unfortunately creates a hidden dependency to riscv_load_{firmware,kernel} that create_fdt() must be called after the ELF {firmware,kernel} image has been loaded. Dec

[PULL 28/37] hw/riscv/sifive_u.c: simplify create_fdt()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza 'cmdline' isn't being used. Remove it. A MachineState pointer is being retrieved via a MACHINE() macro calling qdev_get_machine(). Use MACHINE(s) instead to avoid calling qdev(). 'mem_size' is being set as machine->ram_size by the caller. Retrieve it via ms->ram_s

[PULL 01/37] hw/char: riscv_htif: Avoid using magic numbers

2023-01-19 Thread Alistair Francis
From: Bin Meng The Spike HTIF is poorly documented. The only relevant info we can get from the internet is from Andrew Waterman at [1]. Add a comment block before htif_handle_tohost_write() to explain the tohost register format, and use meaningful macros instead of magic numbers in the codes. W

[PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza create_fdt_socket_cpus() writes a different 'mmu-type' value if we're running in 32 or 64 bits. However, the flag is being calculated during virt_machine_init(), and is passed around in create_fdt(), then create_fdt_socket(), and then finally create_fdt_socket_cpus()

[PULL 18/37] hw/riscv/spike.c: load initrd right after riscv_load_kernel()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza This will make the code more in line with what the other boards are doing. We'll also avoid an extra check to machine->kernel_filename since we already checked that before executing riscv_load_kernel(). Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe M

[PULL 26/37] hw/riscv/spike.c: simplify create_fdt()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza 'mem_size' and 'cmdline' are unused. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <2023070948.316276-2-dbarb...@ventanamicro.com> Signed-off-by: Alistair Francis --- hw/riscv/spike.c |

[PULL 24/37] target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza All RISCV CPUs are setting cpu->cfg during their cpu_init() functions, meaning that there's no reason to skip all the misa validation and setup if misa_ext was set beforehand - especially since we're setting an updated value in set_misa() in the end. Put this code c

[PULL 20/37] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza The sifive_u, spike and virt machines are writing the 'bootargs' FDT node during their respective create_fdt(). Given that bootargs is written only when '-append' is used, and this option is only allowed with the '-kernel' option, which in turn is already being chec

[PULL 15/37] hw/riscv/spike: use 'fdt' from MachineState

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command. Remove the 'fdt' pointer from SpikeState and use MachineState::fdt instead. Signed-off-by: Daniel Henrique Barboza

[PULL 08/37] hw/riscv: spike: Remove the out-of-date comments

2023-01-19 Thread Alistair Francis
From: Bin Meng Spike machine now supports OpenSBI plain binary bios image, so the comments are no longer valid. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20221229091828.1945072-9-bm...@tinylab.org> Signed-off-by: Alistair Francis

[PULL 11/37] hw/riscv/boot.c: Introduce riscv_find_firmware()

2023-01-19 Thread Alistair Francis
From: Bin Meng Rename previous riscv_find_firmware() to riscv_find_bios(), and introduce a new riscv_find_firmware() to implement the first half part of the work done in riscv_find_and_load_firmware(). This new API is helpful for machine that wants to know the final chosen firmware file name but

[PULL 07/37] hw/char: riscv_htif: Support console output via proxy syscall

2023-01-19 Thread Alistair Francis
From: Bin Meng At present the HTIF proxy syscall is unsupported. On RV32, only device 0 is supported so there is no console device for RV32. The only way to implement console funtionality on RV32 is to support the SYS_WRITE syscall. With this commit, the Spike machine is able to boot the 32-bit

[PULL 16/37] hw/riscv/sifive_u: use 'fdt' from MachineState

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command. Remove the 'fdt' pointer from SiFiveUState and use MachineState::fdt instead. Cc: Palmer Dabbelt Signed-off-by: D

[PULL 06/37] hw/char: riscv_htif: Remove forward declarations for non-existent variables

2023-01-19 Thread Alistair Francis
From: Bin Meng There are forward declarations for 'vmstate_htif' and 'htif_io_ops' in riscv_htif.h however there are no definitions in the C codes. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20221229091828.1945072-7-bm...@tinylab.or

[PULL 09/37] hw/riscv/boot.c: make riscv_find_firmware() static

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza The only caller is riscv_find_and_load_firmware(), which is in the same file. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Bin Meng Signed-off-by: Bin Meng Message-Id: <20221221182300.3079

[PULL 00/37] riscv-to-apply queue

2023-01-19 Thread Alistair Francis
From: Alistair Francis The following changes since commit 239b8b0699a222fd21da1c5fdeba0a2456085a47: Merge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging (2023-01-19 15:05:29 +) are available in the Git repository at: https://github.com

[PULL 13/37] target/riscv/cpu.c: Fix elen check

2023-01-19 Thread Alistair Francis
From: Dongxue Zhang The elen check should be cpu->cfg.elen in range [8, 64]. Signed-off-by: Dongxue Zhang Reviewed-by: LIU Zhiwei Reviewed-by: Frank Chang Reviewed-by: Alistair Francis Message-Id: <167236721596.15277.265340527322725628...@git.sr.ht> [ Changes by AF: - Tidy up commit message

[PULL 02/37] hw/char: riscv_htif: Drop {to, from}host_size in HTIFState

2023-01-19 Thread Alistair Francis
From: Bin Meng These are not used anywhere. Drop them. Signed-off-by: Bin Meng Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Message-Id: <20221229091828.1945072-3-bm...@tinylab.org> Signed-off-by: Alistair Francis --- include/hw/char/riscv_htif.h | 2 -- 1 file changed,

[PULL 10/37] hw/riscv/boot.c: introduce riscv_default_firmware_name()

2023-01-19 Thread Alistair Francis
From: Daniel Henrique Barboza Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function to handle this detail instead of hardcoding it in the boards. Ideally we would bake this logic inside riscv_find_and_load_fi

Re: [PATCH v2 07/11] tests/qtest/migration-test: Build command line using GString API (1/4)

2023-01-19 Thread Philippe Mathieu-Daudé
On 19/1/23 22:10, Richard Henderson wrote: On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 1/4: Convert memory & machine options. Signed-off-by: Philippe Mathieu-Daudé ---   tests/qtest/migration-test.c | 22 --   1 file changed, 12 insertions(+), 10 deletions(-) diff

Re: [PATCH v2 0/4] bulk: Replace TARGET_FMT_plx by HWADDR_PRIx

2023-01-19 Thread Thomas Huth
On 11/01/2023 09.39, Philippe Mathieu-Daudé wrote: Since v1: - Fix checkpatch style violations - Use HWADDR_PRIx instead of HWADDR_FMT_plx (Zoltan) Supersedes: <20230110212947.34557-1-phi...@linaro.org> "bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx" Philippe Mathieu-Daudé (4):

Re: [PATCH v4 12/19] target/hexagon: Clean up includes

2023-01-19 Thread Markus Armbruster
Taylor Simpson writes: >> -Original Message- >> From: Markus Armbruster >> Sent: Thursday, January 19, 2023 1:00 AM >> To: qemu-devel@nongnu.org >> Cc: richard.hender...@linaro.org; pbonz...@redhat.com; >> kw...@redhat.com; hre...@redhat.com; i...@bsdimp.com; >> kev...@freebsd.org; berra

Re: [PATCH v4 10/19] migration: Clean up includes

2023-01-19 Thread Markus Armbruster
"Dr. David Alan Gilbert" writes: > * Markus Armbruster (arm...@redhat.com) wrote: >> "Dr. David Alan Gilbert" writes: >> >> > * Markus Armbruster (arm...@redhat.com) wrote: >> >> Clean up includes so that osdep.h is included first and headers >> >> which it implies are not included manually. >>

Re: [PATCH v2 09/11] tests/qtest/migration-test: Build command line using GString API (3/4)

2023-01-19 Thread Philippe Mathieu-Daudé
On 19/1/23 22:17, Richard Henderson wrote: On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 3/4: Convert accelerator options. Signed-off-by: Philippe Mathieu-Daudé ---   tests/qtest/migration-test.c | 11 +--   1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/tests/qtes

[PULL 01/12] coroutine: Clean up superfluous inclusion of qemu/coroutine.h

2023-01-19 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Reviewed-by: Stefan Hajnoczi Message-Id: <20221221131435.3851212-2-arm...@redhat.com> --- crypto/block-luks-priv.h| 1 - include/block/raw-aio.h | 1 - include/scsi/pr-manager.h | 1 - nbd/nbd-internal.h | 1 - blockjob.c | 1 -

[PULL 11/12] include/hw/ppc: Don't include hw/pci-host/pnv_phb.h from pnv.h

2023-01-19 Thread Markus Armbruster
The next commit needs to include hw/ppc/pnv.h from hw/pci-host/pnv_phb.h. Avoid an inclusion loop. Signed-off-by: Markus Armbruster Reviewed-by: Cédric Le Goater Reviewed-by: Daniel Henrique Barboza Message-Id: <20221222104628.659681-4-arm...@redhat.com> --- include/hw/pci-host/pnv_phb4.h | 3

[PULL 05/12] coroutine: Use Coroutine typedef name instead of structure tag

2023-01-19 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221221131435.3851212-6-arm...@redhat.com> --- include/block/aio.h | 7 +++ util/async.c| 4 ++-- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/include/block/aio.h b/include/block/aio.

[PULL 08/12] include/hw/block: Include hw/block/block.h where needed

2023-01-19 Thread Markus Armbruster
hw/block/swim.h needs BlockConf. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221221133551.3967339-4-arm...@redhat.com> --- include/hw/block/swim.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h index

[PULL 10/12] include/hw/ppc: Supply a few missing includes

2023-01-19 Thread Markus Armbruster
A few headers neglect to include headers they need. They compile only if something else includes the required header(s) first. Fix that. Signed-off-by: Markus Armbruster Reviewed-by: Cédric Le Goater Reviewed-by: Daniel Henrique Barboza Message-Id: <20221222104628.659681-3-arm...@redhat.com>

[PULL 07/12] hw/sparc64/niagara: Use blk_name() instead of open-coding it

2023-01-19 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221221133551.3967339-3-arm...@redhat.com> --- hw/sparc64/niagara.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index ab3c4ec346..6725cc61f

[PULL 09/12] include/hw/ppc: Split pnv_chip.h off pnv.h

2023-01-19 Thread Markus Armbruster
PnvChipClass, PnvChip, Pnv8Chip, Pnv9Chip, and Pnv10Chip are defined in pnv.h. Many users of the header don't actually need them. One instance is this inclusion loop: hw/ppc/pnv_homer.h includes hw/ppc/pnv.h for typedef PnvChip, and vice versa for struct PnvHomer. Similar structs live in their o

[PULL 12/12] include/hw/ppc include/hw/pci-host: Drop extra typedefs

2023-01-19 Thread Markus Armbruster
PnvChip is typedef'ed in five places, and PnvPhb4PecState in two. Keep one, drop the others. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Reviewed-by: Daniel Henrique Barboza Message-Id: <20221222104628.659681-5-arm...@redhat.com> --- hw/p

[PULL 04/12] coroutine: Split qemu/coroutine-core.h off qemu/coroutine.h

2023-01-19 Thread Markus Armbruster
qemu/coroutine.h and qemu/lockable.h include each other. They need each other only in macro expansions, so we could simply drop both inclusions to break the loop, and add suitable includes to files that expand the macros. Instead, move a part of qemu/coroutine.h to new qemu/coroutine-core.h so th

[PULL 02/12] coroutine: Move coroutine_fn to qemu/osdep.h, trim includes

2023-01-19 Thread Markus Armbruster
block/block-hmp-cmds.h and qemu/co-shared-resource.h use coroutine_fn without including qemu/coroutine.h. They compile only if it's already included from elsewhere. I could fix that, but pulling in qemu/coroutine.h and everything it includes just for a macro that expands into nothing feels silly.

[PULL 06/12] include/block: Untangle inclusion loops

2023-01-19 Thread Markus Armbruster
We have two inclusion loops: block/block.h -> block/block-global-state.h -> block/block-common.h -> block/blockjob.h -> block/block.h block/block.h -> block/block-io.h -> block/block-common.h -> block/blockjob.h -> block/block.h I believe these go ba

[PULL 03/12] coroutine: Clean up superfluous inclusion of qemu/lockable.h

2023-01-19 Thread Markus Armbruster
Signed-off-by: Markus Armbruster Reviewed-by: Stefan Hajnoczi Message-Id: <20221221131435.3851212-4-arm...@redhat.com> --- include/qemu/progress_meter.h | 2 +- block/progress_meter.c| 2 ++ tests/unit/test-coroutine.c | 1 - 3 files changed, 3 insertions(+), 2 deletions(-) diff --git

Re: [PATCH 2/2] log: remove unneeded new line

2023-01-19 Thread Philippe Mathieu-Daudé
On 19/1/23 22:40, BALATON Zoltan wrote: The help text of the -d plugin option has a new line at the end which is not needed as one is added automatically. Fixing it removes the unexpected empty line in -d help output. Signed-off-by: BALATON Zoltan --- util/log.c | 2 +- 1 file changed, 1 ins

[PULL 00/12] Header cleanup patches for 2023-01-20

2023-01-19 Thread Markus Armbruster
The following changes since commit 7ec8aeb6048018680c06fb9205c01ca6bda08846: Merge tag 'pull-tpm-2023-01-17-1' of https://github.com/stefanberger/qemu-tpm into staging (2023-01-17 15:47:53 +) are available in the Git repository at: https://repo.or.cz/qemu/armbru.git tags/pull-include-20

Re: [PATCH] mac_nvram: Add block backend to persist NVRAM contents

2023-01-19 Thread Philippe Mathieu-Daudé
On 19/1/23 23:28, BALATON Zoltan wrote: Add a way to set a backing store for the mac_nvram similar to what spapr_nvram or mac_via PRAM already does to allow to save its contents between runs. Use -drive file=nvram.img,format=raw,if=mtd to specify backing file where nvram.img must be MACIO_NVRAM_S

Re: cxl nvdimm Potential probe ordering issues.

2023-01-19 Thread Gregory Price
On Thu, Jan 19, 2023 at 04:17:11PM +, Jonathan Cameron wrote: > > Whilst I still have no idea if this is the same problem, I have identified > what goes wrong if there is a module probe ordering issue. > https://elixir.bootlin.com/linux/v6.2-rc4/source/drivers/cxl/core/pmem.c#L306 > > /

Re: cxl nvdimm Potential probe ordering issues.

2023-01-19 Thread Gregory Price
On Thu, Jan 19, 2023 at 03:04:49PM +, Jonathan Cameron wrote: > Gregory, would you mind checking if > cxl_nvb is NULL here... > https://elixir.bootlin.com/linux/v6.2-rc4/source/drivers/cxl/pmem.c#L67 > (printk before it is used should work). > > Might also be worth checking cxl_nvd and cxl_ds

[PATCH 2/2] hw/i386/kvm/clock.c: read kvmclock from guest memory if !correct_tsc_shift

2023-01-19 Thread Marcelo Tosatti
Before kernel commit 78db6a5037965429c04d708281f35a6e5562d31b, kvm_guest_time_update() would use vcpu->virtual_tsc_khz to calculate tsc_shift value in the vcpus pvclock structure written to guest memory. For those kernels, if vcpu->virtual_tsc_khz != tsc_khz (which can be the case when guest state

[PATCH 1/2] linux-headers: sync KVM_CLOCK_CORRECT_TSC_SHIFT flag

2023-01-19 Thread Marcelo Tosatti
Sync new KVM_CLOCK_CORRECT_TSC_SHIFT from upstream Linux headers. Signed-off-by: Marcelo Tosatti Index: qemu/linux-headers/linux/kvm.h === --- qemu.orig/linux-headers/linux/kvm.h +++ qemu/linux-headers/linux/kvm.h @@ -1300,6 +1300,9

[PATCH 0/2] read kvmclock from guest memory if !correct_tsc_shift

2023-01-19 Thread Marcelo Tosatti
Before kernel commit 78db6a5037965429c04d708281f35a6e5562d31b, kvm_guest_time_update() would use vcpu->virtual_tsc_khz to calculate tsc_shift value in the vcpus pvclock structure written to guest memory. For those kernels, if vcpu->virtual_tsc_khz != tsc_khz (which can be the case when guest state

Re: [PATCH v3 3/7] hw/riscv/microchip_pfsoc.c: add an Icicle Kit fdt address function

2023-01-19 Thread Conor Dooley
Hey Daniel, Got through the stuff I wanted to get done tonight faster than expected... On Thu, Jan 19, 2023 at 05:17:33PM -0300, Daniel Henrique Barboza wrote: > Are you testing it by using the command line > you mentioned in the "qemu icicle kit es" thread? > > $(QEMU)/qemu-system-riscv64 \ >

Re: [PATCH] hw/riscv: Add support to change default RISCV hart memory region

2023-01-19 Thread Alistair Francis
On Sun, Dec 11, 2022 at 3:29 PM Vysakh P Pillai wrote: > > Add support to optionally specify a memory region container > to be used to override the default system memory used > by the the RISCV harts when they are realized. Additional > memory regions can be added as sub-regions of this container

Re: [PATCH v3 0/2] hw/usb: add configuration flags for emulated and passthru usb smartcard

2023-01-19 Thread Jon Maloy
On 2022-12-13 16:02, Stefan Hajnoczi wrote: On Mon, Dec 12, 2022 at 05:09:47PM -0500, Jon Maloy wrote: We add three new configuration flags, LIBCACARD, USB_SMARTCARD_PASSTHRU and USB_SMARTCARD_EMULATED in order to improve configurability of these functionalities. Signed-off-by: Jon Maloy -

Re: [PATCH v5 2/2] riscv: Allow user to set the satp mode

2023-01-19 Thread Alistair Francis
On Thu, Jan 19, 2023 at 11:00 PM Alexandre Ghiti wrote: > > Hi Alistair, Andrew, > > On Thu, Jan 19, 2023 at 1:25 AM Alistair Francis wrote: > > > > On Wed, Jan 18, 2023 at 10:19 PM Andrew Jones > > wrote: > > > > > > On Wed, Jan 18, 2023 at 10:28:46AM +1000, Alistair Francis wrote: > > > > On

Re: [PATCH 10/18] Update lcitool and fedora to 37

2023-01-19 Thread Paolo Bonzini
On 1/19/23 20:35, Philippe Mathieu-Daudé wrote: On 19/1/23 19:04, Alex Bennée wrote: From: Marc-André Lureau Fedora 35 is EOL. Update to upstream lcitool, that dropped f35 and added f37. If you also have time to update to commit 40589eed1c56f040d0f07fc354c242a0e0d83185 that would be nice (

Re: [PATCH v4 13/19] riscv: Clean up includes

2023-01-19 Thread Alistair Francis
On Thu, Jan 19, 2023 at 5:10 PM Markus Armbruster wrote: > > Clean up includes so that osdep.h is included first and headers > which it implies are not included manually. > > This commit was created with scripts/clean-includes. > > Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis

Re: [PATCH v10 0/9] KVM: mm: fd-based approach for supporting KVM

2023-01-19 Thread Isaku Yamahata
On Thu, Jan 19, 2023 at 03:25:08PM +, Sean Christopherson wrote: > On Thu, Jan 19, 2023, Isaku Yamahata wrote: > > On Sat, Jan 14, 2023 at 12:37:59AM +, > > Sean Christopherson wrote: > > > > > On Fri, Dec 02, 2022, Chao Peng wrote: > > > > This patch series implements KVM guest private

[PATCH] mac_nvram: Add block backend to persist NVRAM contents

2023-01-19 Thread BALATON Zoltan
Add a way to set a backing store for the mac_nvram similar to what spapr_nvram or mac_via PRAM already does to allow to save its contents between runs. Use -drive file=nvram.img,format=raw,if=mtd to specify backing file where nvram.img must be MACIO_NVRAM_SIZE which is 8192 bytes. It is only wired

Re: [RFC v4 3/3] hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)

2023-01-19 Thread Gregory Price
On Thu, Jan 19, 2023 at 05:31:12PM +, Jonathan Cameron wrote: > On Thu, 19 Jan 2023 12:15:45 -0500 > Gregory Price wrote: > > > Found a bug, not sure how we missed this, probably happed with rebasing > > and some fixups. We're presently reporting the volatile region as > > non-volatile, 1 lin

RE: [PATCH v4 12/19] target/hexagon: Clean up includes

2023-01-19 Thread Taylor Simpson
> -Original Message- > From: Markus Armbruster > Sent: Thursday, January 19, 2023 1:00 AM > To: qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; pbonz...@redhat.com; > kw...@redhat.com; hre...@redhat.com; i...@bsdimp.com; > kev...@freebsd.org; berra...@redhat.com; gr...@kaod.or

Re: [RFC] 2-stage translation emulation support for SMMUv3 on TCG

2023-01-19 Thread Evgeny Iakovlev
On 1/17/2023 18:00, Eric Auger wrote: Hi Evgeny, On 1/16/23 16:37, Evgeny Iakovlev wrote: Hi! We are using qemu-tcg-aarch64 to run Hyper-V test and debug builds for arm. Besides some minor fixes that i have submitted over the last couple of weeks, one big compatibility item for us is SMMUv3

Re: [PATCH v2 1/2] target/arm: implement DBGCLAIM registers

2023-01-19 Thread Evgeny Iakovlev
On 1/17/2023 16:48, Richard Henderson wrote: On 1/17/23 05:04, Evgeny Iakovlev wrote: +    { .name = "DBGCLAIMCLR_EL1", .state = ARM_CP_STATE_BOTH, +  .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 7, .crm = 9, .opc2 = 6, +  .access = PL1_RW, .accessfn = access_tda, +  .writefn = dbgclaimc

Re: [PATCH v2 1/4] hw/char/pl011: refactor FIFO depth handling code

2023-01-19 Thread Evgeny Iakovlev
On 1/19/2023 14:45, Peter Maydell wrote: On Tue, 17 Jan 2023 at 22:05, Evgeny Iakovlev wrote: PL011 can be in either of 2 modes depending guest config: FIFO and single register. The last mode could be viewed as a 1-element-deep FIFO. Current code open-codes a bunch of depth-dependent logic.

Re: [PATCH v2 3/4] hw/char/pl011: better handling of FIFO flags on LCR reset

2023-01-19 Thread Evgeny Iakovlev
On 1/19/2023 14:30, Peter Maydell wrote: On Tue, 17 Jan 2023 at 22:05, Evgeny Iakovlev wrote: Current FIFO handling code does not reset RXFE/RXFF flags when guest resets FIFO by writing to UARTLCR register, although internal FIFO state is reset to 0 read count. Actual guest-visible flag updat

Re: [PATCH v2 2/4] hw/char/pl011: implement a reset method

2023-01-19 Thread Evgeny Iakovlev
On 1/19/2023 14:27, Peter Maydell wrote: On Tue, 17 Jan 2023 at 22:05, Evgeny Iakovlev wrote: PL011 currently lacks a reset method. Implement it. Signed-off-by: Evgeny Iakovlev --- hw/char/pl011.c | 31 ++- 1 file changed, 26 insertions(+), 5 deletions(-) dif

Re: [RFC PATCH v4 15/15] arm/Kconfig: Do not build TCG-only boards on a KVM-only build

2023-01-19 Thread Fabiano Rosas
Philippe Mathieu-Daudé writes: > On 19/1/23 19:50, Richard Henderson wrote: >> On 1/19/23 03:54, Fabiano Rosas wrote: >>> Move all the CONFIG_FOO=y from default.mak into "default y if TCG" >>> statements in Kconfig. That way they won't be selected when >>> CONFIG_TCG=n. >>> >>> I'm leaving CONFIG

[PATCH] virtio-scsi: reset SCSI devices from main loop thread

2023-01-19 Thread Stefan Hajnoczi
When an IOThread is configured, the ctrl virtqueue is processed in the IOThread. TMFs that reset SCSI devices are currently called directly from the IOThread and trigger an assertion failure in blk_drain(): ../block/block-backend.c:1780: void blk_drain(BlockBackend *): Assertion `qemu_in_main_t

[PATCH 2/2] log: remove unneeded new line

2023-01-19 Thread BALATON Zoltan
The help text of the -d plugin option has a new line at the end which is not needed as one is added automatically. Fixing it removes the unexpected empty line in -d help output. Signed-off-by: BALATON Zoltan --- util/log.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/

[PATCH 1/2] log: Add separate debug option for logging invalid memory accesses

2023-01-19 Thread BALATON Zoltan
Currently -d guest_errors enables logging of different invalid actions by the guest such as misusing hardware, accessing missing features or invalid memory areas. The memory access logging can be quite verbose which obscures the other messages enabled by this debug switch so separate it by adding a

Re: [RFC PATCH v4 14/15] arm/Kconfig: Always select SEMIHOSTING when TCG is present

2023-01-19 Thread Fabiano Rosas
Philippe Mathieu-Daudé writes: > On 19/1/23 19:50, Richard Henderson wrote: >> On 1/19/23 03:54, Fabiano Rosas wrote: >>> We are about to enable the build without TCG, so CONFIG_SEMIHOSTING >>> and CONFIG_ARM_COMPATIBLE_SEMIHOSTING cannot be unconditionally set in >>> default.mak anymore. So refl

[PATCH v9 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()

2023-01-19 Thread Daniel Henrique Barboza
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing the same steps when '-kernel' is used: - execute load_kernel() - load init_rd() - write kernel_cmdline Let's fold everything inside riscv_load_kernel() to avoid code repetition. To not change the behavior of boards that aren'

[PATCH v9 0/3] hw/riscv: clear kernel_entry high bits with 32bit CPUs

2023-01-19 Thread Daniel Henrique Barboza
Hi, In this version I changed the patch order to avoid having a patch that would trigger the 32 bit regression Alistair observed. Patch 3 is now the first patch. I've also addressed the comments from Bin and Phil. Patches based on riscv-to-apply.next. Changes from v8: - patch 1 (former 3): -

[PATCH v9 1/3] hw/riscv: clear kernel_entry higher bits from load_elf_ram_sym()

2023-01-19 Thread Daniel Henrique Barboza
load_elf_ram_sym() will sign-extend 32 bit addresses. If a 32 bit QEMU guest happens to be running in a hypervisor that are using 64 bits to encode its address, kernel_entry can be padded with '1's and create problems [1]. Use a translate_fn() callback to be called by load_elf_ram_sym() and return

[PATCH v9 3/3] hw/riscv/boot.c: make riscv_load_initrd() static

2023-01-19 Thread Daniel Henrique Barboza
The only remaining caller is riscv_load_kernel_and_initrd() which belongs to the same file. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng Reviewed-by: Alistair Francis --- hw/riscv/boot.c | 80 -

Re: [PATCH] hw/misc: Add basic Aspeed GFX model

2023-01-19 Thread Andrew Jeffery
On Thu, 19 Jan 2023, at 23:14, Joel Stanley wrote: > Enough model to capture the pinmux writes to enable correct operation of > the parts of pinmux that depend on GFX registers. > > Signed-off-by: Joel Stanley > --- > include/hw/arm/aspeed_soc.h | 3 + > include/hw/misc/aspeed_gfx.h | 31 +

Re: [PATCH v2 11/11] tests/qtest/migration-test: Only use available accelerators

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: For example, avoid when TCG is disabled: $ make check-qtest-aarch64 ... 20/20 qemu:qtest+qtest-aarch64 / qtest-aarch64/migration-test qemu-system-aarch64: -accel tcg: invalid accelerator tcg Reviewed-by: Dr. David Alan Gilbert Signed-o

Re: [PATCH v2 10/11] tests/qtest/migration-test: Build command line using GString API (4/4)

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 4/4: Convert rest of options. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 50 +++- 1 file changed, 26 insertions(+), 24 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 09/11] tests/qtest/migration-test: Build command line using GString API (3/4)

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 3/4: Convert accelerator options. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-t

Re: [PATCH v2 08/11] tests/qtest/migration-test: Build command line using GString API (2/4)

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 2/4: Convert shmem option. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 16 +--- 1 file changed, 5 insertions(+), 11 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 1/2] Revert "vhost-user: Monitor slave channel in vhost_user_read()"

2023-01-19 Thread Stefan Hajnoczi
Acked-by: Stefan Hajnoczi

Re: [PATCH v2 07/11] tests/qtest/migration-test: Build command line using GString API (1/4)

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Part 1/4: Convert memory & machine options. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/tests/qtest/migration-test.c b/tests

Re: [PATCH v2 06/11] tests/qtest/migration-test: Reduce 'cmd_source' string scope

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 29 +++-- 1 file changed, 15 insertions(+), 14 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 05/11] tests/qtest/migration-test: Inverse #ifdef'ry ladders

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: This slighly simplify the logic, and eases the following conversion. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/migration-test.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 04/11] tests/qtest/boot-serial-test: Only use available accelerators

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: For example, avoid when TCG is disabled: $ make check-qtest-aarch64 ... 18/20 qemu:qtest+qtest-aarch64 / qtest-aarch64/boot-serial-test qemu-system-aarch64: -accel tcg: invalid accelerator tcg Signed-off-by: Philippe Mathieu-Daudé ---

Re: [PATCH v2 03/11] tests/qtest/boot-serial-test: Build command line using GString API

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/boot-serial-test.c | 23 +++ 1 file changed, 15 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 02/11] tests/qtest/boot-serial-test: Simplify test_machine() a bit

2023-01-19 Thread Richard Henderson
On 1/19/23 04:58, Philippe Mathieu-Daudé wrote: Slighly modify test_machine() to simplify next commit review. Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/boot-serial-test.c | 21 +++-- 1 file changed, 7 insertions(+), 14 deletions(-) Reviewed-by: Richard Henderson

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