With MQ enabled vdpa device and non-MQ supporting guest e.g.
booting vdpa with mq=on over OVMF of single vqp, it's easy
to hit assert failure as the following:
../hw/virtio/vhost-vdpa.c:560: vhost_vdpa_get_vq_index: Assertion `idx >=
dev->vq_index && idx < dev->vq_index + dev->nvqs' failed.
0 0
On 2022/03/19 1:14, Philippe Mathieu-Daudé wrote:
Commit 29cf16db23 says:
Since commits 0979ed017f0 ("meson: rename .inc.h files to .h.inc")
and 139c1837db7 ("meson: rename included C source files to .c.inc")
'git-diff --function-context' stopped displaying C function context
correctly.
So I s
On Fri, Mar 18, 2022 at 8:53 AM Hanna Reitz wrote:
>
> Commit e3296cc796aeaf319f3ed4e064ec309baf5e4da4 made the ssh block
> driver's error message for fingerprint mismatches more verbose, so it
> now prints the actual host key fingerprint and the key type.
>
> iotest 207 tests such errors, but was
On Fri, Mar 18, 2022 at 8:53 AM Hanna Reitz wrote:
>
> Allow filters for VM.run_job(), and pass the filters given to
> VM.blockdev_create() to it.
>
> (Use this opportunity to annotate VM.run_job()'s parameter types;
> unfortunately, for the filter, I could not come up with anything better
> than
On Fri, Mar 18, 2022 at 9:36 AM Hanna Reitz wrote:
>
> On 18.03.22 00:49, John Snow wrote:
> > Hiya!
> >
> > This series effectively replaces qemu_img_pipe_and_status() with a
> > rewritten function named qemu_img() that raises an exception on non-zero
> > return code by default. By the end of the
>> You can play with this if you want. It's on 'submit/green-threads' on
>> my github. Be warned that I rebase a lot.
Stefan> This looks cool! Would it be useful to see a port of QEMU's coroutine.py
Stefan> script to your green threads API?
Wouldn't hurt :)
Stefan> QEMU's coroutines aren't in
From: Yueh-Ting (eop) Chen
According to v-spec (section 7.9):
The instructions operate with an effective vector length, evl=NFIELDS*VLEN/EEW,
regardless of current settings in vtype and vl. The usual property that no
elements are written if vstart ≥ vl does not apply to these instructions.
Instea
On Fri, Mar 18, 2022 at 03:06:08PM +, Jonathan Cameron wrote:
> From: Ben Widawsky
>
> GET_FW_INFO and GET_PARTITION_INFO, for this emulation, is equivalent to
> info already returned in the IDENTIFY command. To have a more robust
> implementation, add those.
>
> Signed-off-by: Ben Widawsky
Hello,
I remember this PR. It was a long time ago. I'll take a look at it and
propose a fix.
Thanks,
Ahmed
On Fri, 18 Mar 2022 at 19:25, Thomas Huth wrote:
> On 20/06/2021 19.54, Ahmed Abouzied wrote:
> > Replaces TABs with spaces, making sure to have a consistent coding style
> > of 4 space i
(Merge into prior patch.)
Signed-off-by: John Snow
---
tests/qemu-iotests/030 | 85 --
1 file changed, 49 insertions(+), 36 deletions(-)
diff --git a/tests/qemu-iotests/030 b/tests/qemu-iotests/030
index 567bf1da67..3a2de920a3 100755
--- a/tests/qemu-iote
Just like qemu_img_log(), upgrade qemu_io_log() to enforce a return code
of zero by default.
Affected tests: 242 245 255 274 303 307 nbd-reconnect-on-open
Signed-off-by: John Snow
---
tests/qemu-iotests/iotests.py | 5 +++--
tests/qemu-iotests/tests/nbd-reconnect-on-open | 2 +-
I know we just added it, sorry. This is done in favor of qemu_io() which
*also* returns the console output and status, but with more robust error
handling on failure.
Signed-off-by: John Snow
---
tests/qemu-iotests/iotests.py | 3 ---
tests/qemu-iotests/tests/image-fleecing | 12 +++--
(Merge with prior patch.)
Signed-off-by: John Snow
---
tests/qemu-iotests/242 | 2 +-
tests/qemu-iotests/245 | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/242 b/tests/qemu-iotests/242
index 4b7ec16af6..ecc851582a 100755
--- a/tests/qemu-iotests/242
+++
reimplement qemu_img() in terms of qemu_tool() in preparation for doing
the same with qemu_io().
Signed-off-by: John Snow
---
tests/qemu-iotests/iotests.py | 37 +++
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/tests/qemu-iotests/iotests.py b/te
(Merge into prior patch.)
Notes: I don't quite like this change, but I'm at a loss for what would
be cleaner. This is a funky test.
Signed-off-by: John Snow
---
tests/qemu-iotests/149 | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/149 b/tests/qemu-i
This makes these callsites a little simpler, but the real motivation is
a forthcoming commit will change the return type of qemu_io(), so removing
users of the return value now is helpful.
Signed-off-by: John Snow
---
tests/qemu-iotests/242 | 2 +-
tests/qemu-iotests/255 | 4 +---
tests/qemu-iot
Like qemu-img, qemu-io returning 0 should be the norm and not the
exception. Remove all calls to qemu_io_silent that just assert the
return code is zero (That's every last call, as it turns out), and
replace them with a normal qemu_io() call.
Signed-off-by: John Snow
---
tests/qemu-iotests/216
Modify this test to use assertRaises for its negative testing of
qemu_io. If the exception raised does not match the one we tell it to
expect, we get *that* exception unhandled. If we get no exception, we
get a unittest assertion failure and the provided emsg printed to
screen.
If we get the Calle
(Merge into prior patch.)
Signed-off-by: John Snow
---
tests/qemu-iotests/205 | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/205 b/tests/qemu-iotests/205
index c0e107328f..15f798288a 100755
--- a/tests/qemu-iotests/205
+++ b/tests/qemu-iotests/205
@@ -
qemu-io fails on read/write with zero-length raw images, so skip these
when running the zero-length image tests.
Signed-off-by: John Snow
---
tests/qemu-iotests/040 | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040
Howdy,
This series does for qemu_io() what we've done for qemu_img() and makes
this a function that checks the return code by default and raises an
Exception when things do not go according to plan.
This series removes qemu_io_pipe_and_status(), qemu_io_silent(), and
qemu_io_silent_check() in fav
(Merge into prior commit)
Note, this is a quick hack band-aid, but a follow-up patch spends the
time to refactor it a bit. This is just the quick stop-gap to prevent
bisection failures.
Signed-off-by: John Snow
---
tests/qemu-iotests/tests/migration-permissions | 4 ++--
1 file changed, 2 inser
Rework qemu_io() to be analogous to qemu_img(); a function that requires
a return code of zero by default unless disabled explicitly.
Tests that use qemu_io():
030 040 041 044 055 056 093 124 129 132 136 148 149 151 152 163 165 205
209 219 236 245 248 254 255 257 260 264 280 298 300 302 304
image-
The 'read' commands to qemu-io were malformed, and this invocation only
worked by coincidence because the error messages were identical. Oops.
There's no point in checking the patterning of the reference image, so
just check the empty image by itself instead.
(Note: as of this commit, nothing act
A forthcoming commit updates qemu_io() to raise an exception on non-zero
return by default, and changes its return type.
In preparation, simplify some calls to qemu_io() that assert that
specific error message strings do not appear in qemu-io's
output. Asserting that all of these calls return a st
Am 18.03.22 um 16:26 schrieb Paolo Bonzini:
KVM support for AMX includes a new system attribute, KVM_X86_XCOMP_GUEST_SUPP.
Commit 19db68ca68 ("x86: Grant AMX permission for guest", 2022-03-15) however
did not fully consider the behavior on older kernels. First, it warns
too aggressively. Second
On 3/18/22 00:43, David Gibson wrote:
On Thu, Mar 17, 2022 at 04:29:14PM +, Dr. David Alan Gilbert wrote:
* Peter Maydell (peter.mayd...@linaro.org) wrote:
On Thu, 17 Mar 2022 at 14:03, Daniel Henrique Barboza
wrote:
I've been looking into converting some vmstate_register() calls to us
From: Łukasz Gieryk
PCI device capable of SR-IOV support is a new, still-experimental
feature with only a single working example of the Nvme device.
This patch in an attempt to fix a double-free problem when a
SR-IOV-capable Nvme device is hot-unplugged. The problem and the
reproduction steps ca
From: Łukasz Gieryk
This patch updates the initialization place for the AER queue, so it’s
initialized once, at controller initialization, and not every time
controller is enabled.
While the original version works for a non-SR-IOV device, as it’s hard
to interact with the controller if it’s not
From: Łukasz Gieryk
An NVMe device with SR-IOV capability calculates the BAR size
differently for PF and VF, so it makes sense to extract the common code
to a separate function.
Signed-off-by: Łukasz Gieryk
Reviewed-by: Klaus Jensen
---
hw/nvme/ctrl.c | 45 +++-
Implementation of Primary Controller Capabilities data
structure (Identify command with CNS value of 14h).
Currently, the command returns only ID of a primary controller.
Handling of remaining fields are added in subsequent patches
implementing virtualization enhancements.
Signed-off-by: Lukasz M
From: Łukasz Gieryk
With the new command one can:
- assign flexible resources (queues, interrupts) to primary and
secondary controllers,
- toggle the online/offline state of given controller.
Signed-off-by: Łukasz Gieryk
---
hw/nvme/ctrl.c | 257 +
From: Łukasz Gieryk
The n->reg_size parameter unnecessarily splits the BAR0 size calculation
in two phases; removed to simplify the code.
With all the calculations done in one place, it seems the pow2ceil,
applied originally to reg_size, is unnecessary. The rounding should
happen as the last ste
This patch implements initial support for Single Root I/O Virtualization
on an NVMe device.
Essentially, it allows to define the maximum number of virtual functions
supported by the NVMe controller via sriov_max_vfs parameter.
Passing a non-zero value to sriov_max_vfs triggers reporting of SR-IOV
Signed-off-by: Lukasz Maniak
---
docs/system/devices/nvme.rst | 82
1 file changed, 82 insertions(+)
diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst
index b5acb2a9c19..aba253304e4 100644
--- a/docs/system/devices/nvme.rst
+++ b/docs/s
From: Łukasz Gieryk
This patch implements the Function Level Reset, a feature currently not
implemented for the Nvme device, while listed as a mandatory ("shall")
in the 1.4 spec.
The implementation reuses FLR-related building blocks defined for the
pci-bridge module, and follows the same logic:
From: Łukasz Gieryk
With four new properties:
- sriov_v{i,q}_flexible,
- sriov_max_v{i,q}_per_vf,
one can configure the number of available flexible resources, as well as
the limits. The primary and secondary controller capability structures
are initialized accordingly.
Since the number of ava
From: Łukasz Gieryk
The NVMe device defines two properties: max_ioqpairs, msix_qsize. Having
them as constants is problematic for SR-IOV support.
SR-IOV introduces virtual resources (queues, interrupts) that can be
assigned to PF and its dependent VFs. Each device, following a reset,
should work
Resubmitting v6 as v7 since Patchew got lost with my sophisticated CC of
all maintainers just for the cover letter.
Changes since v5:
- Fixed PCI hotplug issue related to deleting VF twice
- Corrected error messages for SR-IOV parameters
- Rebased on master, patches for PCI got pulled into the tre
Introduce handling for Secondary Controller List (Identify command with
CNS value of 15h).
Secondary controller ids are unique in the subsystem, hence they are
reserved by it upon initialization of the primary controller to the
number of sriov_max_vfs.
ID reservation requires the addition of an i
On 18/12/2021 17.09, Philippe Mathieu-Daudé wrote:
Include the qtest reproducer provided by Alexander Bulekov
in https://gitlab.com/qemu-project/qemu/-/issues/542.
Without the previous commit, we get:
$ make check-qtest-i386
...
Running test tests/qtest/intel-hda-test
AddressSanitize
On 18/12/2021 17.09, Philippe Mathieu-Daudé wrote:
Issue #542 reports a reentrancy problem when the DMA engine accesses
the HDA controller I/O registers. Fix by restricting the DMA engine
to memories regions (forbidding MMIO devices such the HDA controller).
Reported-by: OSS-Fuzz (Issue 28435)
R
Signed-off-by: Lukasz Maniak
---
docs/system/devices/nvme.rst | 82
1 file changed, 82 insertions(+)
diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst
index b5acb2a9c19..aba253304e4 100644
--- a/docs/system/devices/nvme.rst
+++ b/docs/s
From: Łukasz Gieryk
With the new command one can:
- assign flexible resources (queues, interrupts) to primary and
secondary controllers,
- toggle the online/offline state of given controller.
Signed-off-by: Łukasz Gieryk
---
hw/nvme/ctrl.c | 257 +
From: Łukasz Gieryk
An NVMe device with SR-IOV capability calculates the BAR size
differently for PF and VF, so it makes sense to extract the common code
to a separate function.
Signed-off-by: Łukasz Gieryk
Reviewed-by: Klaus Jensen
---
hw/nvme/ctrl.c | 45 +++-
From: Łukasz Gieryk
PCI device capable of SR-IOV support is a new, still-experimental
feature with only a single working example of the Nvme device.
This patch in an attempt to fix a double-free problem when a
SR-IOV-capable Nvme device is hot-unplugged. The problem and the
reproduction steps ca
From: Łukasz Gieryk
With four new properties:
- sriov_v{i,q}_flexible,
- sriov_max_v{i,q}_per_vf,
one can configure the number of available flexible resources, as well as
the limits. The primary and secondary controller capability structures
are initialized accordingly.
Since the number of ava
From: Łukasz Gieryk
This patch updates the initialization place for the AER queue, so it’s
initialized once, at controller initialization, and not every time
controller is enabled.
While the original version works for a non-SR-IOV device, as it’s hard
to interact with the controller if it’s not
Implementation of Primary Controller Capabilities data
structure (Identify command with CNS value of 14h).
Currently, the command returns only ID of a primary controller.
Handling of remaining fields are added in subsequent patches
implementing virtualization enhancements.
Signed-off-by: Lukasz M
From: Łukasz Gieryk
The n->reg_size parameter unnecessarily splits the BAR0 size calculation
in two phases; removed to simplify the code.
With all the calculations done in one place, it seems the pow2ceil,
applied originally to reg_size, is unnecessary. The rounding should
happen as the last ste
From: Łukasz Gieryk
This patch implements the Function Level Reset, a feature currently not
implemented for the Nvme device, while listed as a mandatory ("shall")
in the 1.4 spec.
The implementation reuses FLR-related building blocks defined for the
pci-bridge module, and follows the same logic:
Introduce handling for Secondary Controller List (Identify command with
CNS value of 15h).
Secondary controller ids are unique in the subsystem, hence they are
reserved by it upon initialization of the primary controller to the
number of sriov_max_vfs.
ID reservation requires the addition of an i
From: Łukasz Gieryk
The NVMe device defines two properties: max_ioqpairs, msix_qsize. Having
them as constants is problematic for SR-IOV support.
SR-IOV introduces virtual resources (queues, interrupts) that can be
assigned to PF and its dependent VFs. Each device, following a reset,
should work
This patch implements initial support for Single Root I/O Virtualization
on an NVMe device.
Essentially, it allows to define the maximum number of virtual functions
supported by the NVMe controller via sriov_max_vfs parameter.
Passing a non-zero value to sriov_max_vfs triggers reporting of SR-IOV
Changes since v5:
- Fixed PCI hotplug issue related to deleting VF twice
- Corrected error messages for SR-IOV parameters
- Rebased on master, patches for PCI got pulled into the tree
- Added Reviewed-by labels
Lukasz Maniak (4):
hw/nvme: Add support for SR-IOV
hw/nvme: Add support for Primary
On 10/03/2022 18.53, Jon Maloy wrote:
On 3/10/22 12:14, Thomas Huth wrote:
On 06/02/2022 20.19, Jon Maloy wrote:
Trying again with correct email address.
///jon
On 2/6/22 14:15, Jon Maloy wrote:
On 1/27/22 15:14, Jon Maloy wrote:
On 11/18/21 06:57, Philippe Mathieu-Daudé wrote:
Trivial
On 15/12/2021 21.56, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
The issue reported by OSS-Fuzz produces the following backtrace:
==447470==ERROR: AddressSanitizer: heap-buffer-overflow
READ of size 1 at 0x6152a080 thread T0
#0 0x71766d47 in sdhci_read_dataport
On 18/3/22 18:30, Peter Maydell wrote:
We have about 25 instances of the typo/variant spelling 'writeable',
and over 500 of the more common 'writable'. Standardize on the
latter.
Amusingly I was looking yesterday at the difference between both.
Reviewed-by: Philippe Mathieu-Daudé
Change pr
On 15/12/2021 21.56, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
DMA transactions might fail. The DMA API returns a MemTxResult,
indicating such failures. Do not ignore it. On failure, raise
the ADMA error flag and eventually triggering an IRQ (see spec
chapter 1.13.5: "ADMA2 Sta
On Fri, Mar 18, 2022 at 12:32 PM Hanna Reitz wrote:
>
> On 08.02.22 20:52, John Snow wrote:
> > Squeak Squeak...
> >
> > ...Any objections to me staging this?
> >
> > (This patchset removes the accommodations in iotests for allowing
> > either library to run and always forces the new one. Point of
The only remaining caller of this function is the initialization of
drc->index in spapr_dr_connector_new().
Open code the body of the function inside spapr_dr_connector_new() and
remove spapr_drc_index().
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_drc.c | 23 ++-
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_events.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c
index 630e86282c..d41f4e47c0 100644
--- a/hw/ppc/spapr_events.c
+++ b/hw/ppc/spapr_events.c
@@ -675,7 +675,7 @@ vo
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 953fc65fa8..6aab04787d 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -419,7 +419,7 @@ static int spapr_dt_d
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_pci.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 5bfd4aa9e5..f9338af071 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1419,8 +1419,7 @@ static int spa
After this patch, the only place where spapr_drc_index() is still being
used in this file is in the drc->index initialization.
We can't get rid of spapr_drc_index() yet because of external callers.
We'll handle them next.
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_drc.c | 15 ++
On 18/03/2022 18.04, Hanna Reitz wrote:
On 10.03.22 08:50, Thomas Huth wrote:
If there is a failing iotest, the output is currently not logged to
the console anymore. To get this working again, we need to run the
meson test runner with "--print-errorlogs" (and without "--verbose"
due to a curren
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_nvdimm.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
index c4c97da5de..5acb761220 100644
--- a/hw/ppc/spapr_nvdimm.c
+++ b/hw/ppc/spapr_nvdimm.c
@@ -145,7 +145,
All the trace calls in the file are using spapr_drc_index(). Let's
convert them to use drc->index.
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_drc.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_
The DRC index is an unique identifier that is used across all spapr
code. Its value is given by spapr_drc_index() as follows:
return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
| (drc->id & DRC_INDEX_ID_MASK);
We see that there is nothing that varies with the machine/device state
on spa
'index' is defined as an uint32 retrieved by prop_get_index(). Change it
to instead return the value of drc->index the same way it's done with
the 'id' property that returns drc->id.
Signed-off-by: Daniel Henrique Barboza
---
hw/ppc/spapr_drc.c | 12 ++--
1 file changed, 2 insertions(+),
Hi,
I decided to make this change after realizing that (1) spapr_drc_index()
always return the same index value for the DRC regardless of machine or
device state and (2) we call spapr_drc_index() a lot throughout the
spapr code.
This means that a new attribute to store the generated index in the
We have about 25 instances of the typo/variant spelling 'writeable',
and over 500 of the more common 'writable'. Standardize on the
latter.
Change produced with:
sed -i -e 's/writeable/writable/g' $(git grep -l writeable)
and then hand-undoing the instance in linux-headers/linux/kvm.h.
All th
On Thu, Mar 17, 2022 at 09:59:10PM +0800,
Xiaoyao Li wrote:
> For TDs, only MSR_IA32_UCODE_REV in kvm_init_msrs() can be configured
> by VMM, while the features enumerated/controlled by other MSRs except
> MSR_IA32_UCODE_REV in kvm_init_msrs() are not under control of VMM.
>
> Only configure MSR
On 20/06/2021 19.54, Ahmed Abouzied wrote:
Replaces TABs with spaces, making sure to have a consistent coding style
of 4 space indentations in the SH4 subsystem.
Signed-off-by: Ahmed Abouzied
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/376
---
...
@@ -1705,101 +1705,101 @@ static
On Thu, Mar 17, 2022 at 09:58:55PM +0800,
Xiaoyao Li wrote:
> diff --git a/hw/i386/tdvf.c b/hw/i386/tdvf.c
> new file mode 100644
> index ..02da1d2c12dd
> --- /dev/null
> +++ b/hw/i386/tdvf.c
> @@ -0,0 +1,196 @@
> +/*
> + * SPDX-License-Identifier: GPL-2.0-or-later
> +
> + * Copyright
On Thu, 10 Mar 2022 17:11:14 +
Peter Maydell wrote:
> On Thu, 10 Mar 2022 at 16:30, Igor Mammedov wrote:
> >
> > Do On Thu, 10 Mar 2022 16:05:24 +
> > Peter Maydell wrote:
> >
> > > On Thu, 10 Mar 2022 at 15:36, Igor Mammedov wrote:
> > > >
> > > > On Wed, 9 Mar 2022 16:56:21 +
On Thu, Mar 17, 2022 at 09:58:53PM +0800,
Xiaoyao Li wrote:
> TDX only supports readonly for shared memory but not for private memory.
>
> In the view of QEMU, it has no idea whether a memslot is used by shared
> memory of private. Thus just mark kvm_readonly_mem_enabled to false to
> TDX VM for
On 3/18/2022 11:32 AM, Philippe Mathieu-Daudé wrote:
On 18/3/22 16:15, Mark Kanda wrote:
vCPU hotunplug related leak reported by Valgrind:
==132362== 4,096 bytes in 1 blocks are definitely lost in loss record 8,440
of 8,549
==132362== at 0x4C3B15F: memalign (vg_replace_malloc.c:1265)
==132
On 10.03.22 08:50, Thomas Huth wrote:
If there is a failing iotest, the output is currently not logged to
the console anymore. To get this working again, we need to run the
meson test runner with "--print-errorlogs" (and without "--verbose"
due to a current meson bug that will be fixed here:
http
On 3/18/2022 11:26 AM, Philippe Mathieu-Daudé wrote:
On 18/3/22 16:15, Mark Kanda wrote:
vCPU hotunplug related leak reported by Valgrind:
==132362== 216 bytes in 1 blocks are definitely lost in loss record 7,119 of
8,549
==132362== at 0x4C3ADBB: calloc (vg_replace_malloc.c:1117)
==132362=
On Thu, Mar 17, 2022 at 09:58:46PM +0800,
Xiaoyao Li wrote:
> Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent
> work prior to create any vcpu. This is for i386 TDX because it needs
> call TDX_INIT_VM before creating any vcpu.
>
> Signed-off-by: Xiaoyao Li
> ---
> accel/kvm/kvm-
On Thu, Mar 17, 2022 at 09:58:45PM +0800,
Xiaoyao Li wrote:
> For TDX, the allowable CPUID configuration differs from what KVM
> reports for KVM scope via KVM_GET_SUPPORTED_CPUID.
>
> - Some CPUID bits are not supported for TDX VM while KVM reports the
> support. Mask them off for TDX VM. e.g.
On Fri, Mar 18, 2022 at 04:48:18PM +0100, Peter Lieven wrote:
Am 18.03.2022 um 09:25 schrieb Stefano Garzarella :
On Thu, Mar 17, 2022 at 07:27:05PM +0100, Peter Lieven wrote:
Am 17.03.2022 um 17:26 schrieb Stefano Garzarella :
Commit d24f80234b ("block/rbd: increase dynamically the i
On 09.03.22 11:16, Thomas Huth wrote:
These two spots have been missed in commit 9086c7639822 ("Rework the
checks and spots using GNU sed") - they need GNU sed, too, since they
are using the "+" address form.
Signed-off-by: Thomas Huth
---
tests/qemu-iotests/common.filter | 4 ++--
1 file ch
On 18.03.22 16:08, John Snow wrote:
On Fri, Mar 18, 2022, 9:36 AM Hanna Reitz wrote:
On 18.03.22 00:49, John Snow wrote:
> Hiya!
>
> This series effectively replaces qemu_img_pipe_and_status() with a
> rewritten function named qemu_img() that raises an exception on
non
Hi,
On 3/18/22 5:18 PM, Philippe Mathieu-Daudé wrote:
> On 18/3/22 16:01, Eric Auger wrote:
>> The CRB command buffer currently is a RAM MemoryRegion and given
>> its base address alignment, it causes an error report on
>> vfio_listener_region_add(). This region could have been a RAM device
>> reg
On 08.02.22 20:52, John Snow wrote:
Squeak Squeak...
...Any objections to me staging this?
(This patchset removes the accommodations in iotests for allowing
either library to run and always forces the new one. Point of no
return for iotests.)
I took this as “if I don’t reply, that’ll be reply
On 18/3/22 16:15, Mark Kanda wrote:
vCPU hotunplug related leak reported by Valgrind:
==132362== 4,096 bytes in 1 blocks are definitely lost in loss record 8,440 of
8,549
==132362==at 0x4C3B15F: memalign (vg_replace_malloc.c:1265)
==132362==by 0x4C3B288: posix_memalign (vg_replace_mallo
On 18/3/22 16:15, Mark Kanda wrote:
vCPU hotunplug related leak reported by Valgrind:
==132362== 216 bytes in 1 blocks are definitely lost in loss record 7,119 of
8,549
==132362==at 0x4C3ADBB: calloc (vg_replace_malloc.c:1117)
==132362==by 0x69EE4CD: g_malloc0 (in /usr/lib64/libglib-2.0
On 18/3/22 16:15, Mark Kanda wrote:
Add destroy_vcpu_thread() to AccelOps as a method for vcpu thread cleanup.
This will be used in subsequent patches.
Suggested-by: Philippe Mathieu-Daude
Thanks, but preferably:
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Mark Kanda
---
include
On 18/3/22 16:01, Eric Auger wrote:
The CRB command buffer currently is a RAM MemoryRegion and given
its base address alignment, it causes an error report on
vfio_listener_region_add(). This region could have been a RAM device
region, easing the detection of such safe situation but this option
wa
On Wed, 2022-03-16 at 15:55 +0100, Cornelia Huck wrote:
> Add 7.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
>
> Signed-off-by: Cornelia Huck
> ---
> hw/arm/virt.c | 9 -
> hw/core/machine.c | 3 +++
> hw/i386/pc.c | 3 +++
> hw/i386/pc_piix
On 18/3/22 15:42, Akihiko Odaki wrote:
I don't think this is needed. I could see a diff annotated with a method
name even without this change:
% git diff
diff --git a/ui/cocoa.m b/ui/cocoa.m
index cb6e7c41dc6..14a4416cc8b 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -1264,6 +1264,7 @@ - (id) init
> Am 18.03.2022 um 09:25 schrieb Stefano Garzarella :
>
> On Thu, Mar 17, 2022 at 07:27:05PM +0100, Peter Lieven wrote:
>>
>>
Am 17.03.2022 um 17:26 schrieb Stefano Garzarella :
>>>
>>> Commit d24f80234b ("block/rbd: increase dynamically the image size")
>>> added a workaround to supp
Tables that differ from normal Q35 tables when running the CXL test.
Signed-off-by: Jonathan Cameron
---
tests/data/acpi/q35/CEDT.cxl| Bin 0 -> 184 bytes
tests/data/acpi/q35/DSDT.cxl| Bin 0 -> 9615 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
3 fi
On 17.03.22 17:26, Stefano Garzarella wrote:
Commit d24f80234b ("block/rbd: increase dynamically the image size")
added a workaround to support growing images (eg. qcow2), resizing
the image before write operations that exceed the current size.
We recently added support for write zeroes and with
This adds code to instantiate the slightly extended ACPI root port
description in DSDT as per the CXL 2.0 specification.
Basically a cut and paste job from the i386/pc code.
Signed-off-by: Jonathan Cameron
Signed-off-by: Ben Widawsky
Reviewed-by: Alex Bennée
---
hw/arm/Kconfig | 1 +
Switches were already introduced, but now we support them update
the documentation to provide an example in diagram and
qemu command line parameter forms.
Signed-off-by: Jonathan Cameron
---
docs/system/devices/cxl.rst | 88 -
1 file changed, 86 insertions(+),
From: Ben Widawsky
The CEDT CXL Fixed Window Memory Window Structures (CFMWs)
define regions of the host phyiscal address map which
(via an impdef means) are configured such that they have
a particular interleave setup across one or more CXL Host Bridges.
Reported-by: Alison Schofield
Signed-of
Extend the walk of the CXL bus during interleave decoding to take
into account one layer of switches.
Whilst theoretically CXL 2.0 allows multiple switch levels, in the
vast majority of usecases only one level is expected and currently
that is all the proposed Linux support provides.
Signed-off-b
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