Signed-off-by: Cédric Le Goater
---
target/ppc/mmu-radix64.c | 55 +---
1 file changed, 52 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 5b0e62e676dc..abfa13f303bb 100644
--- a/target/ppc/mmu-radix64.c
+++
On 21/12/2021 20.32, Richard Henderson wrote:
On 12/21/21 2:32 AM, Thomas Huth wrote:
Using g_file_open_tmp is certainly better ... but the tests are currently
written in a way where they require the file name of the temporary file -
so switching to g_file_open_tmp() (which only provides a file
Philippe Mathieu-Daudé writes:
> Do not list vhost-user-blk in BlockExportType
> when CONFIG_VHOST_USER_BLK_SERVER is disabled.
>
> Fixes: 90fc91d50b7 ("convert vhost-user-blk server to block export API")
My immediate reaction was "what exactly is broken before this patch?"
I think it's introsp
On 12/20/21 19:18, Fabiano Rosas wrote:
We can just access it directly in powerpc_excp.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/excp_helper.c | 43
1 file changed, 21 insertions(+), 22 deletions(-)
Adding Nicholas.
On 12/20/21 19:18, Fabiano Rosas wrote:
Now that 'vector' is known before calling the interrupt-specific setup
code, we can move all of the scv setup into one place.
No functional change intended.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
On 12/20/21 19:18, Fabiano Rosas wrote:
There are currently only two interrupts that use alternate SRRs, so
let them write to them directly during the setup code.
No functional change intented.
intended.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
Adding Nicholas.
On 12/20/21 19:18, Fabiano Rosas wrote:
None of the interrupt setup code touches 'vector', so we can move it
earlier in the function. This will allow us to later move the System
Call Vectored setup that is on the top level into the
POWERPC_EXCP_SYSCALL_VECTORED code block.
This
On 12/18/21 15:51, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling st*_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/pci/pci.h
This is a small cleanup to ease reading.
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc.c | 42 +++---
1 file changed, 19 insertions(+), 23 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index cca99cb86f81..bb5bee9a3382 100644
--- a/hw/ppc/ppc.c
+++ b/
The PID SPR of the 405 CPU contains the translation ID of the TLB
which is a 8-bit field. Enforce the mask with a store helper.
Cc: Christophe Leroy
Signed-off-by: Cédric Le Goater
---
target/ppc/spr_tcg.h | 1 +
target/ppc/cpu_init.c | 2 +-
target/ppc/translate.c | 8
3 files chan
It facilitates reading the logs when mask CPU_LOG_INT is activated. We
should do the same for error codes.
Cc: Fabiano Rosas
Signed-off-by: Cédric Le Goater
---
target/ppc/excp_helper.c | 75 +++-
1 file changed, 74 insertions(+), 1 deletion(-)
diff --git a/
On 12/18/21 15:51, Philippe Mathieu-Daudé wrote:
dma_memory_write() returns a MemTxResult type. Do not discard
it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/sysemu/dma.h | 20 ++--
1 file ch
On 12/18/21 15:51, Philippe Mathieu-Daudé wrote:
dma_memory_read() returns a MemTxResult type. Do not discard
it, return it to the caller.
Good ! We should be using it in XIVE.
Update the few callers.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
The 405 timers were broken when booke support was added. Assumption
was made that the register numbers were the same but it's not :
SPR_BOOKE_TSR (0x150)
SPR_BOOKE_TCR (0x154)
SPR_40x_TSR (0x3D8)
SPR_40x_TCR (0x3DA)
Cc: Christophe Leroy
Fixes:
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 9ef9a1a5ddd5..8f6a58e82483 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -8689,6 +8689,17 @@ void ppc_
When scsalable mode is enabled, the passthrough more is not determined
by the context entry but PASID entry, so switch to use the logic of
vtd_dev_pt_enabled() to determine the passthrough mode in
vtd_do_iommu_translate().
Signed-off-by: Jason Wang
---
hw/i386/intel_iommu.c | 38
On 12/18/21 15:51, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling ld*_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/pci/pci.h
Hello,
The series starts with a couple of cleanups helpping debug. It then
adds back support for 405 timers which was broken 10 years ago.
Thanks,
C.
Cédric Le Goater (8):
target/ppc: Print out literal exception names in logs
ppc/ppc4xx: Convert printfs()
ppc/ppc405: Activate MMU logs
It's unused.
Signed-off-by: Cédric Le Goater
---
include/hw/pci-host/pnv_phb4.h | 2 --
hw/pci-host/pnv_phb4.c | 1 -
hw/pci-host/pnv_phb4_pec.c | 3 ---
3 files changed, 6 deletions(-)
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index 60de3031a622..
Use a QEMU log primitive for errors and trace events for debug.
Signed-off-by: Cédric Le Goater
---
hw/ppc/mpc8544_guts.c | 9 ++---
hw/ppc/ppc4xx_devs.c | 39 +++
hw/ppc/ppc4xx_pci.c | 11 +++
hw/ppc/trace-events | 5 +
4 files changed,
There is no need to deactivate MMU logging at compile time.
Signed-off-by: Cédric Le Goater
---
target/ppc/mmu_common.c | 4 ++--
target/ppc/mmu_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 4e278365ca55..c
This cleanups the PHB4 model a bit more since the root port is an
independent device and it will ease our task when adding user created
PHB4s.
Signed-off-by: Cédric Le Goater
---
include/hw/pci-host/pnv_phb4.h | 2 --
hw/pci-host/pnv_phb4.c | 11 ---
hw/ppc/pnv.c
The PHB4 reset handler was preparing ground for PHB5 to set
appropriately the device id. We don't need it for the PHB4 since the
device id is already set in the root port complex. PH5 will introduce
its own.
"device-id" property is now useless. It should be removed.
Signed-off-by: Cédric Le Goate
Hello,
There are the last cleanups preparing ground for PHBs created on the
command line and possibly libvirt support.
Thanks,
C.
Cédric Le Goater (5):
ppc/pnv: Change the maximum of PHB3 devices for Power8NVL
ppc/pnv: Remove PHB4 reset handler
ppc/pnv: Remove the PHB4 "device-id" propert
Timers are already initialized in ppc4xx_init(). No need to do it a
second time with a wrong set.
Fixes: d715ea961254 ("PPC: 405: Fix ppc405ep initialization")
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_uc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/
This cleanups the PHB3 model a bit more since the root port is an
independent device and it will ease our task when adding user created
PHB3s.
Signed-off-by: Cédric Le Goater
---
include/hw/pci-host/pnv_phb3.h | 2 --
hw/pci-host/pnv_phb3.c | 8
hw/ppc/pnv.c
The POWER8 processors with a NVLink logic unit have 4 PHB3 devices per
chip.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 29ee0d0f08b4..9de8b8353014 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pn
On 2021/12/21 19:26, Markus Armbruster wrote:> Two issues, and only looks
fixable.
>
> -device accepts either a QemuOpts or a JSON argument.
>
> It parses the former with qemu_opts_parse_noisily() into a QemuOpt
> stored in @qemu_device_opts.
>
> It parses the latter with qobject_from_json() in
Hi, Mark
On 12/18/2021 08:33 AM, Mark Cave-Ayland wrote:
> On 04/12/2021 12:07, Xiaojuan Yang wrote:
>
>> This patch realize the PCH-PIC interrupt controller.
>>
>> Signed-off-by: Xiaojuan Yang
>> Signed-off-by: Song Gao
>> ---
>> hw/intc/Kconfig | 4 +
>> hw/intc/loong
Accumulative mode will supply a initial state and append padding bit at
the end of hash stream. However, the crypto library will padding those
bit automatically, so ripped it off from iov array.
Signed-off-by: Troy Lee
---
hw/misc/aspeed_hace.c | 30 --
inclu
Signed-off-by: Dmitry Petrov
---
ui/sdl2.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/ui/sdl2.c b/ui/sdl2.c
index 17c0ec30eb..19bbc1fdd4 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -33,6 +33,7 @@
#include "sysemu/runstate-action.h"
#include "sysemu/sysemu.h"
#include "ui/win32-kbd-
Signed-off-by: Dmitry Petrov
---
ui/gtk.c | 54 ++
1 file changed, 42 insertions(+), 12 deletions(-)
diff --git a/ui/gtk.c b/ui/gtk.c
index 428f02f2df..b52eec6fe9 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -963,33 +963,63 @@ static gboolean gd_scr
This code seems to be used by vmport hack, passing these values allows
to implement horizontal scroll support even when using vmport.
In case it's not supported horizontal scroll will act as a vertical one.
Signed-off-by: Dmitry Petrov
---
ui/input-legacy.c | 16
1 file changed,
Signed-off-by: Dmitry Petrov
---
ui/cocoa.m | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 68a6302184..22a1f6776e 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -970,21 +970,27 @@ QemuCocoaView *cocoaView;
*/
Hi Marc-André,
Thank you for the review! It's much clearer to me now.
The odd thing about docs is that I wasn't able to find any specification
that would describe
intellimouse 4.0 protocol extension the way it's implemented in the linux
kernel.
For example here: https://isdaman.com/alsos/hardwar
v2:
- Patch is split into a sequence
- value is clamped to 31 for horizontal scroll
This patch introduces horizontal scroll support for the ps/2
mouse.
The patch is based on the previous work
by Brad Jorsch done in 2010
but never merge, see
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=57
On Tue, Dec 21, 2021 at 03:44:40PM +, Sean Christopherson wrote:
> On Tue, Dec 21, 2021, Chao Peng wrote:
> > This is the third version of this series which try to implement the
> > fd-based KVM guest private memory.
>
> ...
>
> > Test
> >
> > This code has been tested with latest TDX co
This reverts commit f14aab420c58b57e07189d6d9e6d3fbfab4761a6.
This commit was originally tested on gtk/gl which corrected behavior
there. Turns out, the OpenGL texture representing the virtual console
was being rendered in the incorrect place and not that the cursor
was incorrectly being handled.
In these cases, we only care about the size of the virtual console
itself. Previously, these calculations were made using the size of
the entire window, which would include the size of the virtual console
plus all the ui elements around it.
Signed-off-by: Alexander Orzechowski
Reviewed-by: Marc-A
gtk/gl was incorrectly always rendering as if the 'Zoom to Fit' was
always checked even if it wasn't. This is now using logic closer
to what is being used for the existing cairo code paths.
Signed-off-by: Alexander Orzechowski
---
ui/gtk-gl-area.c | 34 +-
1 file
Some UI fixups including one revert.
I have some things that I want to have a discussion about. Fullscreen mode
will always distort the virtual console. Is this behavior we really want? If we
get rid of this, we can combine scale_x and scale_y into a single variable
and simplify things a little bi
On Tue, Dec 21, 2021 at 09:36:56AM -0700, Alex Williamson wrote:
> On Mon, 20 Dec 2021 18:03:56 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Dec 20, 2021 at 11:26:59AM -0700, Alex Williamson wrote:
> > > The below referenced commit introduced a change where devices under a
> > > root port sl
On 12/20/21 10:18 AM, Fabiano Rosas wrote:
There are currently only two interrupts that use alternate SRRs, so
let them write to them directly during the setup code.
No functional change intented.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 23 ---
1 file
On 12/19/21 7:45 AM, Laurent Vivier wrote:
add IFLA_BRPORT_MCAST_EHT_HOSTS_LIMIT and IFLA_BRPORT_MCAST_EHT_HOSTS_CNT
# QEMU_LOG=unimp ip a
Unknown QEMU_IFLA_BRPORT type 37
Unknown QEMU_IFLA_BRPORT type 38
Signed-off-by: Laurent Vivier
---
linux-user/fd-trans.c | 4
1 file chang
On 12/19/21 7:45 AM, Laurent Vivier wrote:
# QEMU_LOG=unimp ip a
Unknown host QEMU_IFLA type: 22
Signed-off-by: Laurent Vivier
---
linux-user/fd-trans.c | 174 ++
1 file changed, 174 insertions(+)
Reviewed-by: Richard Henderson
r~
On 12/19/21 7:45 AM, Laurent Vivier wrote:
Add IFLA_PHYS_PORT_ID, IFLA_PARENT_DEV_NAME, IFLA_PARENT_DEV_BUS_NAME
# QEMU_LOG=unimp ip a
Unknown host QEMU_IFLA type: 56
Unknown host QEMU_IFLA type: 57
Unknown host QEMU_IFLA type: 34
Signed-off-by: Laurent Vivier
---
linux-user/fd-t
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
ld*_dma() returns a MemTxResult type. Do not discard
it, return it to the caller.
Update the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 17 -
hw/audio/intel-hda.c | 2 +-
hw/net/eepro100.
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
st*_dma() returns a MemTxResult type. Do not discard
it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling ld*_pci_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 6 +++---
hw/audio/intel-hda.c | 2 +-
hw/
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling st*_pci_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 11 ++-
hw/audio/intel-hda.c | 10 +++
On 12/18/21 6:51 AM, Philippe Mathieu-Daudé wrote:
dma_memory_read() returns a MemTxResult type. Do not discard
it, return it to the caller.
Update the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 6 --
include/hw/ppc/spapr_vio.h | 6 +-
incl
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
While the reply queue values fit in 16-bit, they are accessed
as 32-bit:
661:s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
662:s->reply_queue_head %= MEGASAS_MAX_FRAMES;
663:s->reply_queue_tail = ldl_le_pci_dma
On 12/18/21 6:51 AM, Philippe Mathieu-Daudé wrote:
dma_memory_write() returns a MemTxResult type. Do not discard
it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/dma.h | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-
On 12/18/21 6:51 AM, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling ld*_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 3 ++-
include/hw/ppc/spapr_vio.h | 3 ++-
On 12/18/21 6:51 AM, Philippe Mathieu-Daudé wrote:
Let devices specify transaction attributes when calling st*_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 3 ++-
include/hw/ppc/spapr_vio.h | 12 +++
tps://gitlab.com/marcandre.lureau/qemu
into staging (2021-12-21 08:00:26 -0800)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-loong-20211221-2
for you to fetch changes up to dfcf900ba67040ea9aa839aa38b33b4c091721d8:
configure, meson
Just rewrote the fore-mentioned patch using TCG ops. Here's some numbers
running the tests on
my local machine:
- using current master:
(1/1) tests/avocado/boot_linux_console.py:BootLinuxConsole.test_ppc_powernv8:
PASS (71.00 s)
(1/1) tests/avocado/boot_linux_console.py:BootLinuxConsole.te
On Wed, Dec 22, 2021 at 3:22 AM Vineet Gupta wrote:
>
> H-ext v1.0 was ratified recently as part of Privileged Spec 1.12.
> So move it out of experimental.
>
> [1] https://wiki.riscv.org/display/TECH/Recently+Ratified+Extensions
>
> Signed-off-by: Vineet Gupta
Thanks for the patch!
There is alr
On 12/21/21 3:05 AM, Paolo Bonzini wrote:
+genh += custom_target('config-poison.h',
+ input: [target_configs_h],
+ output: 'config-poison.h',
+ capture: true,
+ command: [find_program('scripts/make-config-poison.s
On 12/21/21 06:44, Daniel Henrique Barboza wrote:
On 12/21/21 05:20, Cédric Le Goater wrote:
On 12/21/21 03:37, Daniel Henrique Barboza wrote:
Hey,
On 12/20/21 18:35, Richard Henderson wrote:
Hi guys,
Somewhere within
Merge tag 'pull-ppc-20211217' of https://github.com/legoater/qemu i
ng (2021-12-21 08:00:26 -0800)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-loong-20211221-2
for you to fetch changes up to dfcf900ba67040ea9aa839aa38b33b4c091721d8:
configure, meson
On 12/21/21 3:05 AM, Paolo Bonzini wrote:
These files have been removed for more than year in the best
case, or for more than ten years for some really old TCG files.
Remove any traces of it.
Signed-off-by: Paolo Bonzini
---
Makefile | 11 ---
configure | 9 -
2 files chang
On 12/21/21 3:05 AM, Paolo Bonzini wrote:
Similar to other optional features, leave the variables empty and compute
the actual value later. Use the existence of include or source directories
to detect whether an OS or CPU supports respectively bsd-user and linux-user.
For now, BSD user-mode emu
On 12/21/21 3:05 AM, Paolo Bonzini wrote:
--dynamic-list is present on all supported ELF (not Windows or Darwin)
platforms, since it dates back to 2006; -exported_symbols_list is
likewise present on all supported versions of macOS. Do not bother
doing a functional test in configure.
Remove the
On 12/21/21 8:32 AM, Paolo Bonzini wrote:
Signed-off-by: Paolo Bonzini
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 12/21/21 8:32 AM, Paolo Bonzini wrote:
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used by both
bsd-user/ and linux-user/.
Signed-off-b
On 12/21/21 8:33 AM, Paolo Bonzini wrote:
Do not go through a static_library, which is only necessary in order to reuse
some source files between emulators and tests.
That's not true, is it. Anyway, you're moving the file to a different static_library. I
though I had tried this myself, but I
On 12/21/21 11:56 AM, Richard Henderson wrote:
On 12/21/21 8:32 AM, Paolo Bonzini wrote:
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used
On 12/21/21 8:32 AM, Paolo Bonzini wrote:
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used by both
bsd-user/ and linux-user/.
The reason
Add possibility to generate trace points for each qmp command.
We should generate both trace points and trace-events file, for further
trace point code generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
scripts/qapi/commands.py | 84 ++--
1 file chan
Hi all!
This series aims to add trace points for each qmp command with help of
qapi code generator.
That's a replacement for my
"[PATCH 0/5] trace: inroduce qmp: trace namespace"
Supersedes: <20210923195451.714796-1-vsement...@virtuozzo.com>
There are some problems, so that's an RFC.
1. Main p
I need help with this thing. Now it works like this:
make -j9
ninja: error:
'/work/src/qemu/up/up-trace-qmp-commands/build/qapi/qapi-commands-authz.trace-events',
needed by 'trace/trace-events-all', missing and no known rule to make it
make[1]: *** [Makefile:162: run-ninja] Error 1
make[1]: Leav
Add and option to generate trace points. We should generate both trace
points and trace-events files for further trace point code generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
scripts/qapi/gen.py | 13 ++---
scripts/qapi/main.py | 10 +++---
2 files changed, 17 inserti
On 12/21/21 2:32 AM, Thomas Huth wrote:
Using g_file_open_tmp is certainly better ... but the tests are currently written in a way
where they require the file name of the temporary file - so switching to g_file_open_tmp()
(which only provides a file handle) certainly would need some rewrite here
On 12/20/21 10:58 PM, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
The following changes since commit 2bf40d0841b942e7ba12953d515e62a436f0af84:
Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into
staging (2021-12-20 13:20:07 -0800)
are available in the Git
On Tue, 14 Dec 2021 13:45:34 +0800
Cai Huoqing wrote:
> No support MSI-X in BAIDU KUNLUN Virtual Function devices,
> so add a quirk to avoid setuping VFIO MSI-X
>
> Signed-off-by: Cai Huoqing
> ---
> hw/vfio/pci.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/vfio/pci.c b
> -Original Message-
> From: Anton Johansson
> Sent: Friday, December 17, 2021 2:01 AM
> To: qemu-devel@nongnu.org
> Cc: a...@rev.ng; Taylor Simpson ; Brian Cain
> ; bab...@rev.ng; ni...@rev.ng;
> richard.hender...@linaro.org
> Subject: [PATCH v7 05/13] target/hexagon: introduce new help
> -Original Message-
> From: Anton Johansson
> Sent: Friday, December 17, 2021 2:01 AM
> To: qemu-devel@nongnu.org
> Cc: a...@rev.ng; Taylor Simpson ; Brian Cain
> ; bab...@rev.ng; ni...@rev.ng;
> richard.hender...@linaro.org
> Subject: [PATCH v7 09/13] target/hexagon: import lexer for i
On 12/21/21 16:40, Markus Armbruster wrote:
Paolo Bonzini writes:
On 12/21/21 13:58, Markus Armbruster wrote:
Is this a regression? I suspect commit 5dacda5167 "vl: Enable JSON
syntax for -device" (v6.2.0).
Obviously not a regression: everything that used to work still works.
FWIW I t
On 12/21/21 16:40, Markus Armbruster wrote:
Paolo Bonzini writes:
On 12/21/21 13:58, Markus Armbruster wrote:
Is this a regression? I suspect commit 5dacda5167 "vl: Enable JSON
syntax for -device" (v6.2.0).
Obviously not a regression: everything that used to work still works.
FWIW I t
H-ext v1.0 was ratified recently as part of Privileged Spec 1.12.
So move it out of experimental.
[1] https://wiki.riscv.org/display/TECH/Recently+Ratified+Extensions
Signed-off-by: Vineet Gupta
---
target/riscv/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/targe
On 12/20/21 9:40 PM, WANG Xuerui wrote:
Hi all,
This is a port of QEMU TCG to the brand-new CPU architecture LoongArch,
introduced by Loongson with their 3A5000 chips.
Everything is tested on real 3A5000 board (system emulation, linux-user,
make check) and GitLab (CI jobs), and rebased to lates
From: WANG Xuerui
Normally this would be based on qemu/debian10 or qemu/ubuntu2004, but
after a week-long struggle, I still cannot build stage2 gcc with the
known-good LoongArch toolchain sources, so I chose the least-resistance
path with Gentoo as base image. As this image is not expected to be
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-30-...@xen0n.name>
Signed-off-by: Richard Henderson
---
linux-user/host/loongarch64/host-signal.h | 87 +++
1 file changed, 8
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-29-...@xen0n.name>
Signed-off-by: Richard Henderson
---
.../host/loongarch64/safe-syscall.inc.S | 90 +++
1 file changed, 90 insertions(+)
create mode 100644 c
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-25-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 68
1 file changed, 68 insertions(+)
diff --git a/tcg/loo
From: WANG Xuerui
Example output of `uname -a` on an initial Gentoo LA64 port, running
the upstream submission version of Linux (with some very minor patches
not influencing output here):
> Linux 5.14.0-10342-g37a00851b145 #5 SMP PREEMPT Tue Aug 10
> 12:56:24 PM CST 2021 loongarch64 GNU/Linux
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-24-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 2 +
tcg/loongarch64/tcg-target.c.inc | 353 +++
2 files
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-26-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tcg/loongarch64/tcg-
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-9-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 32
1 file changed, 32
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-28-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 44
1 file changed, 44 insertions(+)
diff --git a/tcg/loo
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-22-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 34
1 file changed, 34 insertions(+)
diff --git a/tcg/loo
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-12-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.h | 24 ++
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-21-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 69
2 files c
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-27-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tcg/loongarc
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-11-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 17 +
tcg/loongarch64/tcg-target.c
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-17-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.h | 4 +-
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-23-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 131
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Message-Id: <20211221054105.178795-16-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.h | 8 +++---
tcg/loongarch64/tcg-target.c.in
From: WANG Xuerui
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211221054105.178795-13-...@xen0n.name>
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 2 +
tcg/loongarch64/tcg-target.h | 16 ++
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