This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/458
** Changed in: qemu
Status: New => Expired
** Bug watch
On Thu, 2021-07-01 at 12:11 +0200, Thomas Huth wrote:
> On 29/06/2021 16.19, Cho, Yu-Chen wrote:
> > we stop short of renaming the actual qom object though,
> > so type remains TYPE_QEMU_S390_TOD, ie "s390-tod-qemu".
> >
> > Signed-off-by: Claudio Fontana
> > Reviewed-by: David Hildenbrand
> > R
On Thursday, 2021-07-01 at 15:35:49 -05, Michael Roth wrote:
> Quoting Igor Mammedov (2021-07-01 03:43:13)
>> On Wed, 30 Jun 2021 14:18:09 -0500
>> Michael Roth wrote:
>>
>> > Quoting Dr. David Alan Gilbert (2021-06-29 09:06:02)
>> > > * zhenwei pi (pizhen...@bytedance.com) wrote:
>> > > > A A
On Fri, Jul 2, 2021 at 1:47 PM Jason Wang wrote:
>
>
> 在 2021/7/2 下午12:43, Bin Meng 写道:
> > On Fri, Jul 2, 2021 at 11:29 AM Jason Wang wrote:
> >>
> >> 在 2021/7/1 下午5:46, Bin Meng 写道:
> >>> From: Christina Wang
> >>>
> >>> The initial value of VLAN Ether Type (VET) register is 0x8100, as per
> >
On 2021/7/2 下午1:38, Alistair Francis wrote:
On Thu, Jul 1, 2021 at 6:45 PM Frank Chang wrote:
LIU Zhiwei 於 2021年4月20日 週二 上午8:49寫道：
On 2021/4/20 上午7:23, Alistair Francis wrote:
On Fri, Apr 9, 2021 at 5:52 PM LIU Zhiwei wrote:
CSR mintstatus holds the active interrupt level for each suppo
在 2021/7/2 下午12:43, Bin Meng 写道:
On Fri, Jul 2, 2021 at 11:29 AM Jason Wang wrote:
在 2021/7/1 下午5:46, Bin Meng 写道:
From: Christina Wang
The initial value of VLAN Ether Type (VET) register is 0x8100, as per
the manual and real hardware.
While Linux e1000e driver always writes VET register
On Thu, Jul 1, 2021 at 6:45 PM Frank Chang wrote:
>
> LIU Zhiwei 於 2021年4月20日 週二 上午8:49寫道：
>>
>>
>> On 2021/4/20 上午7:23, Alistair Francis wrote:
>> > On Fri, Apr 9, 2021 at 5:52 PM LIU Zhiwei wrote:
>> >> CSR mintstatus holds the active interrupt level for each supported
>> >> privilege mode. si
Signed-off-by: Alistair Francis
---
include/hw/riscv/opentitan.h | 2 ++
hw/riscv/opentitan.c | 6 ++
2 files changed, 8 insertions(+)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index a488f5e8ec..9f93bebdac 100644
--- a/include/hw/riscv/opentitan.h
+++ b
Signed-off-by: Alistair Francis
---
include/hw/riscv/opentitan.h | 1 +
hw/riscv/opentitan.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index 86cceef698..a488f5e8ec 100644
--- a/include/hw/riscv/opentitan.h
+++ b/inc
Alistair Francis (3):
char: ibex_uart: Update the register layout
hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri
hw/riscv: opentitan: Add the flash alias
include/hw/riscv/opentitan.h | 3 +++
hw/char/ibex_uart.c | 19 ++-
hw/riscv/opentitan.c
Update the register layout to match the latest OpenTitan bitstream.
Signed-off-by: Alistair Francis
---
hw/char/ibex_uart.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c
index fe4b6c3c9e..6b0c9330bf 100644
--- a
On 7/2/21 4:35 AM, Michael Roth wrote:
Quoting Igor Mammedov (2021-07-01 03:43:13)
On Wed, 30 Jun 2021 14:18:09 -0500
Michael Roth wrote:
Quoting Dr. David Alan Gilbert (2021-06-29 09:06:02)
* zhenwei pi (pizhen...@bytedance.com) wrote:
A AMD server typically has cpuid level 0x10(test on Ro
Problematic code now around lines 2221 (in handle_query_xfer_features)
... lol I'm the only one impacted ... all the large register set cpus
can be affected.
** Changed in: qemu
Status: Expired => New
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On Fri, Jul 2, 2021 at 11:29 AM Jason Wang wrote:
>
>
> 在 2021/7/1 下午5:46, Bin Meng 写道:
> > From: Christina Wang
> >
> > The initial value of VLAN Ether Type (VET) register is 0x8100, as per
> > the manual and real hardware.
> >
> > While Linux e1000e driver always writes VET register to 0x8100,
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
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https://bugs.launchpad.net/bugs/1785902
Title:
local/9pfs:
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
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https://bugs.launchpad.net/bugs/1793859
Title:
GTK display
On Thu, 1 Jul 2021, Philippe Mathieu-Daudé wrote:
> On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> > Commit 3fe9a838ec "dp8393x: Always use 32-bit accesses" assumed that
> > all accesses to the registers were 32-bit
No, that assumption was not made there. Just take a look at my commits in
Linux
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https://bugs.launchpad.net/bugs/1842530
Title:
ich6 and ic
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** Changed in: qemu
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https://bugs.launchpad.net/bugs/1790260
Title:
binfmt supp
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https://bugs.launchpad.net/bugs/1856837
Title:
qemu 4.2.0
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Title:
read-modify
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https://bugs.launchpad.net/bugs/1858046
Title:
qemu-aarch6
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Title:
files are r
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https://bugs.launchpad.net/bugs/1781281
Title:
qemu-ppc64l
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Title:
Xfer:featur
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** Changed in: qemu
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https://bugs.launchpad.net/bugs/1802465
Title:
typing stri
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https://bugs.launchpad.net/bugs/1802915
Title:
GTK display
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https://bugs.launchpad.net/bugs/1859291
Title:
RISC-V inco
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Title:
no batmap o
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Title:
Mouse way t
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Title:
Suddenly no
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Title:
VNC outputs
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Title:
Cache Layou
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Title:
PCI broken
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Title:
Qemu ungrab
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Title:
QEMU x86_64
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https://bugs.launchpad.net/bugs/1861394
Title:
qemu-system
在 2021/7/1 下午5:46, Bin Meng 写道:
From: Christina Wang
The initial value of VLAN Ether Type (VET) register is 0x8100, as per
the manual and real hardware.
While Linux e1000e driver always writes VET register to 0x8100, it is
not always the case for everyone. Drivers relying on the reset value
On Thursday, July 1, 2021 10:22 PM, David Hildenbrand wrote:
> On 01.07.21 14:51, Peter Xu wrote:
> Spoiler alert: the introduction of clean bitmaps partially broke free page
> hinting
> already (as clearing happens deferred -- and might never happen if we don't
> migrate *any* page within a clean
On Thursday, July 1, 2021 8:51 PM, Peter Xu wrote:
> On Thu, Jul 01, 2021 at 04:42:38AM +, Wang, Wei W wrote:
> > On Thursday, July 1, 2021 4:08 AM, Peter Xu wrote:
> > > Taking the mutex every time for each dirty bit to clear is too slow,
> > > especially we'll take/release even if the dirty b
* Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
> Subject: Re: [v4] migration: fix the memory overwriting risk in add_to_iovec
>
> * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
> > * Lin Feng (linfen...@huawei.com) wrote:
> > > From: Feng Lin
> > >
> > > When testing migration, a
Alexandre IOOSS writes:
> [[PGP Signed Part:Undecided]]
>
>
> On 7/1/21 8:49 PM, Alex Bennée wrote:
>> Alexandre Iooss writes:
>>
>>> execlog is a plugin that logs executed instructions with some useful
>>> metadata including memory access.
>>>
>>> The output of the plugin is designed to be u
The mapping from file-descriptors to translator functions is not guarded
on realloc which may cause invalid function pointers to be read from a
previously deallocated mapping.
Signed-off-by: Owen Anderson
---
linux-user/fd-trans.c | 1 +
linux-user/fd-trans.h | 55 ++
On Wed, Jun 30, 2021 at 11:55 PM Stefano Garzarella wrote:
>
> On Wed, Jun 30, 2021 at 03:44:17PM -0700, Jiang Wang . wrote:
> >On Thu, Jun 24, 2021 at 7:31 AM Stefano Garzarella
> >wrote:
> >>
> >> On Wed, Jun 23, 2021 at 11:50:33PM -0700, Jiang Wang . wrote:
> >> >Hi Stefano,
> >> >
> >> >I ch
On 7/1/21 9:48 PM, Connor Kuehl wrote:
> On 6/30/21 7:01 AM, Federico Vaga wrote:
>> Hello,
>>
>> I can't find this information on the website, so here I am.
>>
>> I developed a QEMU device that virtualises a PCI card that we widely use at
>> CERN.
What kind of device is it? You might be surprise
On 7/1/21 11:11 PM, Hubert Jasudowicz wrote:
> From: Hubert Jasudowicz
>
> Signed-off-by: Hubert Jasudowicz
> ---
> tools/virtiofsd/fuse_virtio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 6/24/21 10:27 PM, Philippe Mathieu-Daudé wrote:
> Commit 911629e6d37 ("vt82c686: Fix SMBus IO base and configuration
> registers") exposed a "bug" in the Bonito north bridge. Fix it
> and add tests.
>
> Thanks to Zoltan for support while debugging :)
>
> Philippe Mathieu-Daudé (5):
> hw/isa/
Datagram sockets are connectionless and unreliable.
The sender does not know the capacity of the receiver
and may send more packets than the receiver can handle.
Add two more dedicate virtqueues for datagram sockets,
so that it will not unfairly steal resources from
stream and future connection-or
On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> This will be required for an upcoming checksum calculation.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> include/qemu/bitops.h | 22 ++
> 1 file changed, 22 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 6/25/21 8:54 AM, Mark Cave-Ayland wrote:
> The MIPS magnum machines are available in both big endian (mips64) and little
> endian (mips64el) configurations. Ensure that the dp893x big_endian property
> is set accordingly using logic similar to that used for the MIPS malta
> machines.
>
> Signed
On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> This is in preparation for each board to have its own separate bit storage
> format and checksum for storing the MAC address.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/m68k/q800.c | 24 ++--
> 1 file changed, 22 insertions(+)
On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> According to the datasheet the dp8393x chipset does not contain any NVRAM
> capable
> of storing a MAC address or checksum. Now that both the MIPS jazz and m68k
> q800
> boards generate the PROM region and checksum themselves, remove the generated
> P
On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> This is in preparation for each board to have its own separate bit storage
> format and checksum for storing the MAC address.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/mips/jazz.c | 23 ++-
> 1 file changed, 22 insertions(+),
While the default "info lapic" always synchronizes cpu state ...
mon_get_cpu()
-> mon_get_cpu_sync(mon, true)
-> cpu_synchronize_state(cpu)
-> ioctl KVM_GET_LAPIC (taking KVM as example)
... the cpu state is not synchronized when the apic-id is available as
argument.
The cpu state shoul
On 6/25/21 8:53 AM, Mark Cave-Ayland wrote:
> Commit 3fe9a838ec "dp8393x: Always use 32-bit accesses" assumed that all
> accesses
> to the registers were 32-bit but this is actually not the case. The access
> size is
> determined by the CPU instruction used and not the number of physical address
From: Hubert Jasudowicz
Signed-off-by: Hubert Jasudowicz
---
tools/virtiofsd/fuse_virtio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/virtiofsd/fuse_virtio.c b/tools/virtiofsd/fuse_virtio.c
index fa4aff9b0e..fc2564a603 100644
--- a/tools/virtiofsd/fuse_virtio.c
++
On Thursday, 2021-07-01 at 16:24:51 -05, Babu Moger wrote:
> David, Are you still working on v2 of these series? I was going to test
> and review. Thanks
Yes. I have something that works, but it's messy in places. I hope to
get it out in a couple of days.
>> -Original Message-
>> From: D
David, Are you still working on v2 of these series? I was going to test
and review. Thanks
> -Original Message-
> From: David Edmondson
> Sent: Tuesday, June 8, 2021 3:25 AM
> To: qemu-devel@nongnu.org
> Cc: k...@vger.kernel.org; Eduardo Habkost ; Paolo
> Bonzini ; Marcelo Tosatti ;
> Ric
Please ignore this patch. I sent out the wrong version without memory check.
I will re-send again.
Thank you very much!
Dongli Zhang
On 7/1/21 2:26 PM, Dongli Zhang wrote:
> While the default "info lapic" always synchronizes cpu state ...
>
> mon_get_cpu()
> -> mon_get_cpu_sync(mon, true)
>
While the default "info lapic" always synchronizes cpu state ...
mon_get_cpu()
-> mon_get_cpu_sync(mon, true)
-> cpu_synchronize_state(cpu)
-> ioctl KVM_GET_LAPIC (taking KVM as example)
... the cpu state is not synchronized when the apic-id is available as
argument.
The cpu state shoul
On 6/29/21 7:37 AM, Philippe Mathieu-Daudé wrote:
> When using the Magnum ARC firmware we can see accesses to the
> UART1 beeing rejected, because the device is not mapped:
>
> $ qemu-system-mips64el -M magnum -d guest_errors,unimp -bios NTPROM.RAW
> Invalid access at addr 0x80007004, size 1,
Quoting Igor Mammedov (2021-07-01 03:43:13)
> On Wed, 30 Jun 2021 14:18:09 -0500
> Michael Roth wrote:
>
> > Quoting Dr. David Alan Gilbert (2021-06-29 09:06:02)
> > > * zhenwei pi (pizhen...@bytedance.com) wrote:
> > > > A AMD server typically has cpuid level 0x10(test on Rome/Milan), it
> > >
On 6/28/21 2:04 PM, Song Gao wrote:
> This patch implement fixed point arithemtic instruction translation.
>
> This includes:
> - ADD.{W/D}, SUB.{W/D}
> - ADDI.{W/D}, ADDU16ID
> - ALSL.{W[U]/D}
> - LU12I.W, LU32I.D LU52I.D
> - SLT[U], SLT[U]I
> - PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
> - AND, OR
On 6/30/21 7:01 AM, Federico Vaga wrote:
> Hello,
>
> I can't find this information on the website, so here I am.
>
> I developed a QEMU device that virtualises a PCI card that we widely use at
> CERN.
> But this card is only used at CERN.
>
> Clearly, having CERN specific devices in QEMU does
On 29/06/2021 16.19, Cho, Yu-Chen wrote:
move kvm files into kvm/
After the reshuffling, update MAINTAINERS accordingly.
Make use of the new directory:
target/s390x/kvm/
Signed-off-by: Claudio Fontana
Signed-off-by: Cho, Yu-Chen
---
[...]
diff --git a/meson.build b/meson.build
index a91b394
On Thu, 1 Jul 2021 at 03:09, John Snow wrote:
>
> The following changes since commit d940d468e29bff5eb5669c0dd8f3de0c3de17bfb:
>
> Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210629' into
> staging (2021-06-30 19:09:45 +0100)
>
> are available in the Git repository at:
>
> http
On 6/29/21 6:36 AM, Peter Maydell wrote:
A little way up from here there's a comment:
/* Reserve space for the return code. On a real system this would
* be within the VDSO. So, despite the name this is not a "real"
* record within the frame.
*/
fr_ofs = layout.tota
On 29/06/2021 16.19, Cho, Yu-Chen wrote:
all function calls are protected by kvm_enabled(),
so we do not need the stubs.
Signed-off-by: Claudio Fontana
Signed-off-by: Cho, Yu-Chen
---
MAINTAINERS | 1 -
target/s390x/kvm-stub.c | 121 ---
On 29/06/2021 16.19, Cho, Yu-Chen wrote:
this will allow to remove the kvm stubs.
Signed-off-by: Claudio Fontana
Signed-off-by: Cho, Yu-Chen
---
target/s390x/diag.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/s390x/diag.c b/target/s390x/diag.c
index c17a2498
The recently-added NBD context qemu:allocation-depth is able to
distinguish between locally-present data (even when that data is
sparse) [shown as depth 1 over NBD], and data that could not be found
anywhere in the backing chain [shown as depth 0]; and the libnbd
project was recently patched to giv
v2 was here [1]
in v3:
- pick up iotest change from [2] (rest of that series is abandoned)
- don't change semantics of "depth"
- make new witness unconditional, rather than optional
- spell new witness "present":true/false
[1] https://lists.gnu.org/archive/html/qemu-devel/2021-06/msg02446.html
[2]
Enhance the test to inspect what qemu-nbd is advertising during
handshake, and rename it now that we support useful iotest names.
Signed-off-by: Eric Blake
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
.../qemu-iotests/{309 => tests/nbd-qemu-allocation} | 5 -
.../{309.out => tests/nbd-qe
On 7/1/21 8:49 PM, Alex Bennée wrote:
Alexandre Iooss writes:
execlog is a plugin that logs executed instructions with some useful
metadata including memory access.
The output of the plugin is designed to be usable with other tools. For
example it could be used with a side-channel leakage
Hi-
Thanks very much for reporting this. We picked up that patch ("io_uring:
don't mark S_ISBLK async work as unbounded") for our Ubuntu v5.8 kernel
from linux-stable/v5.10.31. Since it's not clear that it's appropriate for
v5.8 (or even v5.10-stable?) we'll revert it from Ubuntu v5.8 if you can
Alexandre Iooss writes:
> execlog is a plugin that logs executed instructions with some useful
> metadata including memory access.
>
> The output of the plugin is designed to be usable with other tools. For
> example it could be used with a side-channel leakage model to create
> side-channel tr
Hi Kamal.
Thanks for the timely response.
We currently worked around the issue by installing linux-generic-hwe-20.04-edge.
I've just installed the new build that you provided but I'm afraid the
same issue persists.
I've double-checked that the kernel is installed properly:
root@datai-ampere:~# u
Hi,
On 6/29/21 11:36 AM, Eric Auger wrote:
Add new tests checking the good behavior of the SMMUv3 protecting
2 virtio pci devices (block and net). We check the guest boots and
we are able to install a package. Different guest configs are tested:
standard, passthrough an strict=0. This is tested
Laurent Vivier wrote:
> When the migration fails or is canceled we wait the end of the unplug
> operation to be able to plug it back. But if the unplug operation
> is never finished we stop to wait and QEMU emits a warning to inform
> the user.
>
> Based-on: 20210629155007.629086-1-lviv...@redhat.
On 6/24/21 3:20 AM, Dov Murik wrote:
> Add the sev_add_kernel_loader_hashes function to calculate the hashes of
> the kernel/initrd/cmdline and fill a designated OVMF encrypted hash
> table area. For this to work, OVMF must support an encrypted area to
> place the data which is advertised via a sp
On 6/2/21 2:21 PM, Brad Smith wrote:
tests/vm: update NetBSD to 9.2
Signed-off-by: Brad Smith
---
tests/vm/netbsd | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Wainer dos Santos Moschetta
diff --git a/tests/vm/netbsd b/tests/vm/netbsd
index b9efc269d2..4cc58df1
On Thu, Jul 1, 2021 at 12:49 PM Dr. David Alan Gilbert
wrote:
> * GitLab (git...@mg.gitlab.com) wrote:
> >
> >
> > Pipeline #330351156 has failed!
> >
> > Project: qemu ( https://gitlab.com/dagrh/qemu )
> > Branch: migration.next (
> https://gitlab.com/dagrh/qemu/-/commits/migration.next )
> >
>
* GitLab (git...@mg.gitlab.com) wrote:
>
>
> Pipeline #330351156 has failed!
>
> Project: qemu ( https://gitlab.com/dagrh/qemu )
> Branch: migration.next (
> https://gitlab.com/dagrh/qemu/-/commits/migration.next )
>
> Commit: 9c21e614 (
> https://gitlab.com/dagrh/qemu/-/commit/9c21e61435e09a
On 7/1/21 5:25 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> cpu.c| 11 ---
> trace-events | 5 +
> 2 files changed, 13 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/21 5:25 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/cpu-exec.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 7/1/21 5:25 PM, Richard Henderson wrote:
> Since 6eea04347eb6, all tcg backends support goto_ptr.
> Remove the conditional, making support mandatory.
>
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg-opc.h| 3 +--
> tcg/aarch64/tcg-target.h | 1 -
> tcg/arm/tcg-target.h | 1
On 7/1/21 5:25 PM, Richard Henderson wrote:
> Now that we've moved helper_lookup_tb_ptr, the only user
> of tb-lookup.h is cpu-exec.c; merge the contents in.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/tb-lookup.h | 49 ---
> accel/tcg/cpu-exec.
On 7/1/21 5:25 PM, Richard Henderson wrote:
> This will allow additional code sharing.
> No functional change.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/cpu-exec.c| 30 ++
> accel/tcg/tcg-runtime.c | 22 --
> 2 files changed, 30 in
On 7/1/21 3:14 PM, Laurent Vivier wrote:
> When the migration fails or is canceled we wait the end of the unplug
> operation to be able to plug it back. But if the unplug operation
> is never finished we stop to wait and QEMU emits a warning to inform
> the user.
>
> Based-on: 20210629155007.62908
On 6/29/21 7:19 AM, Cho, Yu-Chen wrote:
the lack of target_user_arch makes it hard to fully leverage the
build system in order to separate user code from sysemu code.
Provide it, so that we can avoid the proliferation of #ifdef
in target code.
Signed-off-by: Claudio Fontana
Signed-off-by: Cho,
Signed-off-by: Richard Henderson
---
cpu.c| 11 ---
trace-events | 5 +
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/cpu.c b/cpu.c
index 2c9da10d0f..addcb5db9c 100644
--- a/cpu.c
+++ b/cpu.c
@@ -38,6 +38,7 @@
#include "exec/translate-all.h"
#include "exec
The access internal to tb_cflags() is atomic.
Avoid re-reading it as such for the multiple uses.
Signed-off-by: Richard Henderson
---
accel/tcg/translator.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 1c44d096
We don't need the whole CPUBreakpoint structure in the check,
only the flags. Return the instruction length to consolidate
the adjustment of db->pc_next.
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 17 +--
accel/tcg/translator.c| 40 +
Move the -d nochain check to bits on tb->cflags.
These will be used for more than -d nochain shortly.
Set bits during curr_cflags, test them in translator_use_goto_tb,
assert we're not doing anything odd in tcg_gen_goto_tb. The test
in tcg_gen_exit_tb is redundant with the assert for goto_tb_issu
The purpose of suppressing goto_ptr from -d nochain had been
to return to the main loop so that -d cpu would be recognized.
But we now include -d cpu logging in helper_lookup_tb_ptr so
there is no need to exclude goto_ptr.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 2 +-
1 file
Exchange the test in translator_use_goto_tb for CF_NO_GOTO_TB,
and the test in tb_gen_code for setting CF_COUNT_MASK to 1.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 8 +++-
accel/tcg/translate-all.c | 2 +-
accel/tcg/translator.c| 2 +-
3 files changed, 9 insertion
Having this data in cflags means that hashing takes care
of selecting a TB with or without exceptions built in.
Which means that we no longer need to flush all TBs.
This does require that we single-step while we're within a page
that contains a breakpoint, so it's not yet ideal, but should be
an i
Now that we've moved helper_lookup_tb_ptr, the only user
of tb-lookup.h is cpu-exec.c; merge the contents in.
Signed-off-by: Richard Henderson
---
accel/tcg/tb-lookup.h | 49 ---
accel/tcg/cpu-exec.c | 31 ++-
2 files changed, 30 i
The space reserved for CF_COUNT_MASK was overly large.
Reduce to free up cflags bits and eliminate an extra test.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 4 +++-
accel/tcg/translate-all.c | 5 ++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/e
Request that the one TB returns immediately, so that
we release the exclusive lock as soon as possible.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 2206
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 67ed25beb9..e22bcb99f7 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -183,9 +183,9 @@ static inli
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