Eduardo Habkost writes:
> On Fri, Nov 20, 2020 at 06:29:16AM +0100, Markus Armbruster wrote:
[...]
>> When the structure of a data type is to be kept away from its users, I
>> prefer to keep it out of the public header, so the compiler enforces the
>> encapsulation.
>
> I prefer that too, except
On Mon, Nov 02, 2020 at 08:37:50AM +0300, Roman Kagan wrote:
> When the slot is in steady powered-off state and the device is being
> removed, there's no need to press the attention button. Nor is it
> mandated by the Standard Hot-Plug Controller Specification, Rev. 1.0.
>
> Moreover it confuses
On 20.11.20 17:01, Eric Farman wrote:
> A Linux binary will have the string "S390EP" at address 0x10008,
> which is important in getting the guest up off the ground. In the
> case of a reboot (specifically chreipl going to a new device),
> we should defer to the PSW at address zero for the new conf
From: Klaus Jensen
With BAR 4 now free to use, allow PMR and CMB to be enabled
simultaneously.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index db8c5ae2f527..72d5449121c
From: Klaus Jensen
In the interest of supporting both CMB and PMR to be enabled on the same
device, move the MSI-X table and pending bit out of BAR 4 and into BAR
0.
This is a simplified version of the patch contributed by Andrzej
Jakowski (see [1]). Leaving the CMB at offset 0 removes the need
From: Klaus Jensen
This is a resurrection of Andrzej's series[1] from back July.
Andrzej's main patch basically moved the the CMB from BAR 2 into an
offset in BAR 4 (located after the MSI-X table and PBA). Having an
offset on the CMB causes a bunch of calculations related to address
mapping to c
From: Andrzej Jakowski
This patch sets CMBS bit in controller capabilities register when user
configures NVMe driver with CMB support, so capabilites are correctly
reported to guest OS.
Signed-off-by: Andrzej Jakowski
Reviewed-by: Maxim Levitsky
Signed-off-by: Klaus Jensen
---
include/block/
John Snow writes:
> On 11/20/20 5:25 AM, Markus Armbruster wrote:
>> John Snow writes:
>>> On 11/11/20 3:27 AM, Markus Armbruster wrote:
John Snow writes:
> On 11/10/20 1:22 AM, Markus Armbruster wrote:
>> John Snow writes:
>
>>
>> If you find yourself in a situation where an err
On Fri, Nov 20, 2020 at 10:45:06AM -0500, Paolo Bonzini wrote:
> Remove the "default y" for USB_XHCI_SYSBUS because
> sysbus devices are not user creatable; boards that use them will
> specify them manually with "imply" or "select" clauses.
>
> It would be nice to keep the ability to remove PCIe a
On Mon, Nov 02, 2020 at 02:22:35PM +0100, Cédric Le Goater wrote:
> Sorry for the late answer I was out for a couple of weeks.
>
> On 10/9/20 2:23 AM, David Gibson wrote:
> > On Mon, Oct 05, 2020 at 06:51:41PM +0200, Cédric Le Goater wrote:
> >> Hello,
> >>
> >> When an interrupt has been handled,
Fixes: 63c4db4c2e6d (net: relocate paths to helpers and scripts)
Signed-off-by: Keqian Zhu
---
net/tap.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/tap.c b/net/tap.c
index c46ff66184..b8e5cca51c 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -951,7 +951,8 @@ free_fail:
On Sat, Nov 14, 2020 at 09:13:33AM -0800, Richard Henderson wrote:
> On 11/10/20 10:22 PM, David Gibson wrote:
> > On Tue, Nov 10, 2020 at 10:14:23AM +0100, LemonBoy wrote:
> >> Is there any chance for this patch series to be merged for 5.2?
> >
> > No. We are now in hard freeze, and this is not
On Mon, Nov 16, 2020 at 10:48:09AM +0800, Chen Qun wrote:
> When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
> hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’:
> hw/ppc/ppc.c:118:16: warning: this statement may fall through
> [-Wimplicit-fallthrough=]
> 118 |
On Mon, Nov 16, 2020 at 10:48:10AM +0800, Chen Qun wrote:
> When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning:
> target/ppc/mmu_helper.c: In function ‘dump_mmu’:
> target/ppc/mmu_helper.c:1351:12: warning: this statement may fall through
> [-Wimplicit-fallthrough=]
> 13
On Fri, Nov 13, 2020 at 12:01:26AM +0100, LemonBoy wrote:
> Fix a couple of problems found in the emulation of f64/f128 comparisons plus
> some minimal self-contained commits to clean-up some code.
Applied to ppc-for-6.0.
As bug fixes, these could theoretically go into qemu-5.2. However,
since t
On Mon, Nov 16, 2020 at 12:46:32PM +0100, Philippe Mathieu-Daudé wrote:
> David, can you queue this patch for 5.2 (bugfix)?
Sorry about this, I've been on vacation.
Although it is a bugfix, it's been there for a very long time and
no-one's hit it in practice.
So, I'm disinclined to push it in th
On Sat, Nov 21, 2020 at 12:42:04AM +0100, Greg Kurz wrote:
> spapr_core_pre_plug() already guarantees that the slot for the given core
> ID is available. It is thus safe to assume that spapr_find_cpu_slot()
> returns a slot during plug. Turn the error path into an assertion.
> It is also safe to as
On Mon, Nov 09, 2020 at 03:28:24PM +0100, Philippe Mathieu-Daudé wrote:
> Hi David,
>
> On 11/3/20 12:39 PM, David Gibson wrote:
> > On Tue, Nov 03, 2020 at 12:25:57PM +0100, Philippe Mathieu-Daudé wrote:
> >> The '%u' conversion specifier is for decimal notation.
> >> When prefixing a format wit
On Sat, Nov 21, 2020 at 12:42:06AM +0100, Greg Kurz wrote:
> We currently detect that a PHB index is already in use at plug time.
> But this can be decteted at pre-plug in order to error out earlier.
>
> This allows to pass &error_abort to spapr_drc_attach() and to end
> up with a plug handler tha
On Sat, Nov 21, 2020 at 12:42:08AM +0100, Greg Kurz wrote:
> All users are passing &error_abort already. Document the fact
> that spapr_drc_attach() should only be passed a free DRC, which
> is supposedly the case if appropriate checking is done earlier.
>
> Signed-off-by: Greg Kurz
Applied to p
On 2020/11/19 下午7:13, Andrew Melnychenko wrote:
From: Andrew
For now, that method supported only by Linux TAP.
Linux TAP uses TUNSETSTEERINGEBPF ioctl.
Signed-off-by: Andrew Melnychenko
---
include/net/net.h | 2 ++
net/tap-bsd.c | 5 +
net/tap-linux.c | 13 +
n
On 2020/11/19 下午7:13, Andrew Melnychenko wrote:
This set of patches introduces the usage of eBPF for packet steering
and RSS hash calculation:
* RSS(Receive Side Scaling) is used to distribute network packets to
guest virtqueues by calculating packet hash
* Additionally adding support for the u
On Sat, Nov 21, 2020 at 12:42:05AM +0100, Greg Kurz wrote:
> Read documentation in "qapi/error.h" and changelog of commit
> e3fe3988d785 ("error: Document Error API usage rules") for
> rationale.
>
> Signed-off-by: Greg Kurz
Applied to ppc-for-6.0, thanks.
> ---
> include/hw/ppc/spapr.h | 2 +
On Sat, Nov 21, 2020 at 12:42:07AM +0100, Greg Kurz wrote:
> There can be only one TPM proxy at a time. This is currently
> checked at plug time. But this can be detected at pre-plug in
> order to error out earlier.
>
> This allows to get rid of error handling in the plug handler.
>
> Signed-off-
On Sat, Nov 21, 2020 at 12:42:03AM +0100, Greg Kurz wrote:
> When it comes to resetting the compat mode of the vCPUS, there are
> two situations to consider:
> (1) machine reset should set the compat mode back to the machine default,
> ie. spapr->max_compat_pvr
> (2) hot plugged vCPUs should se
On Sat, Nov 21, 2020 at 12:42:01AM +0100, Greg Kurz wrote:
> Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures
> that the memory slot is available and that addresses don't overlap
> with existing memory regions. The corresponding DRCs in the LMB
> and PMEM namespaces are thus neces
On Sat, Nov 21, 2020 at 12:42:00AM +0100, Greg Kurz wrote:
> The PHB acts as the hotplug handler for PCI devices. It does some
> sanity checks on DR enablement, PCI bridge chassis numbers and
> multifunction. These checks are currently performed at plug time,
> but they would best sit in a pre-plug
On Sat, Nov 21, 2020 at 12:42:02AM +0100, Greg Kurz wrote:
> This hack registers dummy VMState entries of ICPs in order to
> support migration of old pseries machine types that used to
> create all smp.max_cpus possible ICPs at machine init.
>
> Part of the work is to unregister the dummy entries
On Fri, Nov 20, 2020 at 06:46:43PM +0100, Greg Kurz wrote:
> Never used from the start.
>
> Signed-off-by: Greg Kurz
Applied to ppc-for-6.0, thanks.
> ---
> include/hw/ppc/xics_spapr.h | 2 +-
> hw/intc/xics_kvm.c | 2 +-
> hw/ppc/spapr_irq.c | 2 +-
> 3 files changed, 3 inse
On Fri, Nov 20, 2020 at 06:46:44PM +0100, Greg Kurz wrote:
> The sPAPR ICS device exposes the range of vCPU ids it can handle in
> the "ibm,interrupt-server-ranges" FDT property. The highest vCPU
> id, ie. spapr_max_server_number(), is obtained from the machine
> through the "nr_servers" argument o
On Fri, Nov 20, 2020 at 06:46:39PM +0100, Greg Kurz wrote:
> The sPAPR XIVE device is created by the machine in spapr_irq_init().
> The latter overrides any value provided by the user with -global for
> the "nr-irqs" and "nr-ends" properties with strictly positive values.
>
> It seems reasonable t
On Fri, Nov 20, 2020 at 06:46:45PM +0100, Greg Kurz wrote:
> This argument isn't used by the backends anymore.
>
> Signed-off-by: Greg Kurz
> ---
> include/hw/ppc/spapr_irq.h | 3 +--
> hw/intc/spapr_xive.c | 3 +--
> hw/intc/xics_spapr.c | 3 +--
> hw/ppc/spapr_irq.c | 3 +--
On Fri, Nov 20, 2020 at 06:46:40PM +0100, Greg Kurz wrote:
> We're going to kill the "nr_ends" field in a subsequent patch.
> Prepare ground by using an helper instead of peeking into
> the sPAPR XIVE structure directly.
>
> Signed-off-by: Greg Kurz
Applied to ppc-for-6.0, thanks.
> ---
> inc
On Fri, Nov 20, 2020 at 06:46:41PM +0100, Greg Kurz wrote:
> The sPAPR XIVE object has an "nr-ends" property that is used
> to size the END table. This property is set by the machine
> code to a value derived from spapr_max_server_number().
>
> spapr_max_server_number() is also used to inform the
On Fri, Nov 20, 2020 at 06:46:42PM +0100, Greg Kurz wrote:
> The sPAPR XIVE device exposes a range of LISNs that the guest uses
> for IPIs. This range is currently sized according to the highest
> vCPU id, ie. spapr_max_server_number(), as obtained from the machine
> through the "nr_servers" argume
Public bug reported:
>From HD audio spec, section 3.3.35:
"Stream Reset (SRST): Writing a 1 causes the corresponding stream to be
reset. [...] After the stream hardware has completed sequencing into the
reset state, it will report a 1 in this bit. Software must read a 1 from
this bit to verify th
On 2020/11/21 6:01, Alex Williamson wrote:
> On Fri, 20 Nov 2020 22:05:49 +0800
> Shenming Lu wrote:
>
>> On 2020/11/20 1:41, Alex Williamson wrote:
>>> On Thu, 19 Nov 2020 14:13:24 +0530
>>> Kirti Wankhede wrote:
>>>
On 11/14/2020 2:47 PM, Shenming Lu wrote:
> When running VFIO mi
On 2020/11/22 下午7:39, Peter Maydell wrote:
On Sun, 22 Nov 2020 at 11:07, wrote:
From: yuanjungong
Close fd before returning.
Buglink: https://bugs.launchpad.net/qemu/+bug/1904486
Signed-off-by: yuanjungong
---
net/tap.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/tap.c b/
Kindly ping.
On 11/16/2020 10:13 PM, Peng Liang wrote:
> vnc_write() should be locked after the RFB protocol is initialized.
>
> Fixes: 0c426e4534b4 ("vnc: Add support for color map")
> Cc: qemu-sta...@nongnu.org
> Reported-by: Euler Robot
> Signed-off-by: Peng Liang
> ---
> ui/vnc.c | 2 ++
>
On Sat, Nov 21, 2020 at 12:24 AM Alistair Francis
wrote:
>
>
> On 19/11/2020 7:02 pm, Kito Cheng wrote:
> >> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> >> index 0bbfd7f4574..bc29e118c6d 100644
> >> --- a/target/riscv/cpu.c
> >> +++ b/target/riscv/cpu.c
> >> @@ -438,6 +438,9 @@ static
On 11/21/20 9:17 PM, Richard Henderson wrote:
> On 11/20/20 1:08 PM, Philippe Mathieu-Daudé wrote:
>> +++ b/target/mips/vendor-tx_translate.c.inc
>> @@ -41,6 +41,8 @@
>>
>> #if defined(TARGET_MIPS64)
>>
>> +#include "vendor-tx-mmi_translate.c.inc"
>
> Do you really want to nest include files
On 11/19/20 5:05 PM, Philippe Mathieu-Daudé wrote:
> Currently MIPS exceptions are displayed as string in system-mode
> emulation, but as number in user-mode.
> Unify by extracting the current system-mode code as excp_name()
> and use that in user-mode.
>
> Signed-off-by: Philippe Mathieu-Daudé
>
On 11/9/20 10:04 AM, Philippe Mathieu-Daudé wrote:
> Based-on: <20201108234234.2389789-1-f4...@amsat.org>
>
> Philippe Mathieu-Daudé (2):
> target/mips: Replace magic values by CP0PM_MASK or
> TARGET_PAGE_BITS_MIN
> target/mips: Do not include CP0 helpers in user-mode emulation
>
> targe
available in the Git repository at:
>
> git://github.com/mcayland/qemu.git tags/qemu-sparc-20201122
>
> for you to fetch changes up to 48e5c7f34c557afe49396a00169629d24dc3342d:
>
> hw/display/tcx: add missing 64-bit access for
On 11/21/20 9:13 PM, Richard Henderson wrote:
> On 11/20/20 1:08 PM, Philippe Mathieu-Daudé wrote:
>> Media eXtension Unit is a SIMD extension from Ingenic.
>>
>> Extract 2900 lines from the huge translate.c to a new file,
>> 'vendor-xburst_translate.c.inc'. As there are too many inter-
>> dependen
On 11/21/20 9:10 PM, Richard Henderson wrote:
> On 11/20/20 1:08 PM, Philippe Mathieu-Daudé wrote:
>> LoongEXTs are general-purpose extensions from the LoongISA.
>>
>> Extract 440 lines of translation routines to
>> 'vendor-loong-lext_translate.c.inc'.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>
On 11/21/20 8:44 PM, Richard Henderson wrote:
> On 11/20/20 1:08 PM, Philippe Mathieu-Daudé wrote:
>> MSA means 'MIPS SIMD Architecture' and is defined as a Module by MIPS.
>> Rename msa_helper.c as mod-mips-msa_helper.c, merge other MSA helpers
>> from op_helper.c.
>>
>> Signed-off-by: Philippe Ma
On 11/21/20 8:39 PM, Richard Henderson wrote:
> On 11/20/20 1:08 PM, Philippe Mathieu-Daudé wrote:
>> Extract FPU specific helpers from "internal.h" to "fpu_helper.h".
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> target/mips/fpu_helper.h | 50 ++
>>
Talk about a "blast form the past!" This Bug is now over 10 years old.
But at least somebody is still working on it and it was not
just quietly dropped. I can respect that.
My original recommendation stands: At least use long double for the
calcuations where available.
Regards,
Arno
On Sun, N
I'm sorry for the confusion. Andrew's description of steps to reproduce the
problem is correct.
I've described another problem present in the master but not related to
this patch.
On Sun, Nov 22, 2020 at 11:45 AM Andrew Melnichenko
wrote:
> Hi, the bug can be reproduced like that:
>
>> QEMU 5.1.
Commit ae5643ecc6 "hw/display/tcx: Allow 64-bit accesses to framebuffer stippler
and blitter" enabled 64-bit access for the TCX framebuffer stippler and blitter
but missed applying the change to one of the blitter MemoryRegions.
Whilst the original change works for me on my local NetBSD test image
The following changes since commit e3a232cccd2445e5d9e607a65a78cdbc33ff8a0f:
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into
staging (2020-11-20 22:30:51 +)
are available in the Git repository at:
git://github.com/mcayland/qemu.git tags/qemu-spar
On Sun, 22 Nov 2020 at 11:07, wrote:
>
> From: yuanjungong
>
> Close fd before returning.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1904486
> Signed-off-by: yuanjungong
> ---
> net/tap.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/net/tap.c b/net/tap.c
> index c46ff66..fe
On 21/11/2020 23:46, Peter Maydell wrote:
Is this bug now fixed, or are there still more patches not yet in
master?
The additional for-5.2 patch above is still needed: I've just submitted it to
Travis-CI, and assuming it passes I'll send a PR later.
ATB,
Mark.
From: yuanjungong
Close fd before returning.
Buglink: https://bugs.launchpad.net/qemu/+bug/1904486
Signed-off-by: yuanjungong
---
net/tap.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/tap.c b/net/tap.c
index c46ff66..fe95fa7 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -817,6 +817,7
Largely inspired by the TMP421 temperature sensor, here is a model for
the EMC1413/EMC1414 temperature sensors.
Specs can be found here :
http://ww1.microchip.com/downloads/en/DeviceDoc/20005274A.pdf
Signed-off-by: John Wang
---
v4:
-Fix QOM style name
-Add unittest
v3:
- update the link
G220A is a 2 socket x86 motherboard supported by OpenBMC.
Strapping configuration was obtained from hardware.
Signed-off-by: John Wang
Reviewed-by: Cédric Le Goater
Reviewed-by: Joel Stanley
---
v4:
- No changes
v3:
- No changes
v2:
- No changes
---
hw/arm/aspeed.c | 60 +
On Mon, Oct 26, 2020 at 5:08 AM Philippe Mathieu-Daudé wrote:
>
> On 10/25/20 2:14 PM, John Wang wrote:
> > Largely inspired by the TMP421 temperature sensor, here is a model for
> > the EMC1413/EMC1414 temperature sensors.
> >
> > Specs can be found here :
> >http://ww1.microchip.com/download
Hi, the bug can be reproduced like that:
> QEMU 5.1.50 monitor - type 'help' for more information
> (qemu) netdev_add
> type=tap,id=net0,script=/home/and/SRCS/qemu/ifup.sh,downscript=no
> (qemu) info network
> hub 0
> \ hub0port1: __org.qemu.net1: index=0,type=user,net=10.0.2.0,restrict=off
> \
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