On 31/07/19 08:37, Markus Armbruster wrote:
> Paolo Bonzini writes:
>
>> On 30/07/19 15:15, Eric Blake wrote:
We occasionally give up and use types directly rather than their typedef
names, flouting the coding style. This patch does. Trades messing with
qemu/typedefs.h for having
+-- On Wed, 31 Jul 2019, Jason Wang wrote --+
| On 2019/7/29 下午11:04, Stefan Hajnoczi wrote:
| > This change isn't related to the topic of the patch. It's a separate bug
| > fix.
| >
| > Please either document it in the commit description so it's clear the
| > change is intentional, or send it a
Paolo Bonzini writes:
> On 30/07/19 15:15, Eric Blake wrote:
>>> We occasionally give up and use types directly rather than their typedef
>>> names, flouting the coding style. This patch does. Trades messing with
>>> qemu/typedefs.h for having to write 'struct' a few times.
>
> I think Markus m
On Mon, Jul 29, 2019 at 04:56:30PM +0200, Damien Hedde wrote:
> Signed-off-by: Damien Hedde
> ---
> docs/devel/reset.txt | 165 +++
> 1 file changed, 165 insertions(+)
> create mode 100644 docs/devel/reset.txt
>
> diff --git a/docs/devel/reset.txt b/docs/
On Mon, Jul 29, 2019 at 04:56:29PM +0200, Damien Hedde wrote:
> It adds the possibility to add 2 gpios to control the warm and cold reset.
> With theses ios, the reset can be maintained during some time.
> Each io is associated with a state to detect level changes.
>
> Vmstate subsections are also
On Mon, Jul 29, 2019 at 04:56:26PM +0200, Damien Hedde wrote:
> Deprecate old reset apis and make them use the new one while they
> are still used somewhere.
>
> Signed-off-by: Damien Hedde
> ---
> hw/core/qdev.c | 22 +++---
> include/hw/qdev-core.h | 28
On Mon, Jul 29, 2019 at 04:56:25PM +0200, Damien Hedde wrote:
> This add Resettable interface implementation for both Bus and Device.
>
> *resetting* counter and *reset_is_cold* flag are added in DeviceState
> and BusState.
>
> Compatibility with existing code base is ensured.
> The legacy bus or
On Mon, Jul 29, 2019 at 04:56:24PM +0200, Damien Hedde wrote:
> Signed-off-by: Damien Hedde
I don't see a lot of point keeping this patch separate from the
previous one.
> ---
> hw/audio/intel-hda.c | 2 +-
> hw/hyperv/hyperv.c | 2 +-
> hw/i386/pc.c | 2 +-
> hw/ide/micro
On Mon, Jul 29, 2019 at 04:56:27PM +0200, Damien Hedde wrote:
> It contains the resetting counter and cold flag status.
>
> At this point, migration of bus reset related state (counter and cold/warm
> flag) is handled by parent device. This done using the post_load
> function in the vmsd subsectio
That crash seems to be from sessioninstaller which is not related to
virt-manager.
But never the less from your log:
"ValueError: Namespace GtK not available"
But virt-manager could require the same.
In fact things are provided by gir1.2-gtk-3.0 and virt-manager has:
Depends: ... gir1.2-gtk-3.
On Tue, Jul 30, 2019 at 04:08:59PM +0200, Damien Hedde wrote:
>
> On 7/30/19 3:59 PM, Peter Maydell wrote:
> > On Tue, 30 Jul 2019 at 14:56, Cornelia Huck wrote:
> >>
> >> On Tue, 30 Jul 2019 14:44:21 +0100
> >> Peter Maydell wrote:
> >>
> >>> On Tue, 30 Jul 2019 at 14:42, Cornelia Huck wrote:
> From: Kevin Wolf [mailto:kw...@redhat.com]
> Am 24.07.2019 um 16:35 hat Paolo Bonzini geschrieben:
> > On 24/07/19 10:43, Pavel Dovgalyuk wrote:
> > > The set of patches include the latest fixes for record/replay icount
> > > function:
> > > - fix for icount for the case when translation blocks
On 2019/7/29 下午11:04, Stefan Hajnoczi wrote:
On Wed, Jul 24, 2019 at 11:18:09AM +0530, P J P wrote:
+-- On Tue, 23 Jul 2019, Li Qiang wrote --+
| Stefan Hajnoczi 于2019年7月23日周二 下午9:03写道：
| > On Tue, Jul 23, 2019 at 04:17:54PM +0530, P J P wrote:
| > > -snprintf(helper_cmd, sizeof(h
Linux guest kernels have code which scans the string of characters
returned from the H_GET_TERM_CHAR hypercall and removes any \0
character which comes immediately after a \r character. This is to
work around a bug which was present in some ancient versions of
PowerVM. In order to avoid the corru
Move the define of target access alignment earlier from
target/foo/cpu.h to configure.
Suggested in Richard Henderson's reply to "[PATCH 1/4] tcg: TCGMemOp
is now accelerator independent MemOp"
Analysed target/foo/cpu.h for more candidates to define earlier but
did not spot any other straight for
Patchew URL:
https://patchew.org/QEMU/1564514832-29482-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD poin
Patchew URL:
https://patchew.org/QEMU/1564512798-25527-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD poin
From: Liu Jingqi
This structure describes memory side cache information for memory
proximity domains if the memory side cache is present and the
physical device forms the memory side cache.
The software could use this information to effectively place
the data in memory to maximize the performance
ACPI table HMAT has been introduced, QEMU now builds HMAT tables for
Heterogeneous Memory with boot option '-numa node'.
Add test cases on PC and Q35 machines with 2 numa nodes.
Because HMAT is generated when system enable numa, the
following tables need to be added for this test:
tests/acpi-tes
From: Liu Jingqi
HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
(HMAT). The specification references below link:
http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
It describes the memory attributes, such as memory side cache
attributes and bandw
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information Structure(s)
in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-
In ACPI 6.3 chapter 5.2.27 Heterogeneous Memory Attribute Table (HMAT),
The initiator represents processor which access to memory. And in 5.2.27.3
Memory Proximity Domain Attributes Structure, the attached initiator is
defined as where the memory controller responsible for a memory proximity
domain
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v8.
--
Add struct NumaState in MachineState and move existing numa global
nb_numa_nodes(renamed as "num_nodes") into NumaState. And add variable
numa_support into MachineClass to decide which submachines support NUMA.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
In struct arm_boot_info, kernel_filename, initrd_filename and
kernel_cmdline are copied from from MachineState. This patch add
MachineState as a parameter into arm_load_dtb() and move the copy chunk
of kernel_filename, initrd_filename and kernel_cmdline into
arm_load_kernel().
Reviewed-by: Igor Ma
From: Liu Jingqi
This structure describes the memory access latency and bandwidth
information from various memory access initiator proximity domains.
The latency and bandwidth numbers represented in this structure
correspond to rated latency and bandwidth for the platform.
The software could use
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache attributes and bandwidth and latency details,
related to the Memory Proximity Domain.
The software is expected to use
Move existing numa global numa_info (renamed as "nodes") into NumaState.
Reviewed-by: Igor Mammedov
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
Signed-off-by: Tao Xu
---
No changes in v8.
---
exec.c | 2 +-
hw/acpi/aml-build.c | 6
Move existing numa global have_numa_distance into NumaState.
Reviewed-by: Igor Mammedov
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
No changes in v8.
---
hw/arm/sbsa-ref.c| 2 +-
hw/arm/virt-acpi-build.c | 2 +-
hw/arm/
On 7/31/2019 5:12 AM, Eduardo Habkost wrote:
On Tue, Jul 30, 2019 at 11:11:20AM +0200, Igor Mammedov wrote:
[...]
PS:
we already have an implicit node creation in generic numa code (when memory
hotplug
is enabled), so we probably could reuse that and a node should be created from
there
instead
On Tue, Jul 30, 2019 at 01:33:35PM +0800, Ivan Ren wrote:
>From: Ivan Ren
>
>Limit the speed of multifd migration through common speed limitation
>qemu file.
>
>Signed-off-by: Ivan Ren
Reviewed-by: Wei Yang
>---
> migration/ram.c | 22 --
> 1 file changed, 12 insertions(+),
On Tue, Jul 16, 2019 at 6:22 AM Ivan Grokhotkov wrote:
>
> CPU-specific init functions (riscv_*_cpu_init) configure members of
> CPURISCVState, such as priv_version and resetvec. However
> riscv_cpu_realize unconditionally overwrites these members. The
> result is that some CPUs (such as CPU_SIFIV
From: Atish Patra
As per the RISC-V spec, Floating Point registers are named as f0..f31
so lets fix the register names accordingly.
Signed-off-by: Atish Patra
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tar
Update the Hypervisor CSR addresses to match the v0.4 spec.
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 11f971ad5d..e9
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
fourth release candidate for the QEMU 4.1 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu-project.org/qemu-4.1.0-rc3.tar.xz
http://down
The first three patches are ones that I have pulled out of my original
Hypervisor series at an attempt to reduce the number of patches in the
series.
These three patches all make sense without the Hypervisor series so can
be merged seperatley and will reduce the review burden of the next
version o
Let's create a function that tests if floating point support is
enabled. We can then protect all floating point operations based on if
they are enabled.
This patch so far doesn't change anything, it's just preparing for the
Hypervisor support for floating point operations.
Signed-off-by: Alistair
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Behrens
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Chih-Min Chao
---
hw/riscv/sifive_plic.c | 12
include/hw/riscv/sifive_plic.h | 3 ---
2 files changed, 15 deletions(-)
diff --git a/hw/riscv/sifive_plic.c b/hw
Setting write permission on dirty PTEs results in userspace inside a
Hypervisor guest (VU) becoming corrupted. This appears to be because it
ends up with write permission in the second stage translation in cases
where we aren't doing a store.
Signed-off-by: Alistair Francis
---
target/riscv/cpu_
> From: Michael S. Tsirkin [mailto:m...@redhat.com]
> Sent: Wednesday, July 31, 2019 3:38 AM
>
> On Tue, Jul 30, 2019 at 07:21:33PM +0200, Eric Auger wrote:
> > We introduce a new msi_bypass field which indicates whether
> > the IOAPIC MSI window [0xFEE0 - 0xFEEF] must be exposed
it's not
Public bug reported:
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP
regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cor
On 7/30/19 4:07 PM, Eduardo Habkost wrote:
> Sometimes we use the 'struct' keyword to help us reduce
> dependencies between header files. Document that practice.
>
> Signed-off-by: Eduardo Habkost
> ---
> I wonder if this is too terse? Should we give examples?
An example might be nice, but I l
On Tue, Jul 30, 2019 at 11:11:20AM +0200, Igor Mammedov wrote:
[...]
> PS:
> we already have an implicit node creation in generic numa code (when memory
> hotplug
> is enabled), so we probably could reuse that and a node should be created
> from there
> instead of fixing up from the code deep wit
Sometimes we use the 'struct' keyword to help us reduce
dependencies between header files. Document that practice.
Signed-off-by: Eduardo Habkost
---
I wonder if this is too terse? Should we give examples?
---
HACKING | 2 ++
1 file changed, 2 insertions(+)
diff --git a/HACKING b/HACKING
inde
On Tue, Jul 30, 2019 at 08:15:12AM -0500, Eric Blake wrote:
> How hard would it be to compute which typedefs already in
> qemu/typedefs.h are necessary to avoid cyclic inclusion?
I don't think it's just about cyclic inclusion. It's also about
avoiding dependencies between headers just because of
On Tue, Jul 30, 2019 at 12:24:27PM +, N. B. wrote:
> From: Ning Bo
>
> Report vsock running event so that the upper application can
> control boot sequence.
> see https://github.com/kata-containers/runtime/pull/1918
>
> Signed-off-by: Ning Bo
Cc Stefan.
Stefan, are you willing to maintain
On Tue, Jul 30, 2019 at 03:14:00PM +0200, Cornelia Huck wrote:
> On Tue, 30 Jul 2019 14:17:48 +0200
> Andrea Bolognani wrote:
>
> > On Tue, 2019-07-30 at 13:35 +0200, Cornelia Huck wrote:
> > > On Tue, 30 Jul 2019 12:25:30 +0200
> > > Andrea Bolognani wrote:
> > > > Can you please make sure vi
Public bug reported:
I have created a Fedora Core 5 x86_64 VM image. When I run the image
using QEMU on Windows the VM hangs while loading the kernel about 30% of
the time. I am trying to use this VM with a CI software, looking at the
history the build failed 27 out of 79 attempts. QEMU 3.0.0 is i
On Tue, Jul 30, 2019 at 10:06 PM Peter Maydell
wrote:
> On Tue, 30 Jul 2019 at 21:00, Aleksandar Markovic
> wrote:
> >
> > On Thu, Jul 25, 2019 at 3:25 AM wrote:
> >
> > > Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
> > > defines out of target/foo/cpu.h into configure, as we
On Tue, 30 Jul 2019 at 21:00, Aleksandar Markovic
wrote:
>
> On Thu, Jul 25, 2019 at 3:25 AM wrote:
>
> > Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
> > defines out of target/foo/cpu.h into configure, as we do with
> > TARGET_WORDS_BIGENDIAN, so that it is always defined earl
On Tue, Jul 30, 2019 at 03:14:00PM +0200, Cornelia Huck wrote:
> On Tue, 30 Jul 2019 14:17:48 +0200
> Andrea Bolognani wrote:
>
> > On Tue, 2019-07-30 at 13:35 +0200, Cornelia Huck wrote:
> > > On Tue, 30 Jul 2019 12:25:30 +0200
> > > Andrea Bolognani wrote:
> > > > Can you please make sure vi
On Thu, Jul 25, 2019 at 3:25 AM wrote:
> Rename ALIGNED_ONLY to TARGET_ALIGNED_ONLY for clarity and move
> defines out of target/foo/cpu.h into configure, as we do with
> TARGET_WORDS_BIGENDIAN, so that it is always defined early.
>
> Also, poison the symbol in include/exec/poison.h to prevent us
On 7/30/19 12:25 PM, Max Reitz wrote:
> Add a test how our qcow2 driver handles extra data in snapshot table
> entries, and how it repairs overly long snapshot tables.
May need tweaking if we drop 9 and 10.
>
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/261 | 449 +
The following changes since commit 22235bb609c18547cf6b215bad1f9d2ec56ad371:
pc-dimm: fix crash when invalid slot number is used (2019-07-29 16:57:27
-0400)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes
On Tue, Jul 30, 2019 at 07:21:33PM +0200, Eric Auger wrote:
> We introduce a new msi_bypass field which indicates whether
> the IOAPIC MSI window [0xFEE0 - 0xFEEF] must be exposed
> as a reserved region. By default the field is set to true at
> instantiation time. Later on we will introduce
On Tue, Jul 30, 2019 at 07:21:36PM +0200, Eric Auger wrote:
> This patch adds virtio-iommu-pci, which is the pci proxy for
> the virtio-iommu device.
>
> Signed-off-by: Eric Auger
This part I'm not sure we should merge just yet. The reason being I
think we should limit it to mmio where DT can b
Patchew URL:
https://patchew.org/QEMU/1564512798-25527-1-git-send-email-aleksandar.marko...@rt-rk.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH for 4.2 v3 0/6] target/mips: Misc patches for 4.2
M
From: Yongbok Kim
WatchHi is extended by the field MemoryMapID with the GINVT instruction.
The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/
DMFC0 in 64-bit architectures.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 2 +-
From: Yongbok Kim
Implement Global Invalidate TLB instruction. As QEMU doesn't support
caches and Virtualization, this implementation only cover the GINVT
(Global Invalidate TLB) instruction.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
disas/mips.c| 2 +
ta
From: Yongbok Kim
The optional Data Scratch Pad RAM (DSPRAM) block provides a general scratch pad
RAM
used for temporary storage of data. The DSPRAM provides a connection to on-chip
memory or memory-mapped registers, which are accessed in parallel with the L1
data
cache to minimize access laten
From: Yongbok Kim
Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions.
Reuse zlib crc32() and Linux crc32c(). Note that, at the time being,
there is no MIPS CPU that supports CRC32 instructions (they are an
optional part of MIPS64/32 R6 anf nanoMIPS ISAs).
Signed-off-by: Yongbok
From: Aleksandar Markovic
There is a need for printing input and output data for failure cases,
for debugging purpose. This is achieved by this patch, and only if a
preprocessor constant is manually set to 1. (Assumption is that the
need for such printout is relatively rare.)
Signed-off-by: Alek
From: Aleksandar Markovic
This series includes misc MIPS patches intended to be integrated after
4.1 release.
v3->v4:
- fixed build error
v2->v3:
- corrected the patch on WatchHi to include "mi" field
- corrected the patch on WatchHi to bump VMStateDescription version
v1->v2:
- fixe
On 7/30/19 12:25 PM, Max Reitz wrote:
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/common.rc | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc
> index 5502c3da2f..78decfd5d5 100644
> --- a/tests/qem
On 30/07/19 18:44, Philippe Mathieu-Daudé wrote:
>> +++ b/target/i386/kvm.c
>> @@ -190,6 +190,7 @@ static int kvm_get_tsc(CPUState *cs)
>> return 0;
>> }
>>
>> +memset(&msr_data, 0, sizeof(msr_data));
> I wonder the overhead of this one...
>
There is just one MSR in the struct
On 30/07/19 18:01, Andrey Shinkevich wrote:
> Not the whole structure is initialized before passing it to the KVM.
> Reduce the number of Valgrind reports.
>
> Signed-off-by: Andrey Shinkevich
Christian, is this the right fix? It's not expensive so it wouldn't be
an issue, just checking if ther
On 7/30/19 12:25 PM, Max Reitz wrote:
> qcow2 v3 images require every snapshot table entry to have at least 16
> bytes of extra data. If they do not, let qemu-img check -r all fix it.
>
> Signed-off-by: Max Reitz
> ---
> block/qcow2-snapshot.c | 15 +++
> 1 file changed, 15 insertio
On 7/24/19 5:40 AM, Vladimir Sementsov-Ogievskiy wrote:
> Instead of draining additional nodes in each job code, let's do it in
> common block_job_drain, draining just all job's children.
> BlockJobDriver.drain becomes unused, so, drop it at all.
>
> It's also a first step to finally get rid of
On 7/30/19 12:25 PM, Max Reitz wrote:
> Signed-off-by: Max Reitz
> ---
> block/qcow2-snapshot.c | 14 ++
> 1 file changed, 14 insertions(+)
>
Same problem as for 9/13 - should we really be throwing away the user's
data like this? (9/13 hits if the user has a small number of snapsho
On 7/30/19 12:25 PM, Max Reitz wrote:
> We currently refuse to open qcow2 images with overly long snapshot
> tables. This patch makes qemu-img check -r all drop all offending
> entries past what we deem acceptable.
>
> Signed-off-by: Max Reitz
> ---
> block/qcow2-snapshot.c | 89 +++
On 7/30/19 12:25 PM, Max Reitz wrote:
> The only case where we currently reject snapshot table entries is when
> they have too much extra data. Fix them with qemu-img check -r all by
> counting it as a corruption, reducing their extra_data_size, and then
> letting qcow2_check_fix_snapshot_table()
From: Yongbok Kim
Implement Global Invalidate TLB instruction. As QEMU doesn't support
caches and Virtualization, this implementation only cover the GINVT
(Global Invalidate TLB) instruction.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
disas/mips.c| 2 +
ta
From: Yongbok Kim
The optional Data Scratch Pad RAM (DSPRAM) block provides a general scratch pad
RAM
used for temporary storage of data. The DSPRAM provides a connection to on-chip
memory or memory-mapped registers, which are accessed in parallel with the L1
data
cache to minimize access laten
From: Aleksandar Markovic
There is a need for printing input and output data for failure cases,
for debugging purpose. This is achieved by this patch, and only if a
preprocessor constant is manually set to 1. (Assumption is that the
need for such printout is relatively rare.)
Signed-off-by: Alek
From: Yongbok Kim
Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions.
Reuse zlib crc32() and Linux crc32c(). Note that, at the time being,
there is no MIPS CPU that supports CRC32 instructions (they are an
optional part of MIPS64/32 R6 anf nanoMIPS ISAs).
Signed-off-by: Yongbok
From: Yongbok Kim
WatchHi is extended by the field MemoryMapID with the GINVT instruction.
The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/
DMFC0 in 64-bit architectures.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 2 +-
On 7/30/19 12:25 PM, Max Reitz wrote:
> qcow2_check_read_snapshot_table() can perform consistency checks, but it
> cannot fix everything. Specifically, it cannot allocate new clusters,
> because that should wait until the refcount structures are known to be
> consistent (i.e., after qcow2_check_re
From: Aleksandar Markovic
This series includes misc MIPS patches intended to be integrated after
4.1 release.
v2->v3:
- corrected the patch on WatchHi to include "mi" field
- corrected the patch on WatchHi to bump VMStateDescription version
v1->v2:
- fixed checkpatch warnings
- added
On 7/30/19 12:25 PM, Max Reitz wrote:
> Reading the snapshot table can fail. That is a problem when we want to
> repair the image.
>
> Therefore, stop reading the snapshot table in qcow2_do_open() in check
> mode. Instead, add a new function qcow2_check_read_snapshot_table()
> that reads the sna
On 7/30/19 12:32 PM, Vladimir Sementsov-Ogievskiy wrote:
> Hi all!
>
> Here are two small fixes.
>
> 01 is not a degradation at all, so it's OK for 4.2
> 02 is degradation of 3.0, so it's possibly OK for 4.2 too,
>but it seems to be real bug and fix is very simple, so,
>may be 4.1 is b
On Mon, Jul 29, 2019 at 8:19 AM Chih-Min Chao wrote:
>
>
> On Fri, Jul 26, 2019 at 2:56 AM Alistair Francis
> wrote:
>>
>> From: Atish Patra
>>
>> As per the RISC-V spec, Floating Point registers are named as f0..f31
>> so lets fix the register names accordingly.
>>
>> Signed-off-by: Atish Patr
On 7/30/19 12:32 PM, Vladimir Sementsov-Ogievskiy wrote:
> We have detect_zeroes option, so at least for blockdev-backup user
> should define it if zero-detection is needed. For drive-backup leave
> detection enabled by default but do it through existing option instead
> of open-coding.
>
> Sig
On Tue, Jul 30, 2019 at 1:49 AM Christophe de Dinechin
wrote:
>
>
> Alistair Francis writes:
>
> > Let's creaate a function that tests if floating point support is
>
> Typo: create
Fixed
>
> > enabled. We can then protect all floating point operations based on if
> > they are enabled.
> >
> > Th
On Mon, Jul 29, 2019 at 9:56 AM Chih-Min Chao wrote:
>
>
>
> On Fri, Jul 26, 2019 at 2:55 AM Alistair Francis
> wrote:
>>
>> Let's creaate a function that tests if floating point support is
>> enabled. We can then protect all floating point operations based on if
>> they are enabled.
>>
>> This
On 7/30/19 12:32 PM, Vladimir Sementsov-Ogievskiy wrote:
> write flags are constant, let's store it in BackupBlockJob instead of
> recalculating. It also makes two boolean fields to be unused, so,
> drop them.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> block/backup.c | 24 +++
On 7/30/19 12:32 PM, Vladimir Sementsov-Ogievskiy wrote:
> Enabled by default copy_range ignores compress option. It's definitely
> unexpected for user.
>
> It's broken since introduction of copy_range usage in backup in
> 9ded4a011496.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
>
On 7/30/19 12:25 PM, Max Reitz wrote:
> qcow2 v3 requires every snapshot table entry to have two extra data
> fields: The 64-bit VM state size, and the virtual disk size. Both are
> optional for v2 images, so they may not be present.
>
> qcow2_upgrade() therefore should update the snapshot table
On 7/30/19 12:24 PM, Max Reitz wrote:
Subject line sounds funny; I'd probably s/an/its/
> This does not make sense right now, but it will make sense once we need
> to do more than to just update s->qcow_version.
>
> Signed-off-by: Max Reitz
> ---
> block/qcow2.c | 43 ++
On 7/30/19 12:24 PM, Max Reitz wrote:
> Updating the snapshot list will be useful when upgrading a v2 image to
> v3, so we will need to call this function in qcow2.c.
>
> Signed-off-by: Max Reitz
> ---
> block/qcow2.h | 1 +
> block/qcow2-snapshot.c | 2 +-
> 2 files changed, 2 insertio
On 7/30/19 12:24 PM, Max Reitz wrote:
> The qcow2 specification says to ignore unknown extra data fields in
> snapshot table entries. Currently, we discard it whenever we update the
> image, which is a bit different from "ignore".
>
> This patch makes the qcow2 driver keep all unknown extra data
On 30.07.19 19:14, Philippe Mathieu-Daudé wrote:
> On 7/30/19 7:05 PM, Christian Borntraeger wrote:
>> On 30.07.19 18:44, Philippe Mathieu-Daudé wrote:
>>> On 7/30/19 6:01 PM, Andrey Shinkevich wrote:
Not the whole structure is initialized before passing it to the KVM.
Reduce the numbe
The following assert is seen once in a while while resetting the
Linux kernel.
qemu-system-x86_64: hw/usb/core.c:734: usb_ep_get:
Assertion `dev != NULL' failed.
The call to usb_ep_get() originates from ehci_execute().
Analysis and debugging shows that p->queue->dev can indeed be NULL
in
On 7/30/19 12:24 PM, Max Reitz wrote:
> Hi,
>
> As Eric reports in https://bugzilla.redhat.com/show_bug.cgi?id=1727347,
> qemu-img amend has a bug when it comes to converting qcow2 v2 images to
> v3: In v3, every snapshot table entry requires at least 16 bytes of
> extra metadata to be present, wh
On 7/30/19 12:24 PM, Max Reitz wrote:
> Signed-off-by: Max Reitz
> ---
> block/qcow2.h | 2 +-
> block/qcow2-snapshot.c | 7 ++-
> block/qcow2.c | 3 +--
> 3 files changed, 8 insertions(+), 4 deletions(-)
Reviewed-by: Eric Blake
--
Eric Blake, Principal Software Engineer
The fd registration API in io_uring registers a series of fds
together that cannot be modified later. Thus, a hashtable
maintains an index of fds registered and their index in the
internally registered array. The existing fd array is unregistered
and a new one submitted.
Signed-off-by: Aarushi Meh
Signed-off-by: Aarushi Mehta
Reviewed-by: Stefan Hajnoczi
---
tests/qemu-iotests/028 | 3 ++-
tests/qemu-iotests/058 | 2 +-
tests/qemu-iotests/089 | 4 ++--
tests/qemu-iotests/091 | 7 ---
tests/qemu-iotests/109 | 3 ++-
tests/qemu-iotests/147 | 5 +++--
tests/qemu-iotests/181 | 10 ++
Signed-off-by: Aarushi Mehta
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Maxim Levitsky
---
block/file-posix.c | 99 --
1 file changed, 79 insertions(+), 20 deletions(-)
diff --git a/block/file-posix.c b/block/file-posix.c
index 4479cc7ab4..4aa42f826f
Signed-off-by: Aarushi Mehta
Reviewed-by: Stefan Hajnoczi
---
tests/qemu-iotests/check | 15 ++-
tests/qemu-iotests/common.rc | 14 ++
tests/qemu-iotests/iotests.py | 9 -
3 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/ch
Signed-off-by: Aarushi Mehta
Reviewed-by: Stefan Hajnoczi
Acked-by: Eric Blake
---
qemu-nbd.c| 12
qemu-nbd.texi | 4 ++--
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/qemu-nbd.c b/qemu-nbd.c
index a8cb39e510..7bb479f3c0 100644
--- a/qemu-nbd.c
+++ b/qemu-nb
Signed-off-by: Aarushi Mehta
Reviewed-by: Stefan Hajnoczi
---
util/async.c | 36
1 file changed, 36 insertions(+)
diff --git a/util/async.c b/util/async.c
index 8d2105729c..2e0a5e20ac 100644
--- a/util/async.c
+++ b/util/async.c
@@ -276,6 +276,14 @@ aio_ctx_
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